149 	struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];  member
205 		set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);  in mxl5007t_set_mode_bits()
208 		set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);  in mxl5007t_set_mode_bits()
211 		set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);  in mxl5007t_set_mode_bits()
268 	set_reg_bits(state->tab_init, 0x02, 0x0f, val);  in mxl5007t_set_if_freq_bits()
271 	set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);  in mxl5007t_set_if_freq_bits()
282 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);  in mxl5007t_set_xtal_freq_bits()
283 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);  in mxl5007t_set_xtal_freq_bits()
286 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);  in mxl5007t_set_xtal_freq_bits()
287 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);  in mxl5007t_set_xtal_freq_bits()
290 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);  in mxl5007t_set_xtal_freq_bits()
291 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);  in mxl5007t_set_xtal_freq_bits()
294 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);  in mxl5007t_set_xtal_freq_bits()
295 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);  in mxl5007t_set_xtal_freq_bits()
298 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);  in mxl5007t_set_xtal_freq_bits()
299 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);  in mxl5007t_set_xtal_freq_bits()
302 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);  in mxl5007t_set_xtal_freq_bits()
303 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);  in mxl5007t_set_xtal_freq_bits()
306 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);  in mxl5007t_set_xtal_freq_bits()
307 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);  in mxl5007t_set_xtal_freq_bits()
310 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);  in mxl5007t_set_xtal_freq_bits()
311 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);  in mxl5007t_set_xtal_freq_bits()
314 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);  in mxl5007t_set_xtal_freq_bits()
315 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);  in mxl5007t_set_xtal_freq_bits()
318 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);  in mxl5007t_set_xtal_freq_bits()
319 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);  in mxl5007t_set_xtal_freq_bits()
322 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);  in mxl5007t_set_xtal_freq_bits()
323 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);  in mxl5007t_set_xtal_freq_bits()
326 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);  in mxl5007t_set_xtal_freq_bits()
327 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);  in mxl5007t_set_xtal_freq_bits()
330 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);  in mxl5007t_set_xtal_freq_bits()
331 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);  in mxl5007t_set_xtal_freq_bits()
334 		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);  in mxl5007t_set_xtal_freq_bits()
335 		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);  in mxl5007t_set_xtal_freq_bits()
348 	memcpy(&state->tab_init, &init_tab, sizeof(init_tab));  in mxl5007t_calc_init_regs()
355 	set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);  in mxl5007t_calc_init_regs()
356 	set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);  in mxl5007t_calc_init_regs()
359 		copy_reg_bits(state->tab_init, state->tab_init_cable);  in mxl5007t_calc_init_regs()
362 		return state->tab_init;  in mxl5007t_calc_init_regs()