Lines Matching +full:timeout +full:- +full:comms +full:- +full:ms
1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <media/rc-core.h>
49 * IRQ set: Enable full FIFO 1 -> bit 3;
50 * Enable overrun IRQ 1 -> bit 2;
51 * Enable last symbol IRQ 1 -> bit 1:
52 * Enable RX interrupt 1 -> bit 0;
56 /* maximum symbol period (microsecs),timeout to detect end of symbol train */
62 #define IR_ST_NAME "st-rc"
66 struct ir_raw_event ev = { .timeout = true, .duration = rdev->timeout }; in st_rc_send_lirc_timeout()
75 * |-IRB_RX_ON-| |-IRB_RX_ON-|
81 * |--------------- IRB_RX_SYS -------------|------ IRB_RX_SYS -------|
83 * |------------- encoding bit 0 -----------|---- encoding bit 1 -----|
86 * convert to standard mark/space we have to calculate space=(IRB_RX_SYS-mark)
87 * The mark time represents the amount of time the carrier (usually 36-40kHz)
94 unsigned long timeout; in st_rc_rx_interrupt() local
101 if (dev->irq_wake) in st_rc_rx_interrupt()
102 pm_wakeup_event(dev->dev, 0); in st_rc_rx_interrupt()
104 /* FIXME: is 10ms good enough ? */ in st_rc_rx_interrupt()
105 timeout = jiffies + msecs_to_jiffies(10); in st_rc_rx_interrupt()
107 status = readl(dev->rx_base + IRB_RX_STATUS); in st_rc_rx_interrupt()
111 int_status = readl(dev->rx_base + IRB_RX_INT_STATUS); in st_rc_rx_interrupt()
114 ir_raw_event_overflow(dev->rdev); in st_rc_rx_interrupt()
115 dev_info(dev->dev, "IR RX overrun\n"); in st_rc_rx_interrupt()
117 dev->rx_base + IRB_RX_INT_CLEAR); in st_rc_rx_interrupt()
121 symbol = readl(dev->rx_base + IRB_RX_SYS); in st_rc_rx_interrupt()
122 mark = readl(dev->rx_base + IRB_RX_ON); in st_rc_rx_interrupt()
129 symbol -= mark; in st_rc_rx_interrupt()
130 if (dev->overclocking) { /* adjustments to timings */ in st_rc_rx_interrupt()
131 symbol *= dev->sample_mult; in st_rc_rx_interrupt()
132 symbol /= dev->sample_div; in st_rc_rx_interrupt()
133 mark *= dev->sample_mult; in st_rc_rx_interrupt()
134 mark /= dev->sample_div; in st_rc_rx_interrupt()
139 ir_raw_event_store(dev->rdev, &ev); in st_rc_rx_interrupt()
144 ir_raw_event_store(dev->rdev, &ev); in st_rc_rx_interrupt()
146 st_rc_send_lirc_timeout(dev->rdev); in st_rc_rx_interrupt()
151 } while (time_is_after_jiffies(timeout)); in st_rc_rx_interrupt()
153 writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_CLEAR); in st_rc_rx_interrupt()
156 ir_raw_event_handle(dev->rdev); in st_rc_rx_interrupt()
168 reset_control_deassert(dev->rstc); in st_rc_hardware_init()
170 ret = clk_prepare_enable(dev->sys_clock); in st_rc_hardware_init()
172 dev_err(dev->dev, "Failed to prepare/enable system clock\n"); in st_rc_hardware_init()
176 baseclock = clk_get_rate(dev->sys_clock); in st_rc_hardware_init()
179 writel(1, dev->rx_base + IRB_RX_POLARITY_INV); in st_rc_hardware_init()
182 writel(rx_sampling_freq_div, dev->base + IRB_SAMPLE_RATE_COMM); in st_rc_hardware_init()
184 freqdiff = baseclock - (rx_sampling_freq_div * IRB_SAMPLE_FREQ); in st_rc_hardware_init()
186 dev->overclocking = true; in st_rc_hardware_init()
187 dev->sample_mult = 1000; in st_rc_hardware_init()
188 dev->sample_div = baseclock / (10000 * rx_sampling_freq_div); in st_rc_hardware_init()
189 rx_max_symbol_per = (rx_max_symbol_per * 1000)/dev->sample_div; in st_rc_hardware_init()
192 writel(rx_max_symbol_per, dev->rx_base + IRB_MAX_SYM_PERIOD); in st_rc_hardware_init()
201 dev_pm_clear_wake_irq(&pdev->dev); in st_rc_remove()
202 device_init_wakeup(&pdev->dev, false); in st_rc_remove()
203 clk_disable_unprepare(rc_dev->sys_clock); in st_rc_remove()
204 rc_unregister_device(rc_dev->rdev); in st_rc_remove()
209 struct st_rc_device *dev = rdev->priv; in st_rc_open()
213 writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_EN); in st_rc_open()
214 writel(0x01, dev->rx_base + IRB_RX_EN); in st_rc_open()
222 struct st_rc_device *dev = rdev->priv; in st_rc_close()
224 writel(0x00, dev->rx_base + IRB_RX_EN); in st_rc_close()
225 writel(0x00, dev->rx_base + IRB_RX_INT_EN); in st_rc_close()
230 int ret = -EINVAL; in st_rc_probe()
232 struct device *dev = &pdev->dev; in st_rc_probe()
234 struct device_node *np = pdev->dev.of_node; in st_rc_probe()
240 return -ENOMEM; in st_rc_probe()
245 return -ENOMEM; in st_rc_probe()
247 if (np && !of_property_read_string(np, "rx-mode", &rx_mode)) { in st_rc_probe()
250 rc_dev->rxuhfmode = true; in st_rc_probe()
252 rc_dev->rxuhfmode = false; in st_rc_probe()
262 rc_dev->sys_clock = devm_clk_get(dev, NULL); in st_rc_probe()
263 if (IS_ERR(rc_dev->sys_clock)) { in st_rc_probe()
265 ret = PTR_ERR(rc_dev->sys_clock); in st_rc_probe()
269 rc_dev->irq = platform_get_irq(pdev, 0); in st_rc_probe()
270 if (rc_dev->irq < 0) { in st_rc_probe()
271 ret = rc_dev->irq; in st_rc_probe()
275 rc_dev->base = devm_platform_ioremap_resource(pdev, 0); in st_rc_probe()
276 if (IS_ERR(rc_dev->base)) { in st_rc_probe()
277 ret = PTR_ERR(rc_dev->base); in st_rc_probe()
281 if (rc_dev->rxuhfmode) in st_rc_probe()
282 rc_dev->rx_base = rc_dev->base + 0x40; in st_rc_probe()
284 rc_dev->rx_base = rc_dev->base; in st_rc_probe()
286 rc_dev->rstc = reset_control_get_optional_exclusive(dev, NULL); in st_rc_probe()
287 if (IS_ERR(rc_dev->rstc)) { in st_rc_probe()
288 ret = PTR_ERR(rc_dev->rstc); in st_rc_probe()
292 rc_dev->dev = dev; in st_rc_probe()
298 rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; in st_rc_probe()
300 rdev->rx_resolution = 100; in st_rc_probe()
301 rdev->timeout = MAX_SYMB_TIME; in st_rc_probe()
302 rdev->priv = rc_dev; in st_rc_probe()
303 rdev->open = st_rc_open; in st_rc_probe()
304 rdev->close = st_rc_close; in st_rc_probe()
305 rdev->driver_name = IR_ST_NAME; in st_rc_probe()
306 rdev->map_name = RC_MAP_EMPTY; in st_rc_probe()
307 rdev->device_name = "ST Remote Control Receiver"; in st_rc_probe()
313 rc_dev->rdev = rdev; in st_rc_probe()
314 if (devm_request_irq(dev, rc_dev->irq, st_rc_rx_interrupt, in st_rc_probe()
316 dev_err(dev, "IRQ %d register failed\n", rc_dev->irq); in st_rc_probe()
317 ret = -EINVAL; in st_rc_probe()
323 dev_pm_set_wake_irq(dev, rc_dev->irq); in st_rc_probe()
331 dev_info(dev, "setup in %s mode\n", rc_dev->rxuhfmode ? "UHF" : "IR"); in st_rc_probe()
338 clk_disable_unprepare(rc_dev->sys_clock); in st_rc_probe()
351 if (!enable_irq_wake(rc_dev->irq)) in st_rc_suspend()
352 rc_dev->irq_wake = 1; in st_rc_suspend()
354 return -EINVAL; in st_rc_suspend()
357 writel(0x00, rc_dev->rx_base + IRB_RX_EN); in st_rc_suspend()
358 writel(0x00, rc_dev->rx_base + IRB_RX_INT_EN); in st_rc_suspend()
359 clk_disable_unprepare(rc_dev->sys_clock); in st_rc_suspend()
360 reset_control_assert(rc_dev->rstc); in st_rc_suspend()
370 struct rc_dev *rdev = rc_dev->rdev; in st_rc_resume()
372 if (rc_dev->irq_wake) { in st_rc_resume()
373 disable_irq_wake(rc_dev->irq); in st_rc_resume()
374 rc_dev->irq_wake = 0; in st_rc_resume()
381 if (rdev->users) { in st_rc_resume()
382 writel(IRB_RX_INTS, rc_dev->rx_base + IRB_RX_INT_EN); in st_rc_resume()
383 writel(0x01, rc_dev->rx_base + IRB_RX_EN); in st_rc_resume()
396 { .compatible = "st,comms-irb", },