37 static void nvt_clear_cir_wake_fifo(struct nvt_dev *nvt);
46 static inline struct device *nvt_get_dev(const struct nvt_dev *nvt)  in nvt_get_dev()  argument
48 	return nvt->rdev->dev.parent;  in nvt_get_dev()
51 static inline bool is_w83667hg(struct nvt_dev *nvt)  in is_w83667hg()  argument
53 	return nvt->chip_ver == NVT_W83667HG;  in is_w83667hg()
57 static inline void nvt_cr_write(struct nvt_dev *nvt, u8 val, u8 reg)  in nvt_cr_write()  argument
59 	outb(reg, nvt->cr_efir);  in nvt_cr_write()
60 	outb(val, nvt->cr_efdr);  in nvt_cr_write()
64 static inline u8 nvt_cr_read(struct nvt_dev *nvt, u8 reg)  in nvt_cr_read()  argument
66 	outb(reg, nvt->cr_efir);  in nvt_cr_read()
67 	return inb(nvt->cr_efdr);  in nvt_cr_read()
71 static inline void nvt_set_reg_bit(struct nvt_dev *nvt, u8 val, u8 reg)  in nvt_set_reg_bit()  argument
73 	u8 tmp = nvt_cr_read(nvt, reg) | val;  in nvt_set_reg_bit()
74 	nvt_cr_write(nvt, tmp, reg);  in nvt_set_reg_bit()
78 static inline int nvt_efm_enable(struct nvt_dev *nvt)  in nvt_efm_enable()  argument
80 	if (!request_muxed_region(nvt->cr_efir, 2, NVT_DRIVER_NAME))  in nvt_efm_enable()
84 	outb(EFER_EFM_ENABLE, nvt->cr_efir);  in nvt_efm_enable()
85 	outb(EFER_EFM_ENABLE, nvt->cr_efir);  in nvt_efm_enable()
91 static inline void nvt_efm_disable(struct nvt_dev *nvt)  in nvt_efm_disable()  argument
93 	outb(EFER_EFM_DISABLE, nvt->cr_efir);  in nvt_efm_disable()
95 	release_region(nvt->cr_efir, 2);  in nvt_efm_disable()
103 static inline void nvt_select_logical_dev(struct nvt_dev *nvt, u8 ldev)  in nvt_select_logical_dev()  argument
105 	nvt_cr_write(nvt, ldev, CR_LOGICAL_DEV_SEL);  in nvt_select_logical_dev()
109 static inline void nvt_enable_logical_dev(struct nvt_dev *nvt, u8 ldev)  in nvt_enable_logical_dev()  argument
111 	nvt_efm_enable(nvt);  in nvt_enable_logical_dev()
112 	nvt_select_logical_dev(nvt, ldev);  in nvt_enable_logical_dev()
113 	nvt_cr_write(nvt, LOGICAL_DEV_ENABLE, CR_LOGICAL_DEV_EN);  in nvt_enable_logical_dev()
114 	nvt_efm_disable(nvt);  in nvt_enable_logical_dev()
118 static inline void nvt_disable_logical_dev(struct nvt_dev *nvt, u8 ldev)  in nvt_disable_logical_dev()  argument
120 	nvt_efm_enable(nvt);  in nvt_disable_logical_dev()
121 	nvt_select_logical_dev(nvt, ldev);  in nvt_disable_logical_dev()
122 	nvt_cr_write(nvt, LOGICAL_DEV_DISABLE, CR_LOGICAL_DEV_EN);  in nvt_disable_logical_dev()
123 	nvt_efm_disable(nvt);  in nvt_disable_logical_dev()
127 static inline void nvt_cir_reg_write(struct nvt_dev *nvt, u8 val, u8 offset)  in nvt_cir_reg_write()  argument
129 	outb(val, nvt->cir_addr + offset);  in nvt_cir_reg_write()
133 static u8 nvt_cir_reg_read(struct nvt_dev *nvt, u8 offset)  in nvt_cir_reg_read()  argument
135 	return inb(nvt->cir_addr + offset);  in nvt_cir_reg_read()
139 static inline void nvt_cir_wake_reg_write(struct nvt_dev *nvt,  in nvt_cir_wake_reg_write()  argument
142 	outb(val, nvt->cir_wake_addr + offset);  in nvt_cir_wake_reg_write()
146 static u8 nvt_cir_wake_reg_read(struct nvt_dev *nvt, u8 offset)  in nvt_cir_wake_reg_read()  argument
148 	return inb(nvt->cir_wake_addr + offset);  in nvt_cir_wake_reg_read()
152 static void nvt_set_ioaddr(struct nvt_dev *nvt, unsigned long *ioaddr)  in nvt_set_ioaddr()  argument
156 	old_addr = nvt_cr_read(nvt, CR_CIR_BASE_ADDR_HI) << 8;  in nvt_set_ioaddr()
157 	old_addr |= nvt_cr_read(nvt, CR_CIR_BASE_ADDR_LO);  in nvt_set_ioaddr()
162 		nvt_cr_write(nvt, *ioaddr >> 8, CR_CIR_BASE_ADDR_HI);  in nvt_set_ioaddr()
163 		nvt_cr_write(nvt, *ioaddr & 0xff, CR_CIR_BASE_ADDR_LO);  in nvt_set_ioaddr()
171 	struct nvt_dev *nvt = dev->priv;  in nvt_write_wakeup_codes()  local
178 	spin_lock_irqsave(&nvt->lock, flags);  in nvt_write_wakeup_codes()
180 	nvt_clear_cir_wake_fifo(nvt);  in nvt_write_wakeup_codes()
181 	nvt_cir_wake_reg_write(nvt, count, CIR_WAKE_FIFO_CMP_DEEP);  in nvt_write_wakeup_codes()
182 	nvt_cir_wake_reg_write(nvt, tolerance, CIR_WAKE_FIFO_CMP_TOL);  in nvt_write_wakeup_codes()
184 	config = nvt_cir_wake_reg_read(nvt, CIR_WAKE_IRCON);  in nvt_write_wakeup_codes()
187 	nvt_cir_wake_reg_write(nvt, config | CIR_WAKE_IRCON_MODE1,  in nvt_write_wakeup_codes()
196 		nvt_cir_wake_reg_write(nvt, wbuf[i], CIR_WAKE_WR_FIFO_DATA);  in nvt_write_wakeup_codes()
198 	nvt_cir_wake_reg_write(nvt, config, CIR_WAKE_IRCON);  in nvt_write_wakeup_codes()
200 	spin_unlock_irqrestore(&nvt->lock, flags);  in nvt_write_wakeup_codes()
208 	struct nvt_dev *nvt = rc_dev->priv;  in wakeup_data_show()  local
214 	spin_lock_irqsave(&nvt->lock, flags);  in wakeup_data_show()
216 	fifo_len = nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFO_COUNT);  in wakeup_data_show()
220 	while (nvt_cir_wake_reg_read(nvt, CIR_WAKE_RD_FIFO_ONLY_IDX))  in wakeup_data_show()
221 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_RD_FIFO_ONLY);  in wakeup_data_show()
224 		duration = nvt_cir_wake_reg_read(nvt, CIR_WAKE_RD_FIFO_ONLY);  in wakeup_data_show()
231 	spin_unlock_irqrestore(&nvt->lock, flags);  in wakeup_data_show()
280 static void cir_dump_regs(struct nvt_dev *nvt)  in cir_dump_regs()  argument
282 	nvt_efm_enable(nvt);  in cir_dump_regs()
283 	nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR);  in cir_dump_regs()
287 		nvt_cr_read(nvt, CR_LOGICAL_DEV_EN));  in cir_dump_regs()
289 		(nvt_cr_read(nvt, CR_CIR_BASE_ADDR_HI) << 8) |  in cir_dump_regs()
290 		nvt_cr_read(nvt, CR_CIR_BASE_ADDR_LO));  in cir_dump_regs()
292 		nvt_cr_read(nvt, CR_CIR_IRQ_RSRC));  in cir_dump_regs()
294 	nvt_efm_disable(nvt);  in cir_dump_regs()
297 	pr_info(" * IRCON:     0x%x\n", nvt_cir_reg_read(nvt, CIR_IRCON));  in cir_dump_regs()
298 	pr_info(" * IRSTS:     0x%x\n", nvt_cir_reg_read(nvt, CIR_IRSTS));  in cir_dump_regs()
299 	pr_info(" * IREN:      0x%x\n", nvt_cir_reg_read(nvt, CIR_IREN));  in cir_dump_regs()
300 	pr_info(" * RXFCONT:   0x%x\n", nvt_cir_reg_read(nvt, CIR_RXFCONT));  in cir_dump_regs()
301 	pr_info(" * CP:        0x%x\n", nvt_cir_reg_read(nvt, CIR_CP));  in cir_dump_regs()
302 	pr_info(" * CC:        0x%x\n", nvt_cir_reg_read(nvt, CIR_CC));  in cir_dump_regs()
303 	pr_info(" * SLCH:      0x%x\n", nvt_cir_reg_read(nvt, CIR_SLCH));  in cir_dump_regs()
304 	pr_info(" * SLCL:      0x%x\n", nvt_cir_reg_read(nvt, CIR_SLCL));  in cir_dump_regs()
305 	pr_info(" * FIFOCON:   0x%x\n", nvt_cir_reg_read(nvt, CIR_FIFOCON));  in cir_dump_regs()
306 	pr_info(" * IRFIFOSTS: 0x%x\n", nvt_cir_reg_read(nvt, CIR_IRFIFOSTS));  in cir_dump_regs()
307 	pr_info(" * SRXFIFO:   0x%x\n", nvt_cir_reg_read(nvt, CIR_SRXFIFO));  in cir_dump_regs()
308 	pr_info(" * TXFCONT:   0x%x\n", nvt_cir_reg_read(nvt, CIR_TXFCONT));  in cir_dump_regs()
309 	pr_info(" * STXFIFO:   0x%x\n", nvt_cir_reg_read(nvt, CIR_STXFIFO));  in cir_dump_regs()
310 	pr_info(" * FCCH:      0x%x\n", nvt_cir_reg_read(nvt, CIR_FCCH));  in cir_dump_regs()
311 	pr_info(" * FCCL:      0x%x\n", nvt_cir_reg_read(nvt, CIR_FCCL));  in cir_dump_regs()
312 	pr_info(" * IRFSM:     0x%x\n", nvt_cir_reg_read(nvt, CIR_IRFSM));  in cir_dump_regs()
316 static void cir_wake_dump_regs(struct nvt_dev *nvt)  in cir_wake_dump_regs()  argument
320 	nvt_efm_enable(nvt);  in cir_wake_dump_regs()
321 	nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR_WAKE);  in cir_wake_dump_regs()
326 		nvt_cr_read(nvt, CR_LOGICAL_DEV_EN));  in cir_wake_dump_regs()
328 		(nvt_cr_read(nvt, CR_CIR_BASE_ADDR_HI) << 8) |  in cir_wake_dump_regs()
329 		nvt_cr_read(nvt, CR_CIR_BASE_ADDR_LO));  in cir_wake_dump_regs()
331 		nvt_cr_read(nvt, CR_CIR_IRQ_RSRC));  in cir_wake_dump_regs()
333 	nvt_efm_disable(nvt);  in cir_wake_dump_regs()
337 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_IRCON));  in cir_wake_dump_regs()
339 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_IRSTS));  in cir_wake_dump_regs()
341 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_IREN));  in cir_wake_dump_regs()
343 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFO_CMP_DEEP));  in cir_wake_dump_regs()
345 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFO_CMP_TOL));  in cir_wake_dump_regs()
347 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFO_COUNT));  in cir_wake_dump_regs()
349 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_SLCH));  in cir_wake_dump_regs()
351 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_SLCL));  in cir_wake_dump_regs()
353 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFOCON));  in cir_wake_dump_regs()
355 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_SRXFSTS));  in cir_wake_dump_regs()
357 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_SAMPLE_RX_FIFO));  in cir_wake_dump_regs()
359 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_WR_FIFO_DATA));  in cir_wake_dump_regs()
361 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_RD_FIFO_ONLY));  in cir_wake_dump_regs()
363 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_RD_FIFO_ONLY_IDX));  in cir_wake_dump_regs()
365 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFO_IGNORE));  in cir_wake_dump_regs()
367 		nvt_cir_wake_reg_read(nvt, CIR_WAKE_IRFSM));  in cir_wake_dump_regs()
369 	fifo_len = nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFO_COUNT);  in cir_wake_dump_regs()
374 			nvt_cir_wake_reg_read(nvt, CIR_WAKE_RD_FIFO_ONLY));  in cir_wake_dump_regs()
378 static inline const char *nvt_find_chip(struct nvt_dev *nvt, int id)  in nvt_find_chip()  argument
384 			nvt->chip_ver = nvt_chips[i].chip_ver;  in nvt_find_chip()
393 static int nvt_hw_detect(struct nvt_dev *nvt)  in nvt_hw_detect()  argument
395 	struct device *dev = nvt_get_dev(nvt);  in nvt_hw_detect()
399 	nvt_efm_enable(nvt);  in nvt_hw_detect()
402 	nvt->chip_major = nvt_cr_read(nvt, CR_CHIP_ID_HI);  in nvt_hw_detect()
403 	if (nvt->chip_major == 0xff) {  in nvt_hw_detect()
404 		nvt_efm_disable(nvt);  in nvt_hw_detect()
405 		nvt->cr_efir = CR_EFIR2;  in nvt_hw_detect()
406 		nvt->cr_efdr = CR_EFDR2;  in nvt_hw_detect()
407 		nvt_efm_enable(nvt);  in nvt_hw_detect()
408 		nvt->chip_major = nvt_cr_read(nvt, CR_CHIP_ID_HI);  in nvt_hw_detect()
410 	nvt->chip_minor = nvt_cr_read(nvt, CR_CHIP_ID_LO);  in nvt_hw_detect()
412 	nvt_efm_disable(nvt);  in nvt_hw_detect()
414 	chip_id = nvt->chip_major << 8 | nvt->chip_minor;  in nvt_hw_detect()
420 	chip_name = nvt_find_chip(nvt, chip_id);  in nvt_hw_detect()
426 			 nvt->chip_major, nvt->chip_minor);  in nvt_hw_detect()
429 			 chip_name, nvt->chip_major, nvt->chip_minor);  in nvt_hw_detect()
434 static void nvt_cir_ldev_init(struct nvt_dev *nvt)  in nvt_cir_ldev_init()  argument
438 	if (is_w83667hg(nvt)) {  in nvt_cir_ldev_init()
449 	val = nvt_cr_read(nvt, psreg);  in nvt_cir_ldev_init()
452 	nvt_cr_write(nvt, val, psreg);  in nvt_cir_ldev_init()
455 	nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR);  in nvt_cir_ldev_init()
457 	nvt_set_ioaddr(nvt, &nvt->cir_addr);  in nvt_cir_ldev_init()
459 	nvt_cr_write(nvt, nvt->cir_irq, CR_CIR_IRQ_RSRC);  in nvt_cir_ldev_init()
462 		nvt->cir_addr, nvt->cir_irq);  in nvt_cir_ldev_init()
465 static void nvt_cir_wake_ldev_init(struct nvt_dev *nvt)  in nvt_cir_wake_ldev_init()  argument
468 	nvt_select_logical_dev(nvt, LOGICAL_DEV_ACPI);  in nvt_cir_wake_ldev_init()
469 	nvt_cr_write(nvt, LOGICAL_DEV_ENABLE, CR_LOGICAL_DEV_EN);  in nvt_cir_wake_ldev_init()
472 	nvt_set_reg_bit(nvt, CIR_WAKE_ENABLE_BIT, CR_ACPI_CIR_WAKE);  in nvt_cir_wake_ldev_init()
475 	nvt_set_reg_bit(nvt, PME_INTR_CIR_PASS_BIT, CR_ACPI_IRQ_EVENTS2);  in nvt_cir_wake_ldev_init()
478 	nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR_WAKE);  in nvt_cir_wake_ldev_init()
480 	nvt_set_ioaddr(nvt, &nvt->cir_wake_addr);  in nvt_cir_wake_ldev_init()
483 		nvt->cir_wake_addr);  in nvt_cir_wake_ldev_init()
487 static void nvt_clear_cir_fifo(struct nvt_dev *nvt)  in nvt_clear_cir_fifo()  argument
489 	u8 val = nvt_cir_reg_read(nvt, CIR_FIFOCON);  in nvt_clear_cir_fifo()
490 	nvt_cir_reg_write(nvt, val | CIR_FIFOCON_RXFIFOCLR, CIR_FIFOCON);  in nvt_clear_cir_fifo()
494 static void nvt_clear_cir_wake_fifo(struct nvt_dev *nvt)  in nvt_clear_cir_wake_fifo()  argument
498 	config = nvt_cir_wake_reg_read(nvt, CIR_WAKE_IRCON);  in nvt_clear_cir_wake_fifo()
501 	nvt_cir_wake_reg_write(nvt, config & ~CIR_WAKE_IRCON_MODE0,  in nvt_clear_cir_wake_fifo()
504 	val = nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFOCON);  in nvt_clear_cir_wake_fifo()
505 	nvt_cir_wake_reg_write(nvt, val | CIR_WAKE_FIFOCON_RXFIFOCLR,  in nvt_clear_cir_wake_fifo()
508 	nvt_cir_wake_reg_write(nvt, config, CIR_WAKE_IRCON);  in nvt_clear_cir_wake_fifo()
512 static void nvt_clear_tx_fifo(struct nvt_dev *nvt)  in nvt_clear_tx_fifo()  argument
516 	val = nvt_cir_reg_read(nvt, CIR_FIFOCON);  in nvt_clear_tx_fifo()
517 	nvt_cir_reg_write(nvt, val | CIR_FIFOCON_TXFIFOCLR, CIR_FIFOCON);  in nvt_clear_tx_fifo()
521 static void nvt_set_cir_iren(struct nvt_dev *nvt)  in nvt_set_cir_iren()  argument
526 	nvt_cir_reg_write(nvt, iren, CIR_IREN);  in nvt_set_cir_iren()
529 static void nvt_cir_regs_init(struct nvt_dev *nvt)  in nvt_cir_regs_init()  argument
531 	nvt_enable_logical_dev(nvt, LOGICAL_DEV_CIR);  in nvt_cir_regs_init()
534 	nvt_cir_reg_write(nvt, CIR_RX_LIMIT_COUNT >> 8, CIR_SLCH);  in nvt_cir_regs_init()
535 	nvt_cir_reg_write(nvt, CIR_RX_LIMIT_COUNT & 0xff, CIR_SLCL);  in nvt_cir_regs_init()
538 	nvt_cir_reg_write(nvt, CIR_FIFOCON_TX_TRIGGER_LEV |  in nvt_cir_regs_init()
542 	nvt_clear_cir_fifo(nvt);  in nvt_cir_regs_init()
543 	nvt_clear_tx_fifo(nvt);  in nvt_cir_regs_init()
545 	nvt_disable_logical_dev(nvt, LOGICAL_DEV_CIR);  in nvt_cir_regs_init()
548 static void nvt_cir_wake_regs_init(struct nvt_dev *nvt)  in nvt_cir_wake_regs_init()  argument
550 	nvt_enable_logical_dev(nvt, LOGICAL_DEV_CIR_WAKE);  in nvt_cir_wake_regs_init()
556 	nvt_cir_wake_reg_write(nvt, CIR_WAKE_IRCON_MODE0 |  in nvt_cir_wake_regs_init()
562 	nvt_cir_wake_reg_write(nvt, 0xff, CIR_WAKE_IRSTS);  in nvt_cir_wake_regs_init()
565 static void nvt_enable_wake(struct nvt_dev *nvt)  in nvt_enable_wake()  argument
569 	nvt_efm_enable(nvt);  in nvt_enable_wake()
571 	nvt_select_logical_dev(nvt, LOGICAL_DEV_ACPI);  in nvt_enable_wake()
572 	nvt_set_reg_bit(nvt, CIR_WAKE_ENABLE_BIT, CR_ACPI_CIR_WAKE);  in nvt_enable_wake()
573 	nvt_set_reg_bit(nvt, PME_INTR_CIR_PASS_BIT, CR_ACPI_IRQ_EVENTS2);  in nvt_enable_wake()
575 	nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR_WAKE);  in nvt_enable_wake()
576 	nvt_cr_write(nvt, LOGICAL_DEV_ENABLE, CR_LOGICAL_DEV_EN);  in nvt_enable_wake()
578 	nvt_efm_disable(nvt);  in nvt_enable_wake()
580 	spin_lock_irqsave(&nvt->lock, flags);  in nvt_enable_wake()
582 	nvt_cir_wake_reg_write(nvt, CIR_WAKE_IRCON_MODE0 | CIR_WAKE_IRCON_RXEN |  in nvt_enable_wake()
586 	nvt_cir_wake_reg_write(nvt, 0xff, CIR_WAKE_IRSTS);  in nvt_enable_wake()
587 	nvt_cir_wake_reg_write(nvt, 0, CIR_WAKE_IREN);  in nvt_enable_wake()
589 	spin_unlock_irqrestore(&nvt->lock, flags);  in nvt_enable_wake()
594 static u32 nvt_rx_carrier_detect(struct nvt_dev *nvt)
599 	count = nvt_cir_reg_read(nvt, CIR_FCCL) |
600 		nvt_cir_reg_read(nvt, CIR_FCCH) << 8;
602 	for (i = 0; i < nvt->pkts; i++) {
603 		if (nvt->buf[i] & BUF_PULSE_BIT)
604 			duration += nvt->buf[i] & BUF_LEN_MASK;
610 		dev_notice(nvt_get_dev(nvt),
684 static void nvt_dump_rx_buf(struct nvt_dev *nvt)  in nvt_dump_rx_buf()  argument
688 	printk(KERN_DEBUG "%s (len %d): ", __func__, nvt->pkts);  in nvt_dump_rx_buf()
689 	for (i = 0; (i < nvt->pkts) && (i < RX_BUF_LEN); i++)  in nvt_dump_rx_buf()
690 		printk(KERN_CONT "0x%02x ", nvt->buf[i]);  in nvt_dump_rx_buf()
706 static void nvt_process_rx_ir_data(struct nvt_dev *nvt)  in nvt_process_rx_ir_data()  argument
715 		nvt_dump_rx_buf(nvt);  in nvt_process_rx_ir_data()
717 	nvt_dbg_verbose("Processing buffer of len %d", nvt->pkts);  in nvt_process_rx_ir_data()
719 	for (i = 0; i < nvt->pkts; i++) {  in nvt_process_rx_ir_data()
720 		sample = nvt->buf[i];  in nvt_process_rx_ir_data()
728 		ir_raw_event_store_with_filter(nvt->rdev, &rawir);  in nvt_process_rx_ir_data()
731 	nvt->pkts = 0;  in nvt_process_rx_ir_data()
734 	ir_raw_event_handle(nvt->rdev);  in nvt_process_rx_ir_data()
739 static void nvt_handle_rx_fifo_overrun(struct nvt_dev *nvt)  in nvt_handle_rx_fifo_overrun()  argument
741 	dev_warn(nvt_get_dev(nvt), "RX FIFO overrun detected, flushing data!");  in nvt_handle_rx_fifo_overrun()
743 	nvt->pkts = 0;  in nvt_handle_rx_fifo_overrun()
744 	nvt_clear_cir_fifo(nvt);  in nvt_handle_rx_fifo_overrun()
745 	ir_raw_event_overflow(nvt->rdev);  in nvt_handle_rx_fifo_overrun()
749 static void nvt_get_rx_ir_data(struct nvt_dev *nvt)  in nvt_get_rx_ir_data()  argument
755 	fifocount = nvt_cir_reg_read(nvt, CIR_RXFCONT);  in nvt_get_rx_ir_data()
761 		nvt->buf[i] = nvt_cir_reg_read(nvt, CIR_SRXFIFO);  in nvt_get_rx_ir_data()
763 	nvt->pkts = fifocount;  in nvt_get_rx_ir_data()
764 	nvt_dbg("%s: pkts now %d", __func__, nvt->pkts);  in nvt_get_rx_ir_data()
766 	nvt_process_rx_ir_data(nvt);  in nvt_get_rx_ir_data()
789 	struct nvt_dev *nvt = data;  in nvt_cir_isr()  local
794 	spin_lock(&nvt->lock);  in nvt_cir_isr()
809 	status = nvt_cir_reg_read(nvt, CIR_IRSTS);  in nvt_cir_isr()
810 	iren = nvt_cir_reg_read(nvt, CIR_IREN);  in nvt_cir_isr()
816 		spin_unlock(&nvt->lock);  in nvt_cir_isr()
825 		spin_unlock(&nvt->lock);  in nvt_cir_isr()
831 	nvt_cir_reg_write(nvt, status, CIR_IRSTS);  in nvt_cir_isr()
832 	nvt_cir_reg_write(nvt, 0, CIR_IRSTS);  in nvt_cir_isr()
837 		nvt_handle_rx_fifo_overrun(nvt);  in nvt_cir_isr()
839 		nvt_get_rx_ir_data(nvt);  in nvt_cir_isr()
841 	spin_unlock(&nvt->lock);  in nvt_cir_isr()
847 static void nvt_enable_cir(struct nvt_dev *nvt)  in nvt_enable_cir()  argument
852 	nvt_enable_logical_dev(nvt, LOGICAL_DEV_CIR);  in nvt_enable_cir()
854 	spin_lock_irqsave(&nvt->lock, flags);  in nvt_enable_cir()
860 	nvt_cir_reg_write(nvt, CIR_IRCON_TXEN | CIR_IRCON_RXEN |  in nvt_enable_cir()
865 	nvt_cir_reg_write(nvt, 0xff, CIR_IRSTS);  in nvt_enable_cir()
868 	nvt_set_cir_iren(nvt);  in nvt_enable_cir()
870 	spin_unlock_irqrestore(&nvt->lock, flags);  in nvt_enable_cir()
873 static void nvt_disable_cir(struct nvt_dev *nvt)  in nvt_disable_cir()  argument
877 	spin_lock_irqsave(&nvt->lock, flags);  in nvt_disable_cir()
880 	nvt_cir_reg_write(nvt, 0, CIR_IREN);  in nvt_disable_cir()
883 	nvt_cir_reg_write(nvt, 0xff, CIR_IRSTS);  in nvt_disable_cir()
886 	nvt_cir_reg_write(nvt, 0, CIR_IRCON);  in nvt_disable_cir()
889 	nvt_clear_cir_fifo(nvt);  in nvt_disable_cir()
890 	nvt_clear_tx_fifo(nvt);  in nvt_disable_cir()
892 	spin_unlock_irqrestore(&nvt->lock, flags);  in nvt_disable_cir()
895 	nvt_disable_logical_dev(nvt, LOGICAL_DEV_CIR);  in nvt_disable_cir()
900 	struct nvt_dev *nvt = dev->priv;  in nvt_open()  local
902 	nvt_enable_cir(nvt);  in nvt_open()
909 	struct nvt_dev *nvt = dev->priv;  in nvt_close()  local
911 	nvt_disable_cir(nvt);  in nvt_close()
917 	struct nvt_dev *nvt;  in nvt_probe()  local
921 	nvt = devm_kzalloc(&pdev->dev, sizeof(struct nvt_dev), GFP_KERNEL);  in nvt_probe()
922 	if (!nvt)  in nvt_probe()
926 	nvt->rdev = devm_rc_allocate_device(&pdev->dev, RC_DRIVER_IR_RAW);  in nvt_probe()
927 	if (!nvt->rdev)  in nvt_probe()
929 	rdev = nvt->rdev;  in nvt_probe()
956 	nvt->cir_addr = pnp_port_start(pdev, 0);  in nvt_probe()
957 	nvt->cir_irq  = pnp_irq(pdev, 0);  in nvt_probe()
959 	nvt->cir_wake_addr = pnp_port_start(pdev, 1);  in nvt_probe()
961 	nvt->cr_efir = CR_EFIR;  in nvt_probe()
962 	nvt->cr_efdr = CR_EFDR;  in nvt_probe()
964 	spin_lock_init(&nvt->lock);  in nvt_probe()
966 	pnp_set_drvdata(pdev, nvt);  in nvt_probe()
968 	ret = nvt_hw_detect(nvt);  in nvt_probe()
973 	nvt_efm_enable(nvt);  in nvt_probe()
974 	nvt_cir_ldev_init(nvt);  in nvt_probe()
975 	nvt_cir_wake_ldev_init(nvt);  in nvt_probe()
976 	nvt_efm_disable(nvt);  in nvt_probe()
982 	nvt_cir_regs_init(nvt);  in nvt_probe()
983 	nvt_cir_wake_regs_init(nvt);  in nvt_probe()
986 	rdev->priv = nvt;  in nvt_probe()
997 	rdev->input_id.product = nvt->chip_major;  in nvt_probe()
998 	rdev->input_id.version = nvt->chip_minor;  in nvt_probe()
1013 	if (!devm_request_region(&pdev->dev, nvt->cir_addr,  in nvt_probe()
1017 	ret = devm_request_irq(&pdev->dev, nvt->cir_irq, nvt_cir_isr,  in nvt_probe()
1018 			       IRQF_SHARED, NVT_DRIVER_NAME, nvt);  in nvt_probe()
1022 	if (!devm_request_region(&pdev->dev, nvt->cir_wake_addr,  in nvt_probe()
1034 		cir_dump_regs(nvt);  in nvt_probe()
1035 		cir_wake_dump_regs(nvt);  in nvt_probe()
1043 	struct nvt_dev *nvt = pnp_get_drvdata(pdev);  in nvt_remove()  local
1045 	device_remove_file(&nvt->rdev->dev, &dev_attr_wakeup_data);  in nvt_remove()
1047 	nvt_disable_cir(nvt);  in nvt_remove()
1050 	nvt_enable_wake(nvt);  in nvt_remove()
1055 	struct nvt_dev *nvt = pnp_get_drvdata(pdev);  in nvt_suspend()  local
1059 	mutex_lock(&nvt->rdev->lock);  in nvt_suspend()
1060 	if (nvt->rdev->users)  in nvt_suspend()
1061 		nvt_disable_cir(nvt);  in nvt_suspend()
1062 	mutex_unlock(&nvt->rdev->lock);  in nvt_suspend()
1065 	nvt_enable_wake(nvt);  in nvt_suspend()
1072 	struct nvt_dev *nvt = pnp_get_drvdata(pdev);  in nvt_resume()  local
1076 	nvt_cir_regs_init(nvt);  in nvt_resume()
1077 	nvt_cir_wake_regs_init(nvt);  in nvt_resume()
1079 	mutex_lock(&nvt->rdev->lock);  in nvt_resume()
1080 	if (nvt->rdev->users)  in nvt_resume()
1081 		nvt_enable_cir(nvt);  in nvt_resume()
1082 	mutex_unlock(&nvt->rdev->lock);  in nvt_resume()
1089 	struct nvt_dev *nvt = pnp_get_drvdata(pdev);  in nvt_shutdown()  local
1091 	nvt_enable_wake(nvt);  in nvt_shutdown()