33 static inline u32 deinterlace_read(struct deinterlace_dev *dev, u32 reg)  in deinterlace_read()  argument
35 	return readl(dev->base + reg);  in deinterlace_read()
38 static inline void deinterlace_write(struct deinterlace_dev *dev,  in deinterlace_write()  argument
41 	writel(value, dev->base + reg);  in deinterlace_write()
44 static inline void deinterlace_set_bits(struct deinterlace_dev *dev,  in deinterlace_set_bits()  argument
47 	writel(readl(dev->base + reg) | bits, dev->base + reg);  in deinterlace_set_bits()
50 static inline void deinterlace_clr_set_bits(struct deinterlace_dev *dev,  in deinterlace_clr_set_bits()  argument
53 	u32 val = readl(dev->base + reg);  in deinterlace_clr_set_bits()
58 	writel(val, dev->base + reg);  in deinterlace_clr_set_bits()
64 	struct deinterlace_dev *dev = ctx->dev;  in deinterlace_device_run()  local
76 	deinterlace_write(dev, DEINTERLACE_MOD_ENABLE,  in deinterlace_device_run()
80 		deinterlace_write(dev, DEINTERLACE_TILE_FLAG0,  in deinterlace_device_run()
82 		deinterlace_write(dev, DEINTERLACE_TILE_FLAG1,  in deinterlace_device_run()
85 		deinterlace_write(dev, DEINTERLACE_TILE_FLAG0,  in deinterlace_device_run()
87 		deinterlace_write(dev, DEINTERLACE_TILE_FLAG1,  in deinterlace_device_run()
90 	deinterlace_write(dev, DEINTERLACE_FLAG_LINE_STRIDE, 0x200);  in deinterlace_device_run()
98 	deinterlace_write(dev, DEINTERLACE_BUF_ADDR0, addr);  in deinterlace_device_run()
99 	deinterlace_write(dev, DEINTERLACE_BUF_ADDR1, addr + size);  in deinterlace_device_run()
100 	deinterlace_write(dev, DEINTERLACE_BUF_ADDR2, 0);  in deinterlace_device_run()
102 	deinterlace_write(dev, DEINTERLACE_LINE_STRIDE0, stride);  in deinterlace_device_run()
103 	deinterlace_write(dev, DEINTERLACE_LINE_STRIDE1, stride);  in deinterlace_device_run()
105 	deinterlace_write(dev, DEINTERLACE_CH0_IN_SIZE,  in deinterlace_device_run()
107 	deinterlace_write(dev, DEINTERLACE_CH1_IN_SIZE,  in deinterlace_device_run()
120 	deinterlace_write(dev, DEINTERLACE_IN_FMT, val);  in deinterlace_device_run()
125 	deinterlace_write(dev, DEINTERLACE_PRELUMA, addr);  in deinterlace_device_run()
126 	deinterlace_write(dev, DEINTERLACE_PRECHROMA, addr + size);  in deinterlace_device_run()
137 	deinterlace_write(dev, DEINTERLACE_OUT_FMT, val);  in deinterlace_device_run()
144 	deinterlace_write(dev, DEINTERLACE_CH0_OUT_SIZE,  in deinterlace_device_run()
146 	deinterlace_write(dev, DEINTERLACE_CH1_OUT_SIZE,  in deinterlace_device_run()
149 	deinterlace_write(dev, DEINTERLACE_WB_LINE_STRIDE0, stride);  in deinterlace_device_run()
150 	deinterlace_write(dev, DEINTERLACE_WB_LINE_STRIDE1, stride);  in deinterlace_device_run()
153 	deinterlace_write(dev, DEINTERLACE_WB_ADDR0, addr);  in deinterlace_device_run()
154 	deinterlace_write(dev, DEINTERLACE_WB_ADDR1, addr + size);  in deinterlace_device_run()
155 	deinterlace_write(dev, DEINTERLACE_WB_ADDR2, 0);  in deinterlace_device_run()
159 	deinterlace_write(dev, DEINTERLACE_CH0_HORZ_FACT, hstep);  in deinterlace_device_run()
160 	deinterlace_write(dev, DEINTERLACE_CH0_VERT_FACT, vstep);  in deinterlace_device_run()
161 	deinterlace_write(dev, DEINTERLACE_CH1_HORZ_FACT, hstep);  in deinterlace_device_run()
162 	deinterlace_write(dev, DEINTERLACE_CH1_VERT_FACT, vstep);  in deinterlace_device_run()
165 	deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,  in deinterlace_device_run()
167 	readl_poll_timeout(dev->base + DEINTERLACE_STATUS, val,  in deinterlace_device_run()
171 		deinterlace_write(dev, DEINTERLACE_CH0_HORZ_COEF0 + i * 4,  in deinterlace_device_run()
173 		deinterlace_write(dev, DEINTERLACE_CH0_VERT_COEF + i * 4,  in deinterlace_device_run()
175 		deinterlace_write(dev, DEINTERLACE_CH1_HORZ_COEF0 + i * 4,  in deinterlace_device_run()
177 		deinterlace_write(dev, DEINTERLACE_CH1_VERT_COEF + i * 4,  in deinterlace_device_run()
181 	deinterlace_clr_set_bits(dev, DEINTERLACE_FRM_CTRL,  in deinterlace_device_run()
184 	deinterlace_clr_set_bits(dev, DEINTERLACE_FIELD_CTRL,  in deinterlace_device_run()
188 	deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,  in deinterlace_device_run()
191 	deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,  in deinterlace_device_run()
194 	deinterlace_set_bits(dev, DEINTERLACE_INT_ENABLE,  in deinterlace_device_run()
197 	deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,  in deinterlace_device_run()
219 	struct deinterlace_dev *dev = data;  in deinterlace_irq()  local
225 	ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);  in deinterlace_irq()
227 		v4l2_err(&dev->v4l2_dev,  in deinterlace_irq()
232 	val = deinterlace_read(dev, DEINTERLACE_INT_STATUS);  in deinterlace_irq()
236 	deinterlace_write(dev, DEINTERLACE_INT_ENABLE, 0);  in deinterlace_irq()
237 	deinterlace_set_bits(dev, DEINTERLACE_INT_STATUS,  in deinterlace_irq()
239 	deinterlace_write(dev, DEINTERLACE_MOD_ENABLE, 0);  in deinterlace_irq()
240 	deinterlace_clr_set_bits(dev, DEINTERLACE_FRM_CTRL,  in deinterlace_irq()
243 	val = deinterlace_read(dev, DEINTERLACE_STATUS);  in deinterlace_irq()
260 		v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);  in deinterlace_irq()
269 static void deinterlace_init(struct deinterlace_dev *dev)  in deinterlace_init()  argument
273 	deinterlace_write(dev, DEINTERLACE_BYPASS,  in deinterlace_init()
275 	deinterlace_write(dev, DEINTERLACE_WB_LINE_STRIDE_CTRL,  in deinterlace_init()
277 	deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,  in deinterlace_init()
279 	deinterlace_write(dev, DEINTERLACE_AGTH_SEL,  in deinterlace_init()
286 	deinterlace_write(dev, DEINTERLACE_CTRL, val);  in deinterlace_init()
288 	deinterlace_clr_set_bits(dev, DEINTERLACE_LUMA_TH,  in deinterlace_init()
292 	deinterlace_clr_set_bits(dev, DEINTERLACE_SPAT_COMP,  in deinterlace_init()
296 	deinterlace_clr_set_bits(dev, DEINTERLACE_TEMP_DIFF,  in deinterlace_init()
303 	deinterlace_write(dev, DEINTERLACE_DIAG_INTP, val);  in deinterlace_init()
305 	deinterlace_clr_set_bits(dev, DEINTERLACE_CHROMA_DIFF,  in deinterlace_init()
588 	struct device *dev = ctx->dev->dev;  in deinterlace_start_streaming()  local
592 		ret = pm_runtime_resume_and_get(dev);  in deinterlace_start_streaming()
594 			dev_err(dev, "Failed to enable module\n");  in deinterlace_start_streaming()
606 		ctx->flag1_buf = dma_alloc_coherent(dev, FLAG_SIZE,  in deinterlace_start_streaming()
615 		ctx->flag2_buf = dma_alloc_coherent(dev, FLAG_SIZE,  in deinterlace_start_streaming()
628 	dma_free_coherent(dev, FLAG_SIZE, ctx->flag1_buf,  in deinterlace_start_streaming()
631 	pm_runtime_put(dev);  in deinterlace_start_streaming()
643 		struct device *dev = ctx->dev->dev;  in deinterlace_stop_streaming()  local
645 		dma_free_coherent(dev, FLAG_SIZE, ctx->flag1_buf,  in deinterlace_stop_streaming()
647 		dma_free_coherent(dev, FLAG_SIZE, ctx->flag2_buf,  in deinterlace_stop_streaming()
650 		pm_runtime_put(dev);  in deinterlace_stop_streaming()
680 	src_vq->lock = &ctx->dev->dev_mutex;  in deinterlace_queue_init()
681 	src_vq->dev = ctx->dev->dev;  in deinterlace_queue_init()
695 	dst_vq->lock = &ctx->dev->dev_mutex;  in deinterlace_queue_init()
696 	dst_vq->dev = ctx->dev->dev;  in deinterlace_queue_init()
707 	struct deinterlace_dev *dev = video_drvdata(file);  in deinterlace_open()  local
711 	if (mutex_lock_interruptible(&dev->dev_mutex))  in deinterlace_open()
716 		mutex_unlock(&dev->dev_mutex);  in deinterlace_open()
736 	ctx->dev = dev;  in deinterlace_open()
738 	ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,  in deinterlace_open()
747 	mutex_unlock(&dev->dev_mutex);  in deinterlace_open()
753 	mutex_unlock(&dev->dev_mutex);  in deinterlace_open()
760 	struct deinterlace_dev *dev = video_drvdata(file);  in deinterlace_release()  local
764 	mutex_lock(&dev->dev_mutex);  in deinterlace_release()
772 	mutex_unlock(&dev->dev_mutex);  in deinterlace_release()
804 	struct deinterlace_dev *dev;  in deinterlace_probe()  local
808 	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);  in deinterlace_probe()
809 	if (!dev)  in deinterlace_probe()
812 	dev->vfd = deinterlace_video_device;  in deinterlace_probe()
813 	dev->dev = &pdev->dev;  in deinterlace_probe()
819 	ret = devm_request_irq(dev->dev, irq, deinterlace_irq,  in deinterlace_probe()
820 			       0, dev_name(dev->dev), dev);  in deinterlace_probe()
822 		dev_err(dev->dev, "Failed to request IRQ\n");  in deinterlace_probe()
827 	dev->base = devm_platform_ioremap_resource(pdev, 0);  in deinterlace_probe()
828 	if (IS_ERR(dev->base))  in deinterlace_probe()
829 		return PTR_ERR(dev->base);  in deinterlace_probe()
831 	dev->bus_clk = devm_clk_get(dev->dev, "bus");  in deinterlace_probe()
832 	if (IS_ERR(dev->bus_clk)) {  in deinterlace_probe()
833 		dev_err(dev->dev, "Failed to get bus clock\n");  in deinterlace_probe()
835 		return PTR_ERR(dev->bus_clk);  in deinterlace_probe()
838 	dev->mod_clk = devm_clk_get(dev->dev, "mod");  in deinterlace_probe()
839 	if (IS_ERR(dev->mod_clk)) {  in deinterlace_probe()
840 		dev_err(dev->dev, "Failed to get mod clock\n");  in deinterlace_probe()
842 		return PTR_ERR(dev->mod_clk);  in deinterlace_probe()
845 	dev->ram_clk = devm_clk_get(dev->dev, "ram");  in deinterlace_probe()
846 	if (IS_ERR(dev->ram_clk)) {  in deinterlace_probe()
847 		dev_err(dev->dev, "Failed to get ram clock\n");  in deinterlace_probe()
849 		return PTR_ERR(dev->ram_clk);  in deinterlace_probe()
852 	dev->rstc = devm_reset_control_get(dev->dev, NULL);  in deinterlace_probe()
853 	if (IS_ERR(dev->rstc)) {  in deinterlace_probe()
854 		dev_err(dev->dev, "Failed to get reset control\n");  in deinterlace_probe()
856 		return PTR_ERR(dev->rstc);  in deinterlace_probe()
859 	mutex_init(&dev->dev_mutex);  in deinterlace_probe()
861 	ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);  in deinterlace_probe()
863 		dev_err(dev->dev, "Failed to register V4L2 device\n");  in deinterlace_probe()
868 	vfd = &dev->vfd;  in deinterlace_probe()
869 	vfd->lock = &dev->dev_mutex;  in deinterlace_probe()
870 	vfd->v4l2_dev = &dev->v4l2_dev;  in deinterlace_probe()
874 	video_set_drvdata(vfd, dev);  in deinterlace_probe()
878 		v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");  in deinterlace_probe()
883 	v4l2_info(&dev->v4l2_dev,  in deinterlace_probe()
886 	dev->m2m_dev = v4l2_m2m_init(&deinterlace_m2m_ops);  in deinterlace_probe()
887 	if (IS_ERR(dev->m2m_dev)) {  in deinterlace_probe()
888 		v4l2_err(&dev->v4l2_dev,  in deinterlace_probe()
890 		ret = PTR_ERR(dev->m2m_dev);  in deinterlace_probe()
895 	platform_set_drvdata(pdev, dev);  in deinterlace_probe()
897 	pm_runtime_enable(dev->dev);  in deinterlace_probe()
902 	video_unregister_device(&dev->vfd);  in deinterlace_probe()
904 	v4l2_device_unregister(&dev->v4l2_dev);  in deinterlace_probe()
911 	struct deinterlace_dev *dev = platform_get_drvdata(pdev);  in deinterlace_remove()  local
913 	v4l2_m2m_release(dev->m2m_dev);  in deinterlace_remove()
914 	video_unregister_device(&dev->vfd);  in deinterlace_remove()
915 	v4l2_device_unregister(&dev->v4l2_dev);  in deinterlace_remove()
917 	pm_runtime_force_suspend(&pdev->dev);  in deinterlace_remove()
922 	struct deinterlace_dev *dev = dev_get_drvdata(device);  in deinterlace_runtime_resume()  local
925 	ret = clk_set_rate_exclusive(dev->mod_clk, 300000000);  in deinterlace_runtime_resume()
927 		dev_err(dev->dev, "Failed to set exclusive mod clock rate\n");  in deinterlace_runtime_resume()
932 	ret = reset_control_deassert(dev->rstc);  in deinterlace_runtime_resume()
934 		dev_err(dev->dev, "Failed to apply reset\n");  in deinterlace_runtime_resume()
939 	ret = clk_prepare_enable(dev->bus_clk);  in deinterlace_runtime_resume()
941 		dev_err(dev->dev, "Failed to enable bus clock\n");  in deinterlace_runtime_resume()
946 	ret = clk_prepare_enable(dev->mod_clk);  in deinterlace_runtime_resume()
948 		dev_err(dev->dev, "Failed to enable mod clock\n");  in deinterlace_runtime_resume()
953 	ret = clk_prepare_enable(dev->ram_clk);  in deinterlace_runtime_resume()
955 		dev_err(dev->dev, "Failed to enable ram clock\n");  in deinterlace_runtime_resume()
960 	deinterlace_init(dev);  in deinterlace_runtime_resume()
965 	clk_disable_unprepare(dev->mod_clk);  in deinterlace_runtime_resume()
967 	clk_disable_unprepare(dev->bus_clk);  in deinterlace_runtime_resume()
969 	reset_control_assert(dev->rstc);  in deinterlace_runtime_resume()
971 	clk_rate_exclusive_put(dev->mod_clk);  in deinterlace_runtime_resume()
978 	struct deinterlace_dev *dev = dev_get_drvdata(device);  in deinterlace_runtime_suspend()  local
980 	clk_disable_unprepare(dev->ram_clk);  in deinterlace_runtime_suspend()
981 	clk_disable_unprepare(dev->mod_clk);  in deinterlace_runtime_suspend()
982 	clk_disable_unprepare(dev->bus_clk);  in deinterlace_runtime_suspend()
984 	reset_control_assert(dev->rstc);  in deinterlace_runtime_suspend()
986 	clk_rate_exclusive_put(dev->mod_clk);  in deinterlace_runtime_suspend()