645 static void rcsi2_write16(struct rcar_csi2 *priv, unsigned int reg, u16 data)  in rcsi2_write16()  function
981 	rcsi2_write16(priv, V4H_CORE_DIG_RW_COMMON_REG(7), 0x0155);  in rcsi2_c_phy_setting_v4h()
982 	rcsi2_write16(priv, V4H_PPI_STARTUP_RW_COMMON_DPHY_REG(7), 0x0068);  in rcsi2_c_phy_setting_v4h()
983 	rcsi2_write16(priv, V4H_PPI_STARTUP_RW_COMMON_DPHY_REG(8), 0x0010);  in rcsi2_c_phy_setting_v4h()
985 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_0_RW_LP_0_REG, 0x463c);  in rcsi2_c_phy_setting_v4h()
986 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_LP_0_REG, 0x463c);  in rcsi2_c_phy_setting_v4h()
987 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_2_RW_LP_0_REG, 0x463c);  in rcsi2_c_phy_setting_v4h()
989 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_0_RW_HS_RX_REG(0), 0x00d5);  in rcsi2_c_phy_setting_v4h()
990 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_HS_RX_REG(0), 0x00d5);  in rcsi2_c_phy_setting_v4h()
991 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_2_RW_HS_RX_REG(0), 0x00d5);  in rcsi2_c_phy_setting_v4h()
993 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_0_RW_HS_RX_REG(1), 0x0013);  in rcsi2_c_phy_setting_v4h()
994 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_HS_RX_REG(1), 0x0013);  in rcsi2_c_phy_setting_v4h()
995 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_2_RW_HS_RX_REG(1), 0x0013);  in rcsi2_c_phy_setting_v4h()
997 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_0_RW_HS_RX_REG(5), 0x0013);  in rcsi2_c_phy_setting_v4h()
998 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_HS_RX_REG(5), 0x0013);  in rcsi2_c_phy_setting_v4h()
999 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_2_RW_HS_RX_REG(5), 0x0013);  in rcsi2_c_phy_setting_v4h()
1001 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_0_RW_HS_RX_REG(6), 0x000a);  in rcsi2_c_phy_setting_v4h()
1002 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_HS_RX_REG(6), 0x000a);  in rcsi2_c_phy_setting_v4h()
1003 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_2_RW_HS_RX_REG(6), 0x000a);  in rcsi2_c_phy_setting_v4h()
1005 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_0_RW_HS_RX_REG(2), conf->rx2);  in rcsi2_c_phy_setting_v4h()
1006 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_HS_RX_REG(2), conf->rx2);  in rcsi2_c_phy_setting_v4h()
1007 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_2_RW_HS_RX_REG(2), conf->rx2);  in rcsi2_c_phy_setting_v4h()
1009 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE0_CTRL_2_REG(2), 0x0001);  in rcsi2_c_phy_setting_v4h()
1010 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE1_CTRL_2_REG(2), 0);  in rcsi2_c_phy_setting_v4h()
1011 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE2_CTRL_2_REG(2), 0x0001);  in rcsi2_c_phy_setting_v4h()
1012 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE3_CTRL_2_REG(2), 0x0001);  in rcsi2_c_phy_setting_v4h()
1013 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE4_CTRL_2_REG(2), 0);  in rcsi2_c_phy_setting_v4h()
1015 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO0_REG(0), conf->trio0);  in rcsi2_c_phy_setting_v4h()
1016 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO1_REG(0), conf->trio0);  in rcsi2_c_phy_setting_v4h()
1017 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO2_REG(0), conf->trio0);  in rcsi2_c_phy_setting_v4h()
1019 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO0_REG(2), conf->trio2);  in rcsi2_c_phy_setting_v4h()
1020 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO1_REG(2), conf->trio2);  in rcsi2_c_phy_setting_v4h()
1021 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO2_REG(2), conf->trio2);  in rcsi2_c_phy_setting_v4h()
1023 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO0_REG(1), conf->trio1);  in rcsi2_c_phy_setting_v4h()
1024 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO1_REG(1), conf->trio1);  in rcsi2_c_phy_setting_v4h()
1025 	rcsi2_write16(priv, V4H_CORE_DIG_RW_TRIO2_REG(1), conf->trio1);  in rcsi2_c_phy_setting_v4h()
1032 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_CFG_0_REG, 0xf5);  in rcsi2_c_phy_setting_v4h()
1033 	rcsi2_write16(priv, V4H_CORE_DIG_CLANE_1_RW_HS_TX_6_REG, 0x5000);  in rcsi2_c_phy_setting_v4h()
1046 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE0_CTRL_2_REG(9), conf->lane29);  in rcsi2_c_phy_setting_v4h()
1047 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE0_CTRL_2_REG(7), conf->lane27);  in rcsi2_c_phy_setting_v4h()
1090 	rcsi2_write16(priv, V4H_CORE_DIG_ANACTRL_RW_COMMON_ANACTRL_REG(0), 0x1bfd);  in rcsi2_start_receiver_v4h()
1091 	rcsi2_write16(priv, V4H_PPI_STARTUP_RW_COMMON_STARTUP_1_1_REG, 0x0233);  in rcsi2_start_receiver_v4h()
1092 	rcsi2_write16(priv, V4H_PPI_STARTUP_RW_COMMON_DPHY_REG(6), 0x0027);  in rcsi2_start_receiver_v4h()
1093 	rcsi2_write16(priv, V4H_PPI_CALIBCTRL_RW_COMMON_BG_0_REG, 0x01f4);  in rcsi2_start_receiver_v4h()
1094 	rcsi2_write16(priv, V4H_PPI_RW_TERMCAL_CFG_0_REG, 0x0013);  in rcsi2_start_receiver_v4h()
1095 	rcsi2_write16(priv, V4H_PPI_RW_OFFSETCAL_CFG_0_REG, 0x0003);  in rcsi2_start_receiver_v4h()
1096 	rcsi2_write16(priv, V4H_PPI_RW_LPDCOCAL_TIMEBASE_REG, 0x004f);  in rcsi2_start_receiver_v4h()
1097 	rcsi2_write16(priv, V4H_PPI_RW_LPDCOCAL_NREF_REG, 0x0320);  in rcsi2_start_receiver_v4h()
1098 	rcsi2_write16(priv, V4H_PPI_RW_LPDCOCAL_NREF_RANGE_REG, 0x000f);  in rcsi2_start_receiver_v4h()
1099 	rcsi2_write16(priv, V4H_PPI_RW_LPDCOCAL_TWAIT_CONFIG_REG, 0xfe18);  in rcsi2_start_receiver_v4h()
1100 	rcsi2_write16(priv, V4H_PPI_RW_LPDCOCAL_VT_CONFIG_REG, 0x0c3c);  in rcsi2_start_receiver_v4h()
1101 	rcsi2_write16(priv, V4H_PPI_RW_LPDCOCAL_COARSE_CFG_REG, 0x0105);  in rcsi2_start_receiver_v4h()
1102 	rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_CB_CTRL_2_REG(6), 0x1000);  in rcsi2_start_receiver_v4h()
1103 	rcsi2_write16(priv, V4H_PPI_RW_COMMON_CFG_REG, 0x0003);  in rcsi2_start_receiver_v4h()