55 	u8 subsys_id = ctx->comp->subsys_id;  in init_rdma()  local
67 			MM_REG_WRITE(cmd, subsys_id, prz1->reg_base, PRZ_ENABLE,  in init_rdma()
72 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_RESET, BIT(0), BIT(0));  in init_rdma()
73 	MM_REG_POLL(cmd, subsys_id, base, MDP_RDMA_MON_STA_1, BIT(8), BIT(8));  in init_rdma()
74 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_RESET, 0x0, BIT(0));  in init_rdma()
87 	u8 subsys_id = ctx->comp->subsys_id;  in config_rdma_frame()  local
92 			MM_REG_WRITE(cmd, subsys_id, base,  in config_rdma_frame()
95 			MM_REG_WRITE(cmd, subsys_id, base,  in config_rdma_frame()
100 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_GMCIF_CON,  in config_rdma_frame()
108 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_CON, reg,  in config_rdma_frame()
116 			MM_REG_WRITE(cmd, subsys_id,  in config_rdma_frame()
121 			MM_REG_WRITE(cmd, subsys_id,  in config_rdma_frame()
128 				MM_REG_WRITE(cmd, subsys_id,  in config_rdma_frame()
136 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_CON, reg,  in config_rdma_frame()
141 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_BASE_0, reg,  in config_rdma_frame()
145 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_BASE_1, reg,  in config_rdma_frame()
149 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_BASE_2, reg,  in config_rdma_frame()
154 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_END_0,  in config_rdma_frame()
158 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_END_1,  in config_rdma_frame()
162 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_END_2,  in config_rdma_frame()
167 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_MF_BKGD_SIZE_IN_BYTE,  in config_rdma_frame()
171 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SF_BKGD_SIZE_IN_BYTE,  in config_rdma_frame()
176 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_TRANSFORM_0,  in config_rdma_frame()
190 	u8 subsys_id = ctx->comp->subsys_id;  in config_rdma_subfrm()  local
195 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_EN, BIT(0), BIT(0));  in config_rdma_subfrm()
200 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_OFFSET_0,  in config_rdma_subfrm()
208 			MM_REG_WRITE(cmd, subsys_id, base,  in config_rdma_subfrm()
217 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_OFFSET_1,  in config_rdma_subfrm()
222 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_OFFSET_2,  in config_rdma_subfrm()
227 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_MF_SRC_SIZE, reg,  in config_rdma_subfrm()
232 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_MF_CLIP_SIZE,  in config_rdma_subfrm()
237 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_MF_OFFSET_1,  in config_rdma_subfrm()
246 			MM_REG_WRITE(cmd, subsys_id, base,  in config_rdma_subfrm()
256 	u8 subsys_id = ctx->comp->subsys_id;  in wait_rdma_event()  local
264 	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_EN, 0x0, BIT(0));  in wait_rdma_event()
279 	u8 subsys_id = ctx->comp->subsys_id;  in init_rsz()  local
282 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_ENABLE, 0x10000, BIT(16));  in init_rsz()
283 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_ENABLE, 0x0, BIT(16));  in init_rsz()
285 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_ENABLE, BIT(0), BIT(0));  in init_rsz()
294 	u8 subsys_id = ctx->comp->subsys_id;  in config_rsz_frame()  local
303 		MM_REG_WRITE(cmd, subsys_id, base, PRZ_ENABLE, 0x0, BIT(0));  in config_rsz_frame()
309 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_CONTROL_1, reg,  in config_rsz_frame()
313 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_CONTROL_2, reg,  in config_rsz_frame()
317 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_HORIZONTAL_COEFF_STEP,  in config_rsz_frame()
321 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_VERTICAL_COEFF_STEP,  in config_rsz_frame()
331 	u8 subsys_id = ctx->comp->subsys_id;  in config_rsz_subfrm()  local
337 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_CONTROL_2, reg,  in config_rsz_subfrm()
341 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_INPUT_IMAGE, reg,  in config_rsz_subfrm()
350 			MM_REG_WRITE(cmd, subsys_id, base, PRZ_CONTROL_1,  in config_rsz_subfrm()
355 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_LUMA_HORIZONTAL_INTEGER_OFFSET,  in config_rsz_subfrm()
359 	MM_REG_WRITE(cmd, subsys_id,  in config_rsz_subfrm()
364 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_LUMA_VERTICAL_INTEGER_OFFSET,  in config_rsz_subfrm()
368 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_LUMA_VERTICAL_SUBPIXEL_OFFSET,  in config_rsz_subfrm()
372 	MM_REG_WRITE(cmd, subsys_id,  in config_rsz_subfrm()
377 	MM_REG_WRITE(cmd, subsys_id,  in config_rsz_subfrm()
383 	MM_REG_WRITE(cmd, subsys_id, base, PRZ_OUTPUT_IMAGE, reg,  in config_rsz_subfrm()
396 		u8 subsys_id = ctx->comp->subsys_id;  in advance_rsz_subfrm()  local
405 			MM_REG_WRITE(cmd, subsys_id, base, PRZ_CONTROL_1, 0x0,  in advance_rsz_subfrm()
423 	u8 subsys_id = ctx->comp->subsys_id;  in init_wrot()  local
426 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_SOFT_RST, BIT(0), BIT(0));  in init_wrot()
427 	MM_REG_POLL(cmd, subsys_id, base, VIDO_SOFT_RST_STAT, BIT(0), BIT(0));  in init_wrot()
428 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_SOFT_RST, 0x0, BIT(0));  in init_wrot()
429 	MM_REG_POLL(cmd, subsys_id, base, VIDO_SOFT_RST_STAT, 0x0, BIT(0));  in init_wrot()
439 	u8 subsys_id = ctx->comp->subsys_id;  in config_wrot_frame()  local
445 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_BASE_ADDR, reg,  in config_wrot_frame()
449 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_BASE_ADDR_C, reg,  in config_wrot_frame()
453 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_BASE_ADDR_V, reg,  in config_wrot_frame()
458 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_CTRL, reg,  in config_wrot_frame()
463 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_STRIDE, reg,  in config_wrot_frame()
468 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_STRIDE_C, reg,  in config_wrot_frame()
472 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_STRIDE_V, reg,  in config_wrot_frame()
477 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_MAT_CTRL, reg, 0xF3);  in config_wrot_frame()
480 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_DITHER, 0xFF000000,  in config_wrot_frame()
483 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_RSV_1, BIT(31), BIT(31));  in config_wrot_frame()
488 		MM_REG_WRITE(cmd, subsys_id, base, VIDO_FIFO_TEST,  in config_wrot_frame()
494 		MM_REG_WRITE(cmd, subsys_id, base, VIDO_MAIN_BUF_SIZE,  in config_wrot_frame()
505 	u8 subsys_id = ctx->comp->subsys_id;  in config_wrot_subfrm()  local
511 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_OFST_ADDR,  in config_wrot_subfrm()
516 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_OFST_ADDR_C,  in config_wrot_subfrm()
521 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_OFST_ADDR_V,  in config_wrot_subfrm()
526 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_IN_SIZE, reg,  in config_wrot_subfrm()
531 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_TAR_SIZE, reg,  in config_wrot_subfrm()
535 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_CROP_OFST, reg,  in config_wrot_subfrm()
540 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_MAIN_BUF_SIZE,  in config_wrot_subfrm()
544 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_ROT_EN, BIT(0), BIT(0));  in config_wrot_subfrm()
554 	u8 subsys_id = ctx->comp->subsys_id;  in wait_wrot_event()  local
562 		MM_REG_WRITE(cmd, subsys_id, base, VIDO_MAIN_BUF_SIZE, 0x0,  in wait_wrot_event()
566 	MM_REG_WRITE(cmd, subsys_id, base, VIDO_ROT_EN, 0x0, BIT(0));  in wait_wrot_event()
582 	u8 subsys_id = ctx->comp->subsys_id;  in init_wdma()  local
585 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_RST, BIT(0), BIT(0));  in init_wdma()
586 	MM_REG_POLL(cmd, subsys_id, base, WDMA_FLOW_CTRL_DBG, BIT(0), BIT(0));  in init_wdma()
587 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_RST, 0x0, BIT(0));  in init_wdma()
596 	u8 subsys_id = ctx->comp->subsys_id;  in config_wdma_frame()  local
599 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_BUF_CON2, 0x10101050,  in config_wdma_frame()
605 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_CFG, reg,  in config_wdma_frame()
610 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_ADDR, reg,  in config_wdma_frame()
614 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_U_ADDR, reg,  in config_wdma_frame()
618 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_V_ADDR, reg,  in config_wdma_frame()
623 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_W_IN_BYTE,  in config_wdma_frame()
628 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_UV_PITCH,  in config_wdma_frame()
631 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_ALPHA, 0x800000FF,  in config_wdma_frame()
641 	u8 subsys_id = ctx->comp->subsys_id;  in config_wdma_subfrm()  local
647 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_ADDR_OFFSET,  in config_wdma_subfrm()
652 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_U_ADDR_OFFSET,  in config_wdma_subfrm()
657 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_DST_V_ADDR_OFFSET,  in config_wdma_subfrm()
662 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_SRC_SIZE, reg,  in config_wdma_subfrm()
667 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_CLIP_SIZE, reg,  in config_wdma_subfrm()
672 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_CLIP_COORD, reg,  in config_wdma_subfrm()
676 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_EN, BIT(0), BIT(0));  in config_wdma_subfrm()
684 	u8 subsys_id = ctx->comp->subsys_id;  in wait_wdma_event()  local
688 	MM_REG_WRITE(cmd, subsys_id, base, WDMA_EN, 0x0, BIT(0));  in wait_wdma_event()
703 	u8 subsys_id = ctx->comp->subsys_id;  in init_ccorr()  local
706 	MM_REG_WRITE(cmd, subsys_id, base, MDP_CCORR_EN, BIT(0), BIT(0));  in init_ccorr()
708 	MM_REG_WRITE(cmd, subsys_id, base, MDP_CCORR_CFG, BIT(0), BIT(0));  in init_ccorr()
716 	u8 subsys_id = ctx->comp->subsys_id;  in config_ccorr_subfrm()  local
730 	MM_REG_WRITE(cmd, subsys_id, base, MDP_CCORR_SIZE,  in config_ccorr_subfrm()
899 	comp->subsys_id = cmdq_reg.subsys;  in mdp_get_subsys_id()