Lines Matching +full:0 +full:x9310
63 if ((Event.UARTStatus & 0x01) && (dev->TxEventNotify)) in event_tasklet()
65 if ((Event.UARTStatus & 0x02) && (dev->RxEventNotify)) in event_tasklet()
79 while (Cur->ngeneBuffer.SR.Flags & 0x80) { in demux_tasklet()
82 if (Cur->ngeneBuffer.SR.Flags & 0x20) in demux_tasklet()
94 leave fill/empty (0x80) flag alone in demux_tasklet()
103 ~0x40; in demux_tasklet()
115 Cur->ngeneBuffer.SR.Flags &= ~0x40; in demux_tasklet()
124 chan->AudioDTOUpdated = 0; in demux_tasklet()
131 if (Cur->ngeneBuffer.SR.Flags & 0x01) in demux_tasklet()
133 if (Cur->ngeneBuffer.SR.Flags & 0x20) in demux_tasklet()
150 Cur->ngeneBuffer.SR.Flags = 0x00; in demux_tasklet()
162 u32 icounts = 0; in irq_handler()
170 ngwritel(0, FORCE_NMI); in irq_handler()
179 ngwritel(0, FORCE_NMI); in irq_handler()
185 (dev->ngenetohost[0] == 1 && dev->ngenetohost[1] != 0))) { in irq_handler()
193 if (dev->EventBuffer->EventStatus & 0x80) { in irq_handler()
206 dev->EventBuffer->EventStatus &= ~0x80; in irq_handler()
211 while (i > 0) { in irq_handler()
217 ngeneBuffer.SR.Flags & 0xC0) == 0x80) { in irq_handler()
219 ngeneBuffer.SR.Flags |= 0x40; in irq_handler()
260 dev->cmd_done = 0; in ngene_command_mutex()
265 ngwritel(0, NGENE_COMMAND); in ngene_command_mutex()
266 ngwritel(0, NGENE_COMMAND_HI); in ngene_command_mutex()
267 ngwritel(0, NGENE_STATUS); in ngene_command_mutex()
268 ngwritel(0, NGENE_STATUS_HI); in ngene_command_mutex()
269 ngwritel(0, NGENE_EVENT); in ngene_command_mutex()
270 ngwritel(0, NGENE_EVENT_HI); in ngene_command_mutex()
274 ngwritel(fwio & 0xffffffff, NGENE_COMMAND); in ngene_command_mutex()
276 ngwritel((fwio + 256) & 0xffffffff, NGENE_STATUS); in ngene_command_mutex()
278 ngwritel((fwio + 512) & 0xffffffff, NGENE_EVENT); in ngene_command_mutex()
291 *tmpCmdDoneByte = 0; in ngene_command_mutex()
292 dev->ngenetohost[0] = 0; in ngene_command_mutex()
293 dev->ngenetohost[1] = 0; in ngene_command_mutex()
302 /*ngwritel(0, FORCE_NMI);*/ in ngene_command_mutex()
310 dev->BootFirmware = 0; in ngene_command_mutex()
315 return 0; in ngene_command_mutex()
319 return 0; in ngene_command_mutex()
341 com.cmd.hdr.Length = 0; in ngene_command_load_firmware()
342 com.in_len = 0; in ngene_command_load_firmware()
343 com.out_len = 0; in ngene_command_load_firmware()
355 memset(&com, 0, sizeof(struct ngene_command)); in ngene_command_load_firmware()
361 com.out_len = 0; in ngene_command_load_firmware()
375 com.out_len = 0; in ngene_command_config_buf()
377 if (ngene_command(dev, &com) < 0) in ngene_command_config_buf()
379 return 0; in ngene_command_config_buf()
390 com.out_len = 0; in ngene_command_config_free_buf()
392 if (ngene_command(dev, &com) < 0) in ngene_command_config_free_buf()
395 return 0; in ngene_command_config_free_buf()
406 com.out_len = 0; in ngene_command_gpio_set()
417 0: FD_CTL1 Bit 7,6 must be 0,1
419 6 0-AUX,1-TS
420 5 0-par,1-ser
421 4 0-lsb/1-msb
423 1,0 0-no sync, 1-use ext. start, 2-use 0x47, 3-both
425 2: FD_STA is read-only. 0-sync
436 0x42, 0x00, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00,
437 0x40, 0x06, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXH */
438 0x71, 0x07, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXHser */
439 0x72, 0x00, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* S2ser */
440 0x40, 0x07, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* LGDT3303 */
445 0x00, 0x10, 0x00, 0x00,
446 0x80, 0x10, 0x00, 0x00,
450 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
455 static u8 TS_I2SConfiguration[4] = { 0x3E, 0x18, 0x00, 0x00 };
457 static u8 TS_I2SOutConfiguration[4] = { 0x80, 0x04, 0x00, 0x00 };
460 {0x1c, 0x13, 0x01, 0x68, 0x3d, 0x90, 0x14, 0x20, /* SDTV */
461 0x00, 0x00, 0x01, 0xb0, 0x9c, 0x00, 0x00, 0x00},
462 {0x9c, 0x03, 0x23, 0xC0, 0x60, 0x0E, 0x13, 0x00,
463 0x00, 0x00, 0x00, 0x01, 0xB0, 0x00, 0x00, 0x00},
464 {0x9f, 0x00, 0x23, 0xC0, 0x60, 0x0F, 0x13, 0x00, /* HDTV 1080i50 */
465 0x00, 0x00, 0x00, 0x01, 0xB0, 0x00, 0x00, 0x00},
466 {0x9c, 0x01, 0x23, 0xC0, 0x60, 0x0E, 0x13, 0x00, /* HDTV 1080i60 */
467 0x00, 0x00, 0x00, 0x01, 0xB0, 0x00, 0x00, 0x00},
478 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x04, 0x00
486 while (Length > 0) { in FillTSBuffer()
488 *ptr = 0x471FFF10; in FillTSBuffer()
490 *ptr = 0x10FF1F47; in FillTSBuffer()
504 val = chan->nextBuffer->ngeneBuffer.SR.Flags & 0x80; in flush_buffers()
514 memset(&Cur->ngeneBuffer.SR, 0, sizeof(Cur->ngeneBuffer.SR)); in clear_buffers()
525 chan->AudioDTOUpdated = 0; in clear_buffers()
530 memset(&Cur->ngeneBuffer.SR, 0, in clear_buffers()
546 u16 BsUVI = ((stream & 1) ? 0x9400 : 0x9300); in ngene_command_stream_control()
547 u16 BsSDI = ((stream & 1) ? 0x9600 : 0x9500); in ngene_command_stream_control()
548 u16 BsSPI = ((stream & 1) ? 0x9800 : 0x9700); in ngene_command_stream_control()
549 u16 BsSDO = 0x9B00; in ngene_command_stream_control()
551 memset(&com, 0, sizeof(com)); in ngene_command_stream_control()
554 com.cmd.StreamControl.Stream = stream | (control ? 8 : 0); in ngene_command_stream_control()
556 com.cmd.StreamControl.Stream |= 0x07; in ngene_command_stream_control()
561 com.out_len = 0; in ngene_command_stream_control()
569 if (!(control & 0x80)) { in ngene_command_stream_control()
575 if (ngene_command(dev, &com) < 0) in ngene_command_stream_control()
579 return 0; in ngene_command_stream_control()
582 return 0; in ngene_command_stream_control()
599 com.cmd.StreamControl.Stream |= 0x07; in ngene_command_stream_control()
610 com.cmd.StreamControl.MinVBILinesPerField = 0; in ngene_command_stream_control()
615 com.cmd.StreamControl.Stream |= 0x04; in ngene_command_stream_control()
654 com.cmd.StreamControl.SetupDataAddr = BsUVI + 0x10; in ngene_command_stream_control()
677 if (ngene_command(dev, &com) < 0) in ngene_command_stream_control()
680 return 0; in ngene_command_stream_control()
686 u8 control = 0, mode = 0, flags = 0; in set_transfer()
714 ngreadl(0x9310)); */ in set_transfer()
716 control = 0x80; in set_transfer()
723 /* 0x66666666 = 50MHz *2^33 /250MHz */ in set_transfer()
724 chan->AudioDTOValue = 0x80000000; in set_transfer()
732 ngreadl(0x9310)); */ in set_transfer()
764 for (j = 0; j < rb->NumBuffers; j++, Cur = Cur->Next) { in free_ringbuffer()
794 for (j = 0; j < tb->NumBuffers; j++, Cur = Cur->Next) { in free_idlebuffer()
797 Cur->ngeneBuffer.Address_of_first_entry_2 = 0; in free_idlebuffer()
798 Cur->ngeneBuffer.Number_of_entries_2 = 0; in free_idlebuffer()
841 descr->MemSize = 0; in create_ring_buffer()
842 descr->PAHead = 0; in create_ring_buffer()
843 descr->NumBuffers = 0; in create_ring_buffer()
857 for (i = 0; i < NumBuffers - 1; i++) { in create_ring_buffer()
875 return 0; in create_ring_buffer()
886 * ((Buffer2Length != 0) ? (NUM_SCATTER_GATHER_ENTRIES * 2) : in AllocateRingBuffers()
916 for (i = 0; i < pRingBuffer->NumBuffers; i += 1, Cur = Cur->Next) { in AllocateRingBuffers()
940 for (j = 0; j < NUM_SCATTER_GATHER_ENTRIES - 1; j += 1) { in AllocateRingBuffers()
973 for (j = 0; j < NUM_SCATTER_GATHER_ENTRIES - 1; j++) { in AllocateRingBuffers()
984 return 0; in AllocateRingBuffers()
1000 for (i = 0; i < n; i++) { in FillTSIdleBuffer()
1010 return 0; in FillTSIdleBuffer()
1032 0,
1033 0,
1034 0
1040 int status = 0, i; in AllocCommonBuffers()
1066 if (status < 0) in AllocCommonBuffers()
1077 if (status < 0) in AllocCommonBuffers()
1086 0); in AllocCommonBuffers()
1087 if (status < 0) in AllocCommonBuffers()
1097 if (status < 0) in AllocCommonBuffers()
1104 MAX_TS_BUFFER_SIZE, 0); in AllocCommonBuffers()
1113 if (status < 0) in AllocCommonBuffers()
1119 MAX_TS_BUFFER_SIZE, 0); in AllocCommonBuffers()
1165 if (dev->card_info->io_type[0] & NGENE_IO_HDTV) { in ngene_get_buffers()
1171 dev->iomem = ioremap(pci_resource_start(dev->pci_dev, 0), in ngene_get_buffers()
1172 pci_resource_len(dev->pci_dev, 0)); in ngene_get_buffers()
1176 return 0; in ngene_get_buffers()
1186 memset_io(dev->iomem + 0xc000, 0x00, 0x220); in ngene_init()
1187 memset_io(dev->iomem + 0xc400, 0x00, 0x100); in ngene_init()
1189 for (i = 0; i < MAX_STREAM; i++) { in ngene_init()
1194 dev->fw_interface_version = 0; in ngene_init()
1196 ngwritel(0, NGENE_INT_ENABLE); in ngene_init()
1200 dev->device_version = ngreadl(DEV_VER) & 0x0f; in ngene_init()
1234 size = 0; in ngene_load_firm()
1239 if (request_firmware(&fw, fw_name, &dev->pci_dev->dev) < 0) { in ngene_load_firm()
1245 if (size == 0) in ngene_load_firm()
1264 i2c_del_adapter(&(dev->channel[0].i2c_adapter)); in ngene_stop()
1266 ngwritel(0, NGENE_INT_ENABLE); in ngene_stop()
1267 ngwritel(0, NGENE_COMMAND); in ngene_stop()
1268 ngwritel(0, NGENE_COMMAND_HI); in ngene_stop()
1269 ngwritel(0, NGENE_STATUS); in ngene_stop()
1270 ngwritel(0, NGENE_STATUS_HI); in ngene_stop()
1271 ngwritel(0, NGENE_EVENT); in ngene_stop()
1272 ngwritel(0, NGENE_EVENT_HI); in ngene_stop()
1285 u8 tsin12_config[6] = { 0x60, 0x60, 0x00, 0x00, 0x00, 0x00 }; in ngene_buffer_config()
1286 u8 tsin1234_config[6] = { 0x30, 0x30, 0x00, 0x30, 0x30, 0x00 }; in ngene_buffer_config()
1287 u8 tsio1235_config[6] = { 0x30, 0x30, 0x00, 0x28, 0x00, 0x38 }; in ngene_buffer_config()
1320 if (stat < 0) in ngene_start()
1331 for (i = 0; i < MAX_STREAM; i++) in ngene_start()
1338 if (stat < 0) in ngene_start()
1347 ngwritel(0, NGENE_INT_ENABLE); in ngene_start()
1354 flags = 0; in ngene_start()
1359 if (stat < 0) in ngene_start()
1365 stat = ngene_i2c_init(dev, 0); in ngene_start()
1366 if (stat < 0) in ngene_start()
1370 if (stat < 0) in ngene_start()
1373 return 0; in ngene_start()
1376 ngwritel(0, NGENE_INT_ENABLE); in ngene_start()
1396 set_transfer(chan, 0); in release_channel()
1413 dvb_module_release(chan->i2c_client[0]); in release_channel()
1414 chan->i2c_client[0] = NULL; in release_channel()
1441 int ret = 0, nr = chan->number; in init_channel()
1449 chan->users = 0; in init_channel()
1452 chan->i2c_client_fe = 0; /* be sure this is set to zero */ in init_channel()
1458 if (ret < 0) in init_channel()
1463 if (ret < 0) in init_channel()
1469 return 0; in init_channel()
1475 if (nr == 0 || !one_adapter || dev->first_adapter == NULL) { in init_channel()
1481 if (ret < 0) in init_channel()
1491 ret = dvb_ca_en50221_init(adapter, dev->ci.en, 0, 1); in init_channel()
1492 if (ret != 0) in init_channel()
1499 DVB_DEVICE_SEC, 0); in init_channel()
1505 if (dvb_register_frontend(adapter, chan->fe) < 0) in init_channel()
1510 if (dvb_register_frontend(adapter, chan->fe2) < 0) in init_channel()
1538 return 0; in init_channel()
1545 for (i = 0; i < MAX_STREAM; i++) { in init_channels()
1547 if (init_channel(&dev->channel[i]) < 0) { in init_channels()
1548 for (j = i - 1; j >= 0; j--) in init_channels()
1553 return 0; in init_channels()
1558 .polarity = 0,
1559 .clock_mode = 0,
1572 ret = ngene_port_has_cxd2099(&dev->channel[0].i2c_adapter, &type); in cxd_attach()
1585 &dev->channel[0].i2c_adapter, in cxd_attach()
1586 0x40, &cxd_cfg); in cxd_attach()
1591 dev->channel[0].i2c_client[0] = client; in cxd_attach()
1605 dvb_module_release(dev->channel[0].i2c_client[0]); in cxd_detach()
1606 dev->channel[0].i2c_client[0] = NULL; in cxd_detach()
1620 com.cmd.MemoryWrite.address = 0x910c; in ngene_unlink()
1621 com.cmd.MemoryWrite.data = 0xff; in ngene_unlink()
1626 ngwritel(0, NGENE_INT_ENABLE); in ngene_unlink()
1653 for (i = MAX_STREAM - 1; i >= 0; i--) in ngene_remove()
1665 int stat = 0; in ngene_probe()
1667 if (pci_enable_device(pci_dev) < 0) in ngene_probe()
1684 if (stat < 0) in ngene_probe()
1687 if (stat < 0) in ngene_probe()
1693 if (stat < 0) in ngene_probe()
1701 if (stat < 0) in ngene_probe()
1704 return 0; in ngene_probe()