372 	writel(timing.clk_termen, q->csi_rx_base +  in cio2_hw_init()
374 	writel(timing.clk_settle, q->csi_rx_base +  in cio2_hw_init()
378 		writel(timing.dat_termen, q->csi_rx_base +  in cio2_hw_init()
380 		writel(timing.dat_settle, q->csi_rx_base +  in cio2_hw_init()
402 	       q->csi_rx_base + CIO2_REG_CSIRX_STATUS_DLANE_HS);  in cio2_hw_init()
404 	       q->csi_rx_base + CIO2_REG_CSIRX_STATUS_DLANE_LP);  in cio2_hw_init()
411 		writel(1, q->csi_rx_base + CIO2_REG_MIPIBE_SP_LUT_ENTRY(i));  in cio2_hw_init()
416 		       q->csi_rx_base + CIO2_REG_MIPIBE_LP_LUT_ENTRY(i));  in cio2_hw_init()
418 	       q->csi_rx_base + CIO2_REG_MIPIBE_GLOBAL_LUT_DISREGARD);  in cio2_hw_init()
421 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_MASK);  in cio2_hw_init()
422 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_ENABLE);  in cio2_hw_init()
423 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_EDGE);  in cio2_hw_init()
424 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_LEVEL_NOT_PULSE);  in cio2_hw_init()
437 	       q->csi_rx_base + CIO2_REG_MIPIBE_LP_LUT_ENTRY(ENTRY));  in cio2_hw_init()
438 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_COMP_FORMAT(sensor_vc));  in cio2_hw_init()
439 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_FORCE_RAW8);  in cio2_hw_init()
442 	writel(lanes, q->csi_rx_base + CIO2_REG_CSIRX_NOF_ENABLED_LANES);  in cio2_hw_init()
497 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_CLEAR);  in cio2_hw_init()
503 	writel(1, q->csi_rx_base + CIO2_REG_MIPIBE_ENABLE);  in cio2_hw_init()
504 	writel(1, q->csi_rx_base + CIO2_REG_CSIRX_ENABLE);  in cio2_hw_init()
518 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_MASK);  in cio2_hw_exit()
519 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_ENABLE);  in cio2_hw_exit()
520 	writel(0, q->csi_rx_base + CIO2_REG_CSIRX_ENABLE);  in cio2_hw_exit()
521 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_ENABLE);  in cio2_hw_exit()
733 				void __iomem *csi_rx_base =  in cio2_irq_handle_once()  local
737 				csi2_status = readl(csi_rx_base +  in cio2_irq_handle_once()
743 				       csi_rx_base + CIO2_REG_IRQCTRL_CLEAR);  in cio2_irq_handle_once()
1404 	q->csi_rx_base = cio2->base + CIO2_REG_PIPE_BASE(q->csi2.port);  in cio2_notifier_bound()