Lines Matching refs:mipid02_write_reg
271 static int mipid02_write_reg(struct mipid02_dev *bridge, u16 reg, u8 val) in mipid02_write_reg() function
558 ret = mipid02_write_reg(bridge, MIPID02_CLK_LANE_REG1, 0); in mipid02_stream_disable()
561 ret = mipid02_write_reg(bridge, MIPID02_DATA_LANE0_REG1, 0); in mipid02_stream_disable()
564 ret = mipid02_write_reg(bridge, MIPID02_DATA_LANE1_REG1, 0); in mipid02_stream_disable()
595 ret = mipid02_write_reg(bridge, MIPID02_CLK_LANE_REG1, in mipid02_stream_enable()
599 ret = mipid02_write_reg(bridge, MIPID02_CLK_LANE_REG3, CLK_MIPI_CSI); in mipid02_stream_enable()
602 ret = mipid02_write_reg(bridge, MIPID02_DATA_LANE0_REG1, in mipid02_stream_enable()
606 ret = mipid02_write_reg(bridge, MIPID02_DATA_LANE0_REG2, in mipid02_stream_enable()
610 ret = mipid02_write_reg(bridge, MIPID02_DATA_LANE1_REG1, in mipid02_stream_enable()
614 ret = mipid02_write_reg(bridge, MIPID02_DATA_LANE1_REG2, in mipid02_stream_enable()
618 ret = mipid02_write_reg(bridge, MIPID02_MODE_REG1, in mipid02_stream_enable()
622 ret = mipid02_write_reg(bridge, MIPID02_MODE_REG2, in mipid02_stream_enable()
626 ret = mipid02_write_reg(bridge, MIPID02_DATA_ID_RREG, in mipid02_stream_enable()
630 ret = mipid02_write_reg(bridge, MIPID02_DATA_SELECTION_CTRL, in mipid02_stream_enable()
634 ret = mipid02_write_reg(bridge, MIPID02_PIX_WIDTH_CTRL, in mipid02_stream_enable()
638 ret = mipid02_write_reg(bridge, MIPID02_PIX_WIDTH_CTRL_EMB, in mipid02_stream_enable()