Lines Matching refs:stv090x_write_reg
744 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data) in stv090x_write_reg() function
1206 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_vitclk_ctl()
1215 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_vitclk_ctl()
3935 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_sleep()
3940 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0) in stv090x_sleep()
3959 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_sleep()
3970 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_sleep()
3978 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_sleep()
3983 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0) in stv090x_sleep()
4002 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_sleep()
4013 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_sleep()
4026 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0) in stv090x_sleep()
4057 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0) in stv090x_wakeup()
4065 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_wakeup()
4070 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0) in stv090x_wakeup()
4081 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_wakeup()
4090 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_wakeup()
4098 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_wakeup()
4103 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0) in stv090x_wakeup()
4114 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_wakeup()
4123 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_wakeup()
4167 if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0) in stv090x_ldpc_mode()
4174 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4177 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4224 if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */ in stv090x_ldpc_mode()
4227 if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */ in stv090x_ldpc_mode()
4233 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4236 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4281 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0) in stv090x_set_mclk()
4311 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00); in stv0900_set_tspath()
4316 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */ in stv0900_set_tspath()
4320 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4324 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0) in stv0900_set_tspath()
4326 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0) in stv0900_set_tspath()
4328 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0) in stv0900_set_tspath()
4341 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0) in stv0900_set_tspath()
4347 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0) in stv0900_set_tspath()
4361 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10); in stv0900_set_tspath()
4366 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16); in stv0900_set_tspath()
4369 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4373 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4375 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0) in stv0900_set_tspath()
4377 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0) in stv0900_set_tspath()
4390 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14); in stv0900_set_tspath()
4395 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12); in stv0900_set_tspath()
4408 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4417 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4426 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4435 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4449 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4458 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4467 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4476 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4510 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4512 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0) in stv0900_set_tspath()
4542 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0) in stv0900_set_tspath()
4544 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0) in stv0900_set_tspath()
4550 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4553 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4558 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4561 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4578 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00); in stv0903_set_tspath()
4584 stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c); in stv0903_set_tspath()
4591 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10); in stv0903_set_tspath()
4597 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14); in stv0903_set_tspath()
4607 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4615 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4623 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4631 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4665 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0903_set_tspath()
4667 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0) in stv0903_set_tspath()
4673 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4676 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4708 if (stv090x_write_reg(state, STV090x_SYNTCTRL, in stv090x_init()
4792 if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0) in stv090x_setup()
4795 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0) in stv090x_setup()
4801 if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0) in stv090x_setup()
4804 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0) in stv090x_setup()
4809 if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0) in stv090x_setup()
4812 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0) in stv090x_setup()
4815 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */ in stv090x_setup()
4818 if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */ in stv090x_setup()
4820 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */ in stv090x_setup()
4827 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0) in stv090x_setup()
4833 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0) in stv090x_setup()
4839 if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0) in stv090x_setup()
4858 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_setup()
4865 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_setup()
4868 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0) in stv090x_setup()
4870 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0) in stv090x_setup()
4889 return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg); in stv090x_set_gpio()