42 static int s5h1432_writereg(struct s5h1432_state *state,  in s5h1432_writereg()  function
106 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x2E, reg);  in s5h1432_set_channel_bandwidth()
116 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x55);  in s5h1432_set_IF()
117 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x55);  in s5h1432_set_IF()
118 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0x15);  in s5h1432_set_IF()
121 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x00);  in s5h1432_set_IF()
122 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x00);  in s5h1432_set_IF()
123 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0x40);  in s5h1432_set_IF()
126 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x00);  in s5h1432_set_IF()
127 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x00);  in s5h1432_set_IF()
128 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xe0);  in s5h1432_set_IF()
131 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x66);  in s5h1432_set_IF()
132 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x66);  in s5h1432_set_IF()
133 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEE);  in s5h1432_set_IF()
136 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x55);  in s5h1432_set_IF()
137 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x55);  in s5h1432_set_IF()
138 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xED);  in s5h1432_set_IF()
141 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0xAA);  in s5h1432_set_IF()
142 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0xAA);  in s5h1432_set_IF()
143 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEA);  in s5h1432_set_IF()
153 			s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4,  in s5h1432_set_IF()
155 			s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5,  in s5h1432_set_IF()
157 			s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7,  in s5h1432_set_IF()
200 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);  in s5h1432_set_frontend()
202 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);  in s5h1432_set_frontend()
224 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);  in s5h1432_set_frontend()
226 		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);  in s5h1432_set_frontend()
246 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x04, 0xa8);  in s5h1432_init()
247 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x05, 0x01);  in s5h1432_init()
248 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x07, 0x70);  in s5h1432_init()
249 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x19, 0x80);  in s5h1432_init()
250 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1b, 0x9D);  in s5h1432_init()
251 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1c, 0x30);  in s5h1432_init()
252 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1d, 0x20);  in s5h1432_init()
253 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1e, 0x1B);  in s5h1432_init()
254 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x2e, 0x40);  in s5h1432_init()
255 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x42, 0x84);  in s5h1432_init()
256 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x50, 0x5a);  in s5h1432_init()
257 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x5a, 0xd3);  in s5h1432_init()
258 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x68, 0x50);  in s5h1432_init()
259 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xb8, 0x3c);  in s5h1432_init()
260 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xc4, 0x10);  in s5h1432_init()
261 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xcc, 0x9c);  in s5h1432_init()
262 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xDA, 0x00);  in s5h1432_init()
263 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe1, 0x94);  in s5h1432_init()
265 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xf9, 0x00);  in s5h1432_init()
270 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x66);  in s5h1432_init()
271 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x66);  in s5h1432_init()
272 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEE);  in s5h1432_init()
274 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1e, 0x31);  in s5h1432_init()
279 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x42, reg);  in s5h1432_init()
284 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);  in s5h1432_init()
286 	s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);  in s5h1432_init()