Lines Matching refs:hi_cmd
2107 struct drxj_hi_cmd hi_cmd; in drxj_dap_atomic_read_write_block() local
2118 hi_cmd.cmd = SIO_HI_RA_RAM_CMD_ATOMIC_COPY; in drxj_dap_atomic_read_write_block()
2119 hi_cmd.param1 = in drxj_dap_atomic_read_write_block()
2122 hi_cmd.param2 = in drxj_dap_atomic_read_write_block()
2124 hi_cmd.param3 = (u16) ((datasize / 2) - 1); in drxj_dap_atomic_read_write_block()
2126 hi_cmd.param3 |= DRXJ_HI_ATOMIC_WRITE; in drxj_dap_atomic_read_write_block()
2128 hi_cmd.param3 |= DRXJ_HI_ATOMIC_READ; in drxj_dap_atomic_read_write_block()
2129 hi_cmd.param4 = (u16) ((DRXDAP_FASI_ADDR2BLOCK(addr) << 6) + in drxj_dap_atomic_read_write_block()
2131 hi_cmd.param5 = (u16) DRXDAP_FASI_ADDR2OFFSET(addr); in drxj_dap_atomic_read_write_block()
2145 rc = hi_command(dev_addr, &hi_cmd, &dummy); in drxj_dap_atomic_read_write_block()
2236 struct drxj_hi_cmd hi_cmd; in hi_cfg_command() local
2242 hi_cmd.cmd = SIO_HI_RA_RAM_CMD_CONFIG; in hi_cfg_command()
2243 hi_cmd.param1 = SIO_HI_RA_RAM_PAR_1_PAR1_SEC_KEY; in hi_cfg_command()
2244 hi_cmd.param2 = ext_attr->hi_cfg_timing_div; in hi_cfg_command()
2245 hi_cmd.param3 = ext_attr->hi_cfg_bridge_delay; in hi_cfg_command()
2246 hi_cmd.param4 = ext_attr->hi_cfg_wake_up_key; in hi_cfg_command()
2247 hi_cmd.param5 = ext_attr->hi_cfg_ctrl; in hi_cfg_command()
2248 hi_cmd.param6 = ext_attr->hi_cfg_transmit; in hi_cfg_command()
2250 rc = hi_command(demod->my_i2c_dev_addr, &hi_cmd, &result); in hi_cfg_command()
3882 struct drxj_hi_cmd hi_cmd; in ctrl_i2c_bridge() local
3889 hi_cmd.cmd = SIO_HI_RA_RAM_CMD_BRDCTRL; in ctrl_i2c_bridge()
3890 hi_cmd.param1 = SIO_HI_RA_RAM_PAR_1_PAR1_SEC_KEY; in ctrl_i2c_bridge()
3892 hi_cmd.param2 = SIO_HI_RA_RAM_PAR_2_BRD_CFG_CLOSED; in ctrl_i2c_bridge()
3894 hi_cmd.param2 = SIO_HI_RA_RAM_PAR_2_BRD_CFG_OPEN; in ctrl_i2c_bridge()
3896 return hi_command(demod->my_i2c_dev_addr, &hi_cmd, &result); in ctrl_i2c_bridge()