Lines Matching refs:dib7000p_write_word
130 static int dib7000p_write_word(struct dib7000p_state *state, u16 reg, u16 val) in dib7000p_write_word() function
165 dib7000p_write_word(state, r, *n++); in dib7000p_write_tab()
218 ret |= dib7000p_write_word(state, 235, smo_mode); in dib7000p_set_output_mode()
219 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ in dib7000p_set_output_mode()
221 ret |= dib7000p_write_word(state, 1286, outreg); /* P_Div_active */ in dib7000p_set_output_mode()
233 dib7000p_write_word(state, 207, 0); in dib7000p_set_diversity_in()
235 dib7000p_write_word(state, 207, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0)); in dib7000p_set_diversity_in()
240 dib7000p_write_word(state, 204, 6); in dib7000p_set_diversity_in()
241 dib7000p_write_word(state, 205, 16); in dib7000p_set_diversity_in()
244 dib7000p_write_word(state, 204, 1); in dib7000p_set_diversity_in()
245 dib7000p_write_word(state, 205, 0); in dib7000p_set_diversity_in()
292 dib7000p_write_word(state, 774, reg_774); in dib7000p_set_power_mode()
293 dib7000p_write_word(state, 775, reg_775); in dib7000p_set_power_mode()
294 dib7000p_write_word(state, 776, reg_776); in dib7000p_set_power_mode()
295 dib7000p_write_word(state, 1280, reg_1280); in dib7000p_set_power_mode()
297 dib7000p_write_word(state, 899, reg_899); in dib7000p_set_power_mode()
317 …dib7000p_write_word(state, 1925, reg | (1 << 4) | (1 << 2)); /* en_slowAdc = 1 & reset_sladc = 1 */ in dib7000p_set_adc_state()
321 dib7000p_write_word(state, 1925, reg & ~(1 << 4)); /* en_slowAdc = 1 & reset_sladc = 0 */ in dib7000p_set_adc_state()
324 …dib7000p_write_word(state, 72, reg | (1 << 14) | (3 << 12) | 524); /* ref = Vin1 => Vbg ; sel = Vi… in dib7000p_set_adc_state()
327 dib7000p_write_word(state, 909, reg_909); in dib7000p_set_adc_state()
335 …dib7000p_write_word(state, 1925, (reg & ~(1 << 2)) | (1 << 4)); /* reset_sladc = 1 en_slowAdc = 0 … in dib7000p_set_adc_state()
368 dib7000p_write_word(state, 908, reg_908); in dib7000p_set_adc_state()
369 dib7000p_write_word(state, 909, reg_909); in dib7000p_set_adc_state()
390 dib7000p_write_word(state, 23, (u16) ((timf >> 16) & 0xffff)); in dib7000p_set_bandwidth()
391 dib7000p_write_word(state, 24, (u16) ((timf) & 0xffff)); in dib7000p_set_bandwidth()
399 dib7000p_write_word(state, 73, (0 << 1) | (0 << 0)); in dib7000p_sad_calib()
402 dib7000p_write_word(state, 74, 2048); in dib7000p_sad_calib()
404 dib7000p_write_word(state, 74, 776); in dib7000p_sad_calib()
407 dib7000p_write_word(state, 73, (1 << 0)); in dib7000p_sad_calib()
408 dib7000p_write_word(state, 73, (0 << 0)); in dib7000p_sad_calib()
421 return dib7000p_write_word(state, 105, (dib7000p_read_word(state, 105) & 0xf000) | value); in dib7000p_set_wbd_ref()
444 return dib7000p_write_word(state, 108, v); in dib7000p_set_agc1_min()
453 …dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio <… in dib7000p_reset_pll()
458 dib7000p_write_word(state, 1857, dib7000p_read_word(state, 1857) | (!bw->pll_bypass << 15)); in dib7000p_reset_pll()
464 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()
467 …dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw-… in dib7000p_reset_pll()
469 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()
472 dib7000p_write_word(state, 18, (u16) (((bw->internal * 1000) >> 16) & 0xffff)); in dib7000p_reset_pll()
473 dib7000p_write_word(state, 19, (u16) ((bw->internal * 1000) & 0xffff)); in dib7000p_reset_pll()
474 dib7000p_write_word(state, 21, (u16) ((bw->ifreq >> 16) & 0xffff)); in dib7000p_reset_pll()
475 dib7000p_write_word(state, 22, (u16) ((bw->ifreq) & 0xffff)); in dib7000p_reset_pll()
477 dib7000p_write_word(state, 72, bw->sad_cfg); in dib7000p_reset_pll()
504 dib7000p_write_word(state, 1857, reg_1857 & ~(1 << 15)); in dib7000p_update_pll()
506 …dib7000p_write_word(state, 1856, reg_1856 | ((bw->pll_ratio & 0x3f) << 6) | (bw->pll_prediv & 0x3f… in dib7000p_update_pll()
512 dib7000p_write_word(state, 18, (u16) ((internal >> 16) & 0xffff)); in dib7000p_update_pll()
513 dib7000p_write_word(state, 19, (u16) (internal & 0xffff)); in dib7000p_update_pll()
515 dib7000p_write_word(state, 1857, reg_1857 | (1 << 15)); in dib7000p_update_pll()
530 dib7000p_write_word(st, 1029, st->gpio_dir); in dib7000p_reset_gpio()
531 dib7000p_write_word(st, 1030, st->gpio_val); in dib7000p_reset_gpio()
535 dib7000p_write_word(st, 1032, st->cfg.gpio_pwm_pos); in dib7000p_reset_gpio()
537 dib7000p_write_word(st, 1037, st->cfg.pwm_freq_div); in dib7000p_reset_gpio()
546 dib7000p_write_word(st, 1029, st->gpio_dir); in dib7000p_cfg_gpio()
551 dib7000p_write_word(st, 1030, st->gpio_val); in dib7000p_cfg_gpio()
657 dib7000p_write_word(state, 770, 0xffff); in dib7000p_demod_reset()
658 dib7000p_write_word(state, 771, 0xffff); in dib7000p_demod_reset()
659 dib7000p_write_word(state, 772, 0x001f); in dib7000p_demod_reset()
660 dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3))); in dib7000p_demod_reset()
662 dib7000p_write_word(state, 770, 0); in dib7000p_demod_reset()
663 dib7000p_write_word(state, 771, 0); in dib7000p_demod_reset()
664 dib7000p_write_word(state, 772, 0); in dib7000p_demod_reset()
665 dib7000p_write_word(state, 1280, 0); in dib7000p_demod_reset()
668 dib7000p_write_word(state, 898, 0x0003); in dib7000p_demod_reset()
669 dib7000p_write_word(state, 898, 0); in dib7000p_demod_reset()
679 dib7000p_write_word(state, 899, 0); in dib7000p_demod_reset()
682 dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */ in dib7000p_demod_reset()
683 dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */ in dib7000p_demod_reset()
684 dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */ in dib7000p_demod_reset()
685 dib7000p_write_word(state, 273, (0<<6) | 30); in dib7000p_demod_reset()
695 dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1)); in dib7000p_demod_reset()
700 …dib7000p_write_word(state, 36, 0x0755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noi… in dib7000p_demod_reset()
703 dib7000p_write_word(state, 36, 0x0755); in dib7000p_demod_reset()
705 dib7000p_write_word(state, 36, 0x1f55); in dib7000p_demod_reset()
710 dib7000p_write_word(state, 901, 0x0006); in dib7000p_demod_reset()
711 dib7000p_write_word(state, 902, (3 << 10) | (1 << 6)); in dib7000p_demod_reset()
712 dib7000p_write_word(state, 905, 0x2c8e); in dib7000p_demod_reset()
724 dib7000p_write_word(state, 903, (tmp | 0x1)); in dib7000p_pll_clk_cfg()
726 dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6)); in dib7000p_pll_clk_cfg()
732 dib7000p_write_word(state, 770, (1 << 11) | (1 << 9)); in dib7000p_restart_agc()
733 dib7000p_write_word(state, 770, 0x0000); in dib7000p_restart_agc()
773 dib7000p_write_word(state, 75, agc->setup); in dib7000p_set_agc_config()
774 dib7000p_write_word(state, 76, agc->inv_gain); in dib7000p_set_agc_config()
775 dib7000p_write_word(state, 77, agc->time_stabiliz); in dib7000p_set_agc_config()
776 dib7000p_write_word(state, 100, (agc->alpha_level << 12) | agc->thlock); in dib7000p_set_agc_config()
779 dib7000p_write_word(state, 101, (agc->alpha_mant << 5) | agc->alpha_exp); in dib7000p_set_agc_config()
780 dib7000p_write_word(state, 102, (agc->beta_mant << 6) | agc->beta_exp); in dib7000p_set_agc_config()
787 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | state->wbd_ref); in dib7000p_set_agc_config()
789 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | agc->wbd_ref); in dib7000p_set_agc_config()
791 …dib7000p_write_word(state, 106, (agc->wbd_sel << 13) | (agc->wbd_alpha << 9) | (agc->perform_agc_s… in dib7000p_set_agc_config()
793 dib7000p_write_word(state, 107, agc->agc1_max); in dib7000p_set_agc_config()
794 dib7000p_write_word(state, 108, agc->agc1_min); in dib7000p_set_agc_config()
795 dib7000p_write_word(state, 109, agc->agc2_max); in dib7000p_set_agc_config()
796 dib7000p_write_word(state, 110, agc->agc2_min); in dib7000p_set_agc_config()
797 dib7000p_write_word(state, 111, (agc->agc1_pt1 << 8) | agc->agc1_pt2); in dib7000p_set_agc_config()
798 dib7000p_write_word(state, 112, agc->agc1_pt3); in dib7000p_set_agc_config()
799 dib7000p_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2); in dib7000p_set_agc_config()
800 dib7000p_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2); in dib7000p_set_agc_config()
801 dib7000p_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2); in dib7000p_set_agc_config()
831 dib7000p_write_word(state, 21, (u16) (((dds >> 16) & 0x1ff) | (0 << 10) | (invert << 9))); in dib7000p_set_dds()
832 dib7000p_write_word(state, 22, (u16) (dds & 0xffff)); in dib7000p_set_dds()
853 dib7000p_write_word(state, 0x79a, upd_demod_gain_period & 0xFFFF); /* lsb */ in dib7000p_agc_startup()
854 dib7000p_write_word(state, 0x79b, reg | (1 << 14) | ((upd_demod_gain_period >> 16) & 0xFF)); in dib7000p_agc_startup()
858 dib7000p_write_word(state, 0x780, (reg | (0x3)) & (~(1 << 7))); in dib7000p_agc_startup()
885 dib7000p_write_word(state, 78, 32768); in dib7000p_agc_startup()
889 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alp… in dib7000p_agc_startup()
903 dib7000p_write_word(state, 75, state->current_agc->setup | (1 << 4)); /* freeze AGC loop */ in dib7000p_agc_startup()
904 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (2 << 9) | (0 << 8)); /* fas… in dib7000p_agc_startup()
911 dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */ in dib7000p_agc_startup()
913 dib7000p_write_word(state, 75, state->current_agc->setup); /* std AGC loop */ in dib7000p_agc_startup()
914 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alp… in dib7000p_agc_startup()
948 dib7000p_write_word(state, 23, (u16) (timf >> 16)); in dib7000p_update_timf()
949 dib7000p_write_word(state, 24, (u16) (timf & 0xffff)); in dib7000p_update_timf()
1031 dib7000p_write_word(state, 0, value); in dib7000p_set_channel()
1032 dib7000p_write_word(state, 5, (seq << 4) | 1); /* do not force tps, search list 0 */ in dib7000p_set_channel()
1060 dib7000p_write_word(state, 208, value); in dib7000p_set_channel()
1063 dib7000p_write_word(state, 26, 0x6680); in dib7000p_set_channel()
1064 dib7000p_write_word(state, 32, 0x0003); in dib7000p_set_channel()
1065 dib7000p_write_word(state, 29, 0x1273); in dib7000p_set_channel()
1066 dib7000p_write_word(state, 33, 0x0005); in dib7000p_set_channel()
1127 dib7000p_write_word(state, 187 + value, est[value]); in dib7000p_set_channel()
1158 dib7000p_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1159 dib7000p_write_word(state, 7, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1161 dib7000p_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1162 dib7000p_write_word(state, 9, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1164 dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1165 dib7000p_write_word(state, 11, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1168 dib7000p_write_word(state, 0, (u16) ((1 << 9) | value)); in dib7000p_autosearch_start()
1170 dib7000p_write_word(state, 0, (u16) value); in dib7000p_autosearch_start()
1225 dib7000p_write_word(state, 142, 0x0610); in dib7000p_spur_protect()
1270 dib7000p_write_word(state, 143, (0 << 14) | (k << 10) | (coef_re[k] & 0x3ff)); in dib7000p_spur_protect()
1271 dib7000p_write_word(state, 144, coef_im[k] & 0x3ff); in dib7000p_spur_protect()
1272 dib7000p_write_word(state, 143, (1 << 14) | (k << 10) | (coef_re[k] & 0x3ff)); in dib7000p_spur_protect()
1274 dib7000p_write_word(state, 143, 0); in dib7000p_spur_protect()
1289 dib7000p_write_word(state, 770, 0x4000); in dib7000p_tune()
1290 dib7000p_write_word(state, 770, 0x0000); in dib7000p_tune()
1298 dib7000p_write_word(state, 166, 0x4000); in dib7000p_tune()
1300 dib7000p_write_word(state, 166, 0x0000); in dib7000p_tune()
1302 dib7000p_write_word(state, 29, tmp); in dib7000p_tune()
1324 dib7000p_write_word(state, 26, tmp); /* timf_a(6xxx) */ in dib7000p_tune()
1340 dib7000p_write_word(state, 32, tmp); in dib7000p_tune()
1356 dib7000p_write_word(state, 33, tmp); in dib7000p_tune()
1362 dib7000p_write_word(state, 771, tmp | (1 << 1)); in dib7000p_tune()
1363 dib7000p_write_word(state, 771, tmp); in dib7000p_tune()
1372 dib7000p_write_word(state, 26, (tmp & ~(0xf << 12)) | ((((tmp >> 12) & 0xf) + 5) << 12)); in dib7000p_tune()
2073 return dib7000p_write_word(state, 235, val); in dib7000p_pid_filter_ctrl()
2080 return dib7000p_write_word(state, 241 + id, onoff ? (1 << 13) | pid : 0); in dib7000p_pid_filter()
2105 dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */ in dib7000p_i2c_enumeration()
2108 dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */ in dib7000p_i2c_enumeration()
2120 dib7000p_write_word(dpst, 1285, (new_addr << 2) | 0x2); in dib7000p_i2c_enumeration()
2133 dib7000p_write_word(dpst, 1285, dpst->i2c_addr << 2); in dib7000p_i2c_enumeration()
2209 dib7000p_write_word(state, 1985, (1 << 6) | (serpar_num & 0x3f)); in w7090p_tuner_write_serpar()
2210 dib7000p_write_word(state, 1986, (msg[0].buf[1] << 8) | msg[0].buf[2]); in w7090p_tuner_write_serpar()
2229 dib7000p_write_word(state, 1985, (0 << 6) | (serpar_num & 0x3f)); in w7090p_tuner_read_serpar()
2264 dib7000p_write_word(state, apb_address, ((msg[0].buf[1] << 8) | (msg[0].buf[2]))); in dib7090p_rw_on_apb()
2376 dib7000p_write_word(state, 72, word); /* Set the proper input */ in dib7090_tuner_xfer()
2412 dib7000p_write_word(state, 1798, reg); in dib7090_host_bus_drive()
2417 dib7000p_write_word(state, 1799, reg); in dib7090_host_bus_drive()
2422 dib7000p_write_word(state, 1800, reg); in dib7090_host_bus_drive()
2427 dib7000p_write_word(state, 1801, reg); in dib7090_host_bus_drive()
2432 dib7000p_write_word(state, 1802, reg); in dib7090_host_bus_drive()
2459 dib7000p_write_word(state, 1615, 1); in dib7090_cfg_DibTx()
2460 dib7000p_write_word(state, 1603, P_Kin); in dib7090_cfg_DibTx()
2461 dib7000p_write_word(state, 1605, P_Kout); in dib7090_cfg_DibTx()
2462 dib7000p_write_word(state, 1606, insertExtSynchro); in dib7090_cfg_DibTx()
2463 dib7000p_write_word(state, 1608, synchroMode); in dib7090_cfg_DibTx()
2464 dib7000p_write_word(state, 1609, (syncWord >> 16) & 0xffff); in dib7090_cfg_DibTx()
2465 dib7000p_write_word(state, 1610, syncWord & 0xffff); in dib7090_cfg_DibTx()
2466 dib7000p_write_word(state, 1612, syncSize); in dib7090_cfg_DibTx()
2467 dib7000p_write_word(state, 1615, 0); in dib7090_cfg_DibTx()
2480 dib7000p_write_word(state, 1542, syncFreq); in dib7090_cfg_DibRx()
2482 dib7000p_write_word(state, 1554, 1); in dib7090_cfg_DibRx()
2483 dib7000p_write_word(state, 1536, P_Kin); in dib7090_cfg_DibRx()
2484 dib7000p_write_word(state, 1537, P_Kout); in dib7090_cfg_DibRx()
2485 dib7000p_write_word(state, 1539, synchroMode); in dib7090_cfg_DibRx()
2486 dib7000p_write_word(state, 1540, (syncWord >> 16) & 0xffff); in dib7090_cfg_DibRx()
2487 dib7000p_write_word(state, 1541, syncWord & 0xffff); in dib7090_cfg_DibRx()
2488 dib7000p_write_word(state, 1543, syncSize); in dib7090_cfg_DibRx()
2489 dib7000p_write_word(state, 1544, dataOutRate); in dib7090_cfg_DibRx()
2490 dib7000p_write_word(state, 1554, 0); in dib7090_cfg_DibRx()
2508 dib7000p_write_word(state, 1287, reg_1287); in dib7090_enMpegMux()
2522 dib7000p_write_word(state, 1287, ((pulseWidth & 0x1f) << 2) in dib7090_configMpegMux()
2552 dib7000p_write_word(state, 1288, reg_1288); in dib7090_setDibTxMux()
2577 dib7000p_write_word(state, 1288, reg_1288); in dib7090_setHostBusMux()
2597 dib7000p_write_word(state, 1287, reg_1287); in dib7090_set_diversity_in()
2688 ret |= dib7000p_write_word(state, 235, smo_mode); in dib7090_set_output_mode()
2689 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ in dib7090_set_output_mode()
2690 ret |= dib7000p_write_word(state, 1286, outreg); in dib7090_set_output_mode()
2714 dib7000p_write_word(state, 1922, en_cur_state); in dib7090_tuner_sleep()
2730 dib7000p_write_word(state, 1794, reg | (4 << 12)); in dib7090_slave_reset()
2732 dib7000p_write_word(state, 1032, 0xffff); in dib7090_slave_reset()
2762 dib7000p_write_word(st, 1287, 0x0003); /* sram lead in, rdy */ in dib7000p_init()