6 static int vbi_workaround(struct saa7146_dev *dev)  in vbi_workaround()  argument
8 	struct saa7146_vv *vv = dev->vv_data;  in vbi_workaround()
18 	DEB_VBI("dev:%p\n", dev);  in vbi_workaround()
25 	cpu = dma_alloc_coherent(&dev->pci->dev, 4096, &dma_addr, GFP_KERNEL);  in vbi_workaround()
30 	saa7146_write(dev, BASE_EVEN3,	dma_addr);  in vbi_workaround()
31 	saa7146_write(dev, BASE_ODD3,	dma_addr+vbi_pixel_to_capture);  in vbi_workaround()
32 	saa7146_write(dev, PROT_ADDR3,	dma_addr+4096);  in vbi_workaround()
33 	saa7146_write(dev, PITCH3,	vbi_pixel_to_capture);  in vbi_workaround()
34 	saa7146_write(dev, BASE_PAGE3,	0x0);  in vbi_workaround()
35 	saa7146_write(dev, NUM_LINE_BYTE3, (2<<16)|((vbi_pixel_to_capture)<<0));  in vbi_workaround()
36 	saa7146_write(dev, MC2, MASK_04|MASK_20);  in vbi_workaround()
43 	if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) {  in vbi_workaround()
89 		saa7146_write(dev, MC2, MASK_31|MASK_15);  in vbi_workaround()
91 		saa7146_write(dev, NUM_LINE_BYTE3, (1<<16)|(2<<0));  in vbi_workaround()
92 		saa7146_write(dev, MC2, MASK_04|MASK_20);  in vbi_workaround()
95 		SAA7146_IER_ENABLE(dev,MASK_28);  in vbi_workaround()
102 		saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);  in vbi_workaround()
103 		saa7146_write(dev, MC1, (MASK_13 | MASK_29));  in vbi_workaround()
113 		SAA7146_IER_DISABLE(dev,MASK_28);  in vbi_workaround()
116 		saa7146_write(dev, MC1, MASK_20);  in vbi_workaround()
121 				saa7146_read(dev, RPS_ADDR1));  in vbi_workaround()
124 			saa7146_write(dev, MC1, MASK_29);  in vbi_workaround()
126 			dma_free_coherent(&dev->pci->dev, 4096, cpu, dma_addr);  in vbi_workaround()
131 	dma_free_coherent(&dev->pci->dev, 4096, cpu, dma_addr);  in vbi_workaround()
135 static void saa7146_set_vbi_capture(struct saa7146_dev *dev, struct saa7146_buf *buf, struct saa714…  in saa7146_set_vbi_capture()  argument
137 	struct saa7146_vv *vv = dev->vv_data;  in saa7146_set_vbi_capture()
160 	saa7146_write_out_dma(dev, 3, &vdma3);  in saa7146_set_vbi_capture()
196 	SAA7146_IER_ENABLE(dev, MASK_28);  in saa7146_set_vbi_capture()
199 	saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);  in saa7146_set_vbi_capture()
202 	saa7146_write(dev, MC1, (MASK_13 | MASK_29));  in saa7146_set_vbi_capture()
205 static int buffer_activate(struct saa7146_dev *dev,  in buffer_activate()  argument
209 	struct saa7146_vv *vv = dev->vv_data;  in buffer_activate()
211 	DEB_VBI("dev:%p, buf:%p, next:%p\n", dev, buf, next);  in buffer_activate()
212 	saa7146_set_vbi_capture(dev,buf,next);  in buffer_activate()
238 	struct saa7146_dev *dev = vb2_get_drv_priv(vq);  in buf_queue()  local
242 	spin_lock_irqsave(&dev->slock, flags);  in buf_queue()
244 	saa7146_buffer_queue(dev, &dev->vv_data->vbi_dmaq, buf);  in buf_queue()
245 	spin_unlock_irqrestore(&dev->slock, flags);  in buf_queue()
256 	struct saa7146_dev *dev = vb2_get_drv_priv(vq);  in buf_init()  local
261 	saa7146_pgtable_alloc(dev->pci, &buf->pt[2]);  in buf_init()
263 	ret = saa7146_pgtable_build_single(dev->pci, &buf->pt[2],  in buf_init()
266 		saa7146_pgtable_free(dev->pci, &buf->pt[2]);  in buf_init()
285 	struct saa7146_dev *dev = vb2_get_drv_priv(vq);  in buf_cleanup()  local
287 	saa7146_pgtable_free(dev->pci, &buf->pt[2]);  in buf_cleanup()
292 	struct saa7146_dev *dev = vb2_get_drv_priv(q);  in return_buffers()  local
293 	struct saa7146_dmaqueue *dq = &dev->vv_data->vbi_dmaq;  in return_buffers()
308 static void vbi_stop(struct saa7146_dev *dev)  in vbi_stop()  argument
310 	struct saa7146_vv *vv = dev->vv_data;  in vbi_stop()
312 	DEB_VBI("dev:%p\n", dev);  in vbi_stop()
314 	spin_lock_irqsave(&dev->slock,flags);  in vbi_stop()
317 	saa7146_write(dev, MC1, MASK_29);  in vbi_stop()
320 	SAA7146_IER_DISABLE(dev, MASK_28);  in vbi_stop()
323 	saa7146_write(dev, MC1, MASK_20);  in vbi_stop()
328 	spin_unlock_irqrestore(&dev->slock, flags);  in vbi_stop()
334 	struct saa7146_dev *dev = vv->vbi_dmaq.dev;  in vbi_read_timeout()  local
336 	DEB_VBI("dev:%p\n", dev);  in vbi_read_timeout()
338 	vbi_stop(dev);  in vbi_read_timeout()
341 static int vbi_begin(struct saa7146_dev *dev)  in vbi_begin()  argument
343 	struct saa7146_vv *vv = dev->vv_data;  in vbi_begin()
344 	u32 arbtr_ctrl	= saa7146_read(dev, PCI_BT_V1);  in vbi_begin()
347 	DEB_VBI("dev:%p\n", dev);  in vbi_begin()
349 	ret = saa7146_res_get(dev, RESOURCE_DMA3_BRS);  in vbi_begin()
358 	saa7146_write(dev, PCI_BT_V1, arbtr_ctrl);  in vbi_begin()
359 	saa7146_write(dev, MC2, (MASK_04|MASK_20));  in vbi_begin()
364 	if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) {  in vbi_begin()
365 		saa7146_write(dev, BRS_CTRL, MASK_30|MASK_29 | (7 << 19));  in vbi_begin()
367 		saa7146_write(dev, BRS_CTRL, 0x00000001);  in vbi_begin()
369 		if (0 != (ret = vbi_workaround(dev))) {  in vbi_begin()
376 	saa7146_write(dev, MC2, (MASK_08|MASK_24));  in vbi_begin()
382 	struct saa7146_dev *dev = vb2_get_drv_priv(q);  in start_streaming()  local
385 	if (!vb2_is_streaming(&dev->vv_data->vbi_dmaq.q))  in start_streaming()
386 		dev->vv_data->seqnr = 0;  in start_streaming()
387 	ret = vbi_begin(dev);  in start_streaming()
395 	struct saa7146_dev *dev = vb2_get_drv_priv(q);  in stop_streaming()  local
397 	vbi_stop(dev);  in stop_streaming()
399 	saa7146_res_free(dev, RESOURCE_DMA3_BRS);  in stop_streaming()
416 static void vbi_init(struct saa7146_dev *dev, struct saa7146_vv *vv)  in vbi_init()  argument
418 	DEB_VBI("dev:%p\n", dev);  in vbi_init()
423 	vv->vbi_dmaq.dev              = dev;  in vbi_init()
428 static void vbi_irq_done(struct saa7146_dev *dev, unsigned long status)  in vbi_irq_done()  argument
430 	struct saa7146_vv *vv = dev->vv_data;  in vbi_irq_done()
431 	spin_lock(&dev->slock);  in vbi_irq_done()
434 		DEB_VBI("dev:%p, curr:%p\n", dev, vv->vbi_dmaq.curr);  in vbi_irq_done()
435 		saa7146_buffer_finish(dev, &vv->vbi_dmaq, VB2_BUF_STATE_DONE);  in vbi_irq_done()
437 		DEB_VBI("dev:%p\n", dev);  in vbi_irq_done()
439 	saa7146_buffer_next(dev, &vv->vbi_dmaq, 1);  in vbi_irq_done()
441 	spin_unlock(&dev->slock);  in vbi_irq_done()