Lines Matching defs:pdc_state
281 struct pdc_state { struct
283 u8 pdc_idx;
286 struct platform_device *pdev;
293 struct mbox_controller mbc;
295 unsigned int pdc_irq;
298 struct tasklet_struct rx_tasklet;
301 u32 rx_status_len;
303 bool use_bcm_hdr;
305 u32 pdc_resp_hdr_len;
308 void __iomem *pdc_reg_vbase;
311 struct dma_pool *ring_pool;
314 struct dma_pool *rx_buf_pool;
320 struct pdc_ring_alloc tx_ring_alloc;
321 struct pdc_ring_alloc rx_ring_alloc;
323 struct pdc_regs *regs; /* start of PDC registers */
325 struct dma64_regs *txregs_64; /* dma tx engine registers */
326 struct dma64_regs *rxregs_64; /* dma rx engine registers */
332 struct dma64dd *txd_64; /* tx descriptor ring */
333 struct dma64dd *rxd_64; /* rx descriptor ring */
336 u32 ntxd; /* # tx descriptors */
337 u32 nrxd; /* # rx descriptors */
338 u32 nrxpost; /* # rx buffers to keep posted */
339 u32 ntxpost; /* max number of tx buffers that can be posted */
346 u32 txin;
354 u32 tx_msg_start;
357 u32 txout;
363 u32 txin_numd[PDC_RING_ENTRIES];
369 u32 rxin;
377 u32 rx_msg_start;
384 u32 last_rx_curr;
387 u32 rxout;
389 struct pdc_rx_ctx rx_ctx[PDC_RING_ENTRIES];
396 struct scatterlist *src_sg[PDC_RING_ENTRIES];
399 u32 pdc_requests; /* number of request messages submitted */
400 u32 pdc_replies; /* number of reply messages received */
401 u32 last_tx_not_done; /* too few tx descriptors to indicate done */
402 u32 tx_ring_full; /* unable to accept msg because tx ring full */
403 u32 rx_ring_full; /* unable to accept msg because rx ring full */
427 struct pdc_state *pdcs; in pdc_debugfs_read() argument