17 #define LPG_SUBTYPE_REG		0x05
18 #define  LPG_SUBTYPE_LPG	0x2
19 #define  LPG_SUBTYPE_PWM	0xb
20 #define  LPG_SUBTYPE_HI_RES_PWM	0xc
21 #define  LPG_SUBTYPE_LPG_LITE	0x11
22 #define LPG_PATTERN_CONFIG_REG	0x40
23 #define LPG_SIZE_CLK_REG	0x41
24 #define  PWM_CLK_SELECT_MASK	GENMASK(1, 0)
25 #define  PWM_CLK_SELECT_HI_RES_MASK	GENMASK(2, 0)
27 #define LPG_PREDIV_CLK_REG	0x42
29 #define  PWM_FREQ_EXP_MASK	GENMASK(2, 0)
30 #define PWM_TYPE_CONFIG_REG	0x43
31 #define PWM_VALUE_REG		0x44
32 #define PWM_ENABLE_CONTROL_REG	0x46
33 #define PWM_SYNC_REG		0x47
34 #define LPG_RAMP_DURATION_REG	0x50
35 #define LPG_HI_PAUSE_REG	0x52
36 #define LPG_LO_PAUSE_REG	0x54
37 #define LPG_HI_IDX_REG		0x56
38 #define LPG_LO_IDX_REG		0x57
39 #define PWM_SEC_ACCESS_REG	0xd0
40 #define PWM_DTEST_REG(x)	(0xe2 + (x) - 1)
42 #define TRI_LED_SRC_SEL		0x45
43 #define TRI_LED_EN_CTL		0x46
44 #define TRI_LED_ATC_CTL		0x47
46 #define LPG_LUT_REG(x)		(0x40 + (x) * 2)
47 #define RAMP_CONTROL_REG	0xc8
106  * @dtest_line:	DTEST line for output, or 0 if disabled
213 		return 0;  in triled_set()
227 					 0, len, 0);  in lpg_lut_store()
231 	for (i = 0; i < len; i++) {  in lpg_lut_store()
243 	return 0;  in lpg_lut_store()
262 static const unsigned int lpg_clk_rates[] = {0, 1024, 32768, 19200000};
263 static const unsigned int lpg_clk_rates_hi_res[] = {0, 1024, 32768, 19200000, 76800000};
270 	unsigned int i, pwm_resolution_count, best_pwm_resolution_sel = 0;  in lpg_calc_freq()
272 	unsigned int clk_sel, clk_len, best_clk = 0;  in lpg_calc_freq()
273 	unsigned int div, best_div = 0;  in lpg_calc_freq()
274 	unsigned int m, best_m = 0;  in lpg_calc_freq()
279 	u64 best_period = 0;  in lpg_calc_freq()
292 	 * M = [0..7].  in lpg_calc_freq()
314 	min_period = div64_u64((u64)NSEC_PER_SEC * (1 << pwm_resolution_arr[0]),  in lpg_calc_freq()
334 	for (i = 0; i < pwm_resolution_count; i++) {  in lpg_calc_freq()
339 			for (div = 0; div < ARRAY_SIZE(lpg_pre_divs); div++) {  in lpg_calc_freq()
372 	return 0;  in lpg_calc_freq()
436 			   LPG_ENABLE_GLITCH_REMOVAL, 0);  in lpg_enable_glitch()
463 #define LPG_PATTERN_CONFIG_PAUSE_LO	BIT(0)
470 	unsigned int conf = 0;  in lpg_apply_lut_control()
531 #define LPG_SYNC_PWM	BIT(0)
550 		return 0;  in lpg_parse_dtest()
551 	} else if (count < 0) {  in lpg_parse_dtest()
560 	for (i = 0; i < lpg->data->num_channels; i++) {  in lpg_parse_dtest()
574 	return 0;  in lpg_parse_dtest()
588 	regmap_write(lpg->map, chan->base + PWM_SEC_ACCESS_REG, 0xa5);  in lpg_apply_dtest()
609 	unsigned int triled_enabled = 0;  in lpg_brightness_set()
610 	unsigned int triled_mask = 0;  in lpg_brightness_set()
611 	unsigned int lut_mask = 0;  in lpg_brightness_set()
616 	for (i = 0; i < led->num_channels; i++) {  in lpg_brightness_set()
669 	return 0;  in lpg_brightness_single_set()
685 	return 0;  in lpg_brightness_mc_set()
693 	unsigned int triled_mask = 0;  in lpg_blink_set()
706 	for (i = 0; i < led->num_channels; i++) {  in lpg_blink_set()
723 	chan = led->channels[0];  in lpg_blink_set()
728 	return 0;  in lpg_blink_set()
802 	for (i = 0; i < len; i += 2) {  in lpg_pattern_set()
805 		if (led_pattern[i + 1].delta_t != 0)  in lpg_pattern_set()
842 	for (i = 0; i < len / 2; i++) {  in lpg_pattern_set()
879 	lo_pause = pattern[0].delta_t;  in lpg_pattern_set()
884 	if (ret < 0)  in lpg_pattern_set()
887 	for (i = 0; i < led->num_channels; i++) {  in lpg_pattern_set()
917 	if (ret < 0)  in lpg_pattern_single_set()
922 	return 0;  in lpg_pattern_single_set()
934 	if (ret < 0)  in lpg_pattern_mc_set()
940 	return 0;  in lpg_pattern_mc_set()
951 	chan = led->channels[0];  in lpg_pattern_clear()
954 	for (i = 0; i < led->num_channels; i++) {  in lpg_pattern_clear()
956 		chan->pattern_lo_idx = 0;  in lpg_pattern_clear()
957 		chan->pattern_hi_idx = 0;  in lpg_pattern_clear()
962 	return 0;  in lpg_pattern_clear()
985 	return chan->in_use ? -EBUSY : 0;  in lpg_pwm_request()
993  * - A disabled channel outputs a logical 0.
1000 	int ret = 0;  in lpg_pwm_apply()
1009 		if (ret < 0)  in lpg_pwm_apply()
1018 	triled_set(lpg, chan->triled_mask, chan->enabled ? chan->triled_mask : 0);  in lpg_pwm_apply()
1067 		state->period = 0;  in lpg_pwm_get_state()
1068 		state->duty_cycle = 0;  in lpg_pwm_get_state()
1081 	return 0;  in lpg_pwm_get_state()
1124 	if (ret < 0 && ret != -EINVAL) {  in lpg_parse_channel()
1133 	return 0;  in lpg_parse_channel()
1145 	u32 color = 0;  in lpg_add_led()
1150 	if (ret < 0 && ret != -EINVAL) {  in lpg_add_led()
1171 		i = 0;  in lpg_add_led()
1174 			if (ret < 0) {  in lpg_add_led()
1180 			info[i].intensity = 0;  in lpg_add_led()
1197 		ret = lpg_parse_channel(lpg, np, &led->channels[0]);  in lpg_add_led()
1198 		if (ret < 0)  in lpg_add_led()
1247 	for (i = 0; i < data->num_channels; i++) {  in lpg_init_channels()
1258 	return 0;  in lpg_init_channels()
1268 		return 0;  in lpg_init_triled()
1284 		regmap_write(lpg->map, lpg->triled_base + TRI_LED_ATC_CTL, 0);  in lpg_init_triled()
1291 	regmap_write(lpg->map, lpg->triled_base + TRI_LED_EN_CTL, 0);  in lpg_init_triled()
1293 	return 0;  in lpg_init_triled()
1301 		return 0;  in lpg_init_lut()
1310 	return 0;  in lpg_init_lut()
1338 	if (ret < 0)  in lpg_probe()
1342 	if (ret < 0)  in lpg_probe()
1346 	if (ret < 0)  in lpg_probe()
1350 	if (ret < 0)  in lpg_probe()
1361 	for (i = 0; i < lpg->num_channels; i++)  in lpg_probe()
1373 	return 0;  in lpg_remove()
1379 		{ .base = 0xbc00 },
1384 	.lut_base = 0xb000,
1387 	.triled_base = 0xd000,
1393 		{ .base = 0xb100 },
1394 		{ .base = 0xb200 },
1395 		{ .base = 0xb300 },
1396 		{ .base = 0xb400 },
1397 		{ .base = 0xb500, .triled_mask = BIT(5) },
1398 		{ .base = 0xb600, .triled_mask = BIT(6) },
1399 		{ .base = 0xb700, .triled_mask = BIT(7) },
1400 		{ .base = 0xb800 },
1405 	.lut_base = 0xb000,
1410 		{ .base = 0xb100 },
1411 		{ .base = 0xb200 },
1412 		{ .base = 0xb300 },
1413 		{ .base = 0xb400 },
1414 		{ .base = 0xb500 },
1415 		{ .base = 0xb600 },
1421 	.triled_base = 0xd000,
1425 		{ .base = 0xb300, .triled_mask = BIT(7) },
1426 		{ .base = 0xb400, .triled_mask = BIT(6) },
1427 		{ .base = 0xb500, .triled_mask = BIT(5) },
1428 		{ .base = 0xb600 },
1429 		{ .base = 0xb700 },
1434 	.lut_base = 0xb000,
1437 	.triled_base = 0xd000,
1443 		{ .base = 0xb100, .triled_mask = BIT(5) },
1444 		{ .base = 0xb200, .triled_mask = BIT(6) },
1445 		{ .base = 0xb300, .triled_mask = BIT(7) },
1446 		{ .base = 0xb400 },
1451 	.lut_base = 0xb000,
1454 	.triled_base = 0xd000,
1458 		{ .base = 0xb100 },
1459 		{ .base = 0xb200 },
1460 		{ .base = 0xb300, .triled_mask = BIT(5) },
1461 		{ .base = 0xb400, .triled_mask = BIT(6) },
1462 		{ .base = 0xb500, .triled_mask = BIT(7) },
1463 		{ .base = 0xb600 },
1468 	.lut_base = 0xb000,
1471 	.triled_base = 0xd000,
1475 		{ .base = 0xb100, .triled_mask = BIT(7) },
1476 		{ .base = 0xb200, .triled_mask = BIT(6) },
1481 	.lut_base = 0xb000,
1484 	.triled_base = 0xd000,
1488 		{ .base = 0xb100, .triled_mask = BIT(7) },
1489 		{ .base = 0xb200, .triled_mask = BIT(6) },
1490 		{ .base = 0xb300, .triled_mask = BIT(5) },
1491 		{ .base = 0xbc00 },
1492 		{ .base = 0xbd00 },
1498 	.triled_base = 0xef00,
1502 		{ .base = 0xe800, .triled_mask = BIT(7) },
1503 		{ .base = 0xe900, .triled_mask = BIT(6) },
1504 		{ .base = 0xea00, .triled_mask = BIT(5) },
1505 		{ .base = 0xeb00 },
1512 		{ .base = 0xe800 },
1513 		{ .base = 0xe900 },