Lines Matching +full:te +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * hfcmulti.c low level driver for hfc-4s/hfc-8s/hfc-e1 based cards
7 * Peter Sprenger (sprengermoving-bytes.de)
9 * inspired by existing hfc-pci driver:
10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)
22 * Bit 0-7 = 0x00001 = HFC-E1 (1 port)
23 * or Bit 0-7 = 0x00004 = HFC-4S (4 ports)
24 * or Bit 0-7 = 0x00008 = HFC-8S (8 ports)
26 * Bit 9 = 0x00200 = Disable DTMF detect on all B-channels via hardware
38 * example: 0x20204 one HFC-4S with dtmf detection and 128 timeslots on PCM
42 * HFC-4S/HFC-8S only bits:
47 * Bit 2 = 0x004 = Disable E-channel. (No E-channel processing)
48 * example: 0x0001,0x0000,0x0000,0x0000 one HFC-4S with master clock
51 * HFC-E1 only bits:
53 * Bit 1 = 0x0002 = reserved (later for 32 B-channels transparent mode)
58 * Bit 8 = 0x0100 = Turn off CRC-4 Multiframe Mode, use double frame
61 * or Bit 10 = 0x0400 = Force put clock to interface, even in TE mode.
64 * Bit 12-13 = 0xX000 = elastic jitter buffer (1-3), Set both bits to 0
88 * -1 means no support of PCM bus not even.
93 * NOTE: One dmask value must be given for every HFC-E1 card.
94 * If omitted, the E1 card has D-channel on time slot 16, which is default.
98 * value stands for a B-channel. The bmask may not overlap with dmask or
101 * This will create one fragment with D-channel on slot 1 with
102 * B-channels on slots 2..15, and a second fragment with D-channel
103 * on slot 17 with B-channels on slot 18..31. Slot 16 is unused.
104 * If bit 0 is set (dmask=0x00000001) the D-channel is on slot 0 and will
108 * B-channels.
109 * If no bits are set on bmask, no B-channel is created for that fragment.
110 * Example: dmask=0xfffffffe bmask=0,0,0,0.... (31 0-values for bmask)
111 * This will create 31 ports with one D-channel only.
116 * -> See hfc_multi.h for HFC_IO_MODE_* values
132 * of the S/T interfaces in TE mode.
138 * Set to card number starting with 1. Set to -1 to disable.
191 #define CLKDEL_TE 0x0f /* CLKDEL in TE mode */
242 (hc->HFC_outb(hc, reg, val, __func__, __LINE__))
244 (hc->HFC_outb_nodebug(hc, reg, val, __func__, __LINE__))
246 (hc->HFC_inb(hc, reg, __func__, __LINE__))
248 (hc->HFC_inb_nodebug(hc, reg, __func__, __LINE__))
250 (hc->HFC_inw(hc, reg, __func__, __LINE__))
252 (hc->HFC_inw_nodebug(hc, reg, __func__, __LINE__))
254 (hc->HFC_wait(hc, __func__, __LINE__))
256 (hc->HFC_wait_nodebug(hc, __func__, __LINE__))
258 #define HFC_outb(hc, reg, val) (hc->HFC_outb(hc, reg, val))
259 #define HFC_outb_nodebug(hc, reg, val) (hc->HFC_outb_nodebug(hc, reg, val))
260 #define HFC_inb(hc, reg) (hc->HFC_inb(hc, reg))
261 #define HFC_inb_nodebug(hc, reg) (hc->HFC_inb_nodebug(hc, reg))
262 #define HFC_inw(hc, reg) (hc->HFC_inw(hc, reg))
263 #define HFC_inw_nodebug(hc, reg) (hc->HFC_inw_nodebug(hc, reg))
264 #define HFC_wait(hc) (hc->HFC_wait(hc))
265 #define HFC_wait_nodebug(hc) (hc->HFC_wait_nodebug(hc))
281 writeb(val, hc->pci_membase + reg); in HFC_outb_pcimem()
290 return readb(hc->pci_membase + reg); in HFC_inb_pcimem()
299 return readw(hc->pci_membase + reg); in HFC_inw_pcimem()
308 while (readb(hc->pci_membase + R_STATUS) & V_BUSY) in HFC_wait_pcimem()
321 outb(reg, hc->pci_iobase + 4); in HFC_outb_regio()
322 outb(val, hc->pci_iobase); in HFC_outb_regio()
331 outb(reg, hc->pci_iobase + 4); in HFC_inb_regio()
332 return inb(hc->pci_iobase); in HFC_inb_regio()
341 outb(reg, hc->pci_iobase + 4); in HFC_inw_regio()
342 return inw(hc->pci_iobase); in HFC_inw_regio()
351 outb(R_STATUS, hc->pci_iobase + 4); in HFC_wait_regio()
352 while (inb(hc->pci_iobase) & V_BUSY) in HFC_wait_regio()
364 i = -1; in HFC_outb_debug()
382 hc->id, reg, regname, val, bits, function, line); in HFC_outb_debug()
412 hc->id, reg, regname, val, bits, function, line); in HFC_inb_debug()
434 hc->id, reg, regname, val, function, line); in HFC_inw_debug()
441 hc->id, function, line); in HFC_wait_debug()
450 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in write_fifo_regio()
452 outl(cpu_to_le32(*(u32 *)data), hc->pci_iobase); in write_fifo_regio()
454 len -= 4; in write_fifo_regio()
457 outw(cpu_to_le16(*(u16 *)data), hc->pci_iobase); in write_fifo_regio()
459 len -= 2; in write_fifo_regio()
462 outb(*data, hc->pci_iobase); in write_fifo_regio()
464 len--; in write_fifo_regio()
473 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
475 len -= 4; in write_fifo_pcimem()
479 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
481 len -= 2; in write_fifo_pcimem()
484 writeb(*data, hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
486 len--; in write_fifo_pcimem()
494 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in read_fifo_regio()
496 *(u32 *)data = le32_to_cpu(inl(hc->pci_iobase)); in read_fifo_regio()
498 len -= 4; in read_fifo_regio()
501 *(u16 *)data = le16_to_cpu(inw(hc->pci_iobase)); in read_fifo_regio()
503 len -= 2; in read_fifo_regio()
506 *data = inb(hc->pci_iobase); in read_fifo_regio()
508 len--; in read_fifo_regio()
518 le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
520 len -= 4; in read_fifo_pcimem()
524 le16_to_cpu(readw(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
526 len -= 2; in read_fifo_pcimem()
529 *data = readb(hc->pci_membase + A_FIFO_DATA0); in read_fifo_pcimem()
531 len--; in read_fifo_pcimem()
538 hc->hw.r_irq_ctrl |= V_GLOB_IRQ_EN; in enable_hwirq()
539 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in enable_hwirq()
545 hc->hw.r_irq_ctrl &= ~((u_char)V_GLOB_IRQ_EN); in disable_hwirq()
546 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in disable_hwirq()
571 if (!hc->pci_iobase) in readpcibridge()
584 outw(cipv, hc->pci_iobase + 4); in readpcibridge()
585 data = inb(hc->pci_iobase); in readpcibridge()
599 if (!hc->pci_iobase) in writepcibridge()
608 outw(cipv, hc->pci_iobase + 4); in writepcibridge()
620 outl(datav, hc->pci_iobase); in writepcibridge()
721 /* Setup TDM path - sets fsync and tdm_clk as inputs */ in vpm_init()
735 vpm_out(wc, x, 0x33 - i, (mask >> (i << 3)) & 0xff); in vpm_init()
738 printk(KERN_DEBUG "VPM: A-law mode\n"); in vpm_init()
757 * reference at link-time. in vpm_init()
813 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_on()
815 int txadj = -4; in vpm_echocan_on()
818 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_on()
845 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_off()
851 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_off()
901 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
902 if (hc->syncronized) { in hfcmulti_resync()
912 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
913 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
917 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in hfcmulti_resync()
919 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
923 hc->e1_resync |= 1; /* get SYNC_I */ in hfcmulti_resync()
933 "interface.\n", hc->id, hc); in hfcmulti_resync()
935 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
940 if (hc->ctype == HFC_TYPE_E1 in hfcmulti_resync()
941 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) { in hfcmulti_resync()
944 hc->e1_resync |= 2; /* switch to jatt */ in hfcmulti_resync()
952 "with QUARTZ\n", hc->id, hc); in hfcmulti_resync()
953 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
958 "Schedule QUARTZ for HFC-E1\n"); in hfcmulti_resync()
959 hc->e1_resync |= 4; /* switch quartz */ in hfcmulti_resync()
964 "enabled by HFC-%dS\n", hc->ctype); in hfcmulti_resync()
966 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
985 if (hc->syncronized) { in plxsd_checksync()
989 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
990 hc->id); in plxsd_checksync()
997 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
998 hc->id); in plxsd_checksync()
1019 hc->hw.r_cirm |= V_SRES; in release_io_hfcmulti()
1020 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1022 hc->hw.r_cirm &= ~V_SRES; in release_io_hfcmulti()
1023 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1027 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && hc->plx_membase) { in release_io_hfcmulti()
1030 __func__, hc->id + 1); in release_io_hfcmulti()
1032 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in release_io_hfcmulti()
1051 test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */ in release_io_hfcmulti()
1052 if (hc->pci_dev) in release_io_hfcmulti()
1053 pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0); in release_io_hfcmulti()
1054 if (hc->pci_membase) in release_io_hfcmulti()
1055 iounmap(hc->pci_membase); in release_io_hfcmulti()
1056 if (hc->plx_membase) in release_io_hfcmulti()
1057 iounmap(hc->plx_membase); in release_io_hfcmulti()
1058 if (hc->pci_iobase) in release_io_hfcmulti()
1059 release_region(hc->pci_iobase, 8); in release_io_hfcmulti()
1060 if (hc->xhfc_membase) in release_io_hfcmulti()
1061 iounmap((void *)hc->xhfc_membase); in release_io_hfcmulti()
1063 if (hc->pci_dev) { in release_io_hfcmulti()
1064 pci_disable_device(hc->pci_dev); in release_io_hfcmulti()
1065 pci_set_drvdata(hc->pci_dev, NULL); in release_io_hfcmulti()
1088 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1090 memset(&hc->hw, 0, sizeof(struct hfcm_hw)); in init_chip()
1099 err = -EIO; in init_chip()
1105 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ? in init_chip()
1107 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) { in init_chip()
1108 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip); in init_chip()
1122 /* set s-ram size */ in init_chip()
1123 hc->Flen = 0x10; in init_chip()
1124 hc->Zmin = 0x80; in init_chip()
1125 hc->Zlen = 384; in init_chip()
1126 hc->DTMFbase = 0x1000; in init_chip()
1127 if (test_bit(HFC_CHIP_EXRAM_128, &hc->chip)) { in init_chip()
1131 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1132 hc->hw.r_ram_sz = 1; in init_chip()
1133 hc->Flen = 0x20; in init_chip()
1134 hc->Zmin = 0xc0; in init_chip()
1135 hc->Zlen = 1856; in init_chip()
1136 hc->DTMFbase = 0x2000; in init_chip()
1138 if (test_bit(HFC_CHIP_EXRAM_512, &hc->chip)) { in init_chip()
1142 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1143 hc->hw.r_ram_sz = 2; in init_chip()
1144 hc->Flen = 0x20; in init_chip()
1145 hc->Zmin = 0xc0; in init_chip()
1146 hc->Zlen = 8000; in init_chip()
1147 hc->DTMFbase = 0x2000; in init_chip()
1149 if (hc->ctype == HFC_TYPE_XHFC) { in init_chip()
1150 hc->Flen = 0x8; in init_chip()
1151 hc->Zmin = 0x0; in init_chip()
1152 hc->Zlen = 64; in init_chip()
1153 hc->DTMFbase = 0x0; in init_chip()
1155 hc->max_trans = poll << 1; in init_chip()
1156 if (hc->max_trans > hc->Zlen) in init_chip()
1157 hc->max_trans = hc->Zlen; in init_chip()
1160 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1163 __func__, hc->id + 1); in init_chip()
1165 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1189 if (test_bit(HFC_CHIP_PLXSD, &pos->chip)) { in init_chip()
1199 __func__, plx_last_hc->id + 1); in init_chip()
1201 plx_acc_32 = plx_last_hc->plx_membase + PLX_GPIOC; in init_chip()
1212 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1215 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1216 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1218 /* we only want the real Z2 read-pointer for revision > 0 */ in init_chip()
1219 if (!test_bit(HFC_CHIP_REVISION0, &hc->chip)) in init_chip()
1220 hc->hw.r_ram_sz |= V_FZ_MD; in init_chip()
1223 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1228 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) && !plxsd_master) { in init_chip()
1232 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1240 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl); in init_chip()
1241 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1245 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1247 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1248 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES; in init_chip()
1250 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES in init_chip()
1252 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1254 hc->hw.r_cirm = 0; in init_chip()
1255 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1257 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1258 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1261 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1263 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1266 if (hc->hw.r_pcm_md0 & V_PCM_MD) { in init_chip()
1284 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x90); in init_chip()
1285 if (hc->slots == 32) in init_chip()
1287 if (hc->slots == 64) in init_chip()
1289 if (hc->slots == 128) in init_chip()
1291 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0xa0); in init_chip()
1292 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in init_chip()
1294 else if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1298 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1302 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1304 hc->slot_owner[i] = -1; in init_chip()
1308 if (test_bit(HFC_CHIP_CLOCK2, &hc->chip)) { in init_chip()
1315 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1319 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in init_chip()
1320 printk(KERN_NOTICE "Setting GPIOs\n"); in init_chip()
1334 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1337 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1346 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1349 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) in init_chip()
1352 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in init_chip()
1358 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in init_chip()
1362 err = -EIO; in init_chip()
1365 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1370 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in init_chip()
1375 err = -EIO; in init_chip()
1379 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1381 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1391 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1392 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1393 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1396 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1404 &hc->chip); in init_chip()
1413 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1414 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1417 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1428 if (hc->pcm) in init_chip()
1430 hc->pcm); in init_chip()
1432 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) in init_chip()
1433 || test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1436 hc->pcm = PCM_cnt; in init_chip()
1438 "(auto selected)\n", hc->pcm); in init_chip()
1443 hc->hw.r_irqmsk_misc |= V_TI_IRQMSK; in init_chip()
1446 if (hc->ctype == HFC_TYPE_E1) in init_chip()
1447 hc->hw.r_irqmsk_misc |= V_STA_IRQMSK; in init_chip()
1450 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) { in init_chip()
1453 "for all B-channel\n", __func__); in init_chip()
1454 hc->hw.r_dtmf = V_DTMF_EN | V_DTMF_STOP; in init_chip()
1455 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1456 hc->hw.r_dtmf |= V_ULAW_SEL; in init_chip()
1457 HFC_outb(hc, R_DTMF_N, 102 - 1); in init_chip()
1458 hc->hw.r_irqmsk_misc |= V_DTMF_IRQMSK; in init_chip()
1462 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1466 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1470 switch (hc->leds) { in init_chip()
1471 case 1: /* HFC-E1 OEM */ in init_chip()
1472 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in init_chip()
1483 case 2: /* HFC-4S OEM */ in init_chip()
1491 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) { in init_chip()
1492 hc->hw.r_st_sync = 0x10; /* V_AUTO_SYNCI */ in init_chip()
1493 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1497 if (hc->masterclk >= 0) { in init_chip()
1501 __func__, hc->masterclk, hc->ports - 1); in init_chip()
1502 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC); in init_chip()
1503 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1509 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc); in init_chip()
1512 hc->hw.r_irqmsk_misc); in init_chip()
1534 printk(KERN_DEBUG "aborting - %d RAM access errors\n", err); in init_chip()
1535 err = -EIO; in init_chip()
1542 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1553 hc->wdcount++; in hfcmulti_watchdog()
1555 if (hc->wdcount > 10) { in hfcmulti_watchdog()
1556 hc->wdcount = 0; in hfcmulti_watchdog()
1557 hc->wdbyte = hc->wdbyte == V_GPIO_OUT2 ? in hfcmulti_watchdog()
1560 /* printk("Sending Watchdog Kill %x\n",hc->wdbyte); */ in hfcmulti_watchdog()
1562 HFC_outb(hc, R_GPIO_OUT0, hc->wdbyte); in hfcmulti_watchdog()
1580 switch (hc->leds) { in hfcmulti_leds()
1581 case 1: /* HFC-E1 OEM */ in hfcmulti_leds()
1592 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_leds()
1594 if (hc->chan[hc->dnum[0]].los) in hfcmulti_leds()
1596 if (hc->e1_state != 1) { in hfcmulti_leds()
1598 hc->flash[2] = 0; in hfcmulti_leds()
1599 hc->flash[3] = 0; in hfcmulti_leds()
1603 if (!hc->flash[2] && hc->activity_tx) in hfcmulti_leds()
1604 hc->flash[2] = poll; in hfcmulti_leds()
1605 if (!hc->flash[3] && hc->activity_rx) in hfcmulti_leds()
1606 hc->flash[3] = poll; in hfcmulti_leds()
1607 if (hc->flash[2] && hc->flash[2] < 1024) in hfcmulti_leds()
1609 if (hc->flash[3] && hc->flash[3] < 1024) in hfcmulti_leds()
1611 if (hc->flash[2] >= 2048) in hfcmulti_leds()
1612 hc->flash[2] = 0; in hfcmulti_leds()
1613 if (hc->flash[3] >= 2048) in hfcmulti_leds()
1614 hc->flash[3] = 0; in hfcmulti_leds()
1615 if (hc->flash[2]) in hfcmulti_leds()
1616 hc->flash[2] += poll; in hfcmulti_leds()
1617 if (hc->flash[3]) in hfcmulti_leds()
1618 hc->flash[3] += poll; in hfcmulti_leds()
1623 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1625 hc->ledstate = leds; in hfcmulti_leds()
1629 case 2: /* HFC-4S OEM */ in hfcmulti_leds()
1636 active = -1; in hfcmulti_leds()
1637 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1639 state = dch->state; in hfcmulti_leds()
1640 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1648 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1649 if (!hc->flash[i] && in hfcmulti_leds()
1650 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1651 hc->flash[i] = poll; in hfcmulti_leds()
1652 if (hc->flash[i] && hc->flash[i] < 1024) in hfcmulti_leds()
1654 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1655 hc->flash[i] = 0; in hfcmulti_leds()
1656 if (hc->flash[i]) in hfcmulti_leds()
1657 hc->flash[i] += poll; in hfcmulti_leds()
1660 hc->flash[i] = 0; in hfcmulti_leds()
1665 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in hfcmulti_leds()
1676 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1678 hc->ledstate = leds; in hfcmulti_leds()
1685 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1688 hc->ledstate = leds; in hfcmulti_leds()
1700 active = -1; in hfcmulti_leds()
1701 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1703 state = dch->state; in hfcmulti_leds()
1704 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1712 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1713 if (!hc->flash[i] && in hfcmulti_leds()
1714 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1715 hc->flash[i] = poll; in hfcmulti_leds()
1716 if (hc->flash[i] < 1024) in hfcmulti_leds()
1718 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1719 hc->flash[i] = 0; in hfcmulti_leds()
1720 if (hc->flash[i]) in hfcmulti_leds()
1721 hc->flash[i] += poll; in hfcmulti_leds()
1724 hc->flash[i] = 0; in hfcmulti_leds()
1731 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1736 hc->ledstate = leds; in hfcmulti_leds()
1747 active = -1; in hfcmulti_leds()
1748 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1750 state = dch->state; in hfcmulti_leds()
1751 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1759 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1760 if (!hc->flash[i] && in hfcmulti_leds()
1761 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1762 hc->flash[i] = poll; in hfcmulti_leds()
1763 if (hc->flash[i] < 1024) in hfcmulti_leds()
1765 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1766 hc->flash[i] = 0; in hfcmulti_leds()
1767 if (hc->flash[i]) in hfcmulti_leds()
1768 hc->flash[i] += poll; in hfcmulti_leds()
1770 hc->flash[i] = 0; in hfcmulti_leds()
1774 if (leddw != hc->ledstate) { in hfcmulti_leds()
1779 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_leds()
1780 outl(leddw, hc->pci_iobase); in hfcmulti_leds()
1782 hc->ledstate = leddw; in hfcmulti_leds()
1786 hc->activity_tx = 0; in hfcmulti_leds()
1787 hc->activity_rx = 0; in hfcmulti_leds()
1810 /* only process enabled B-channels */ in hfcmulti_dtmf()
1811 bch = hc->chan[ch].bch; in hfcmulti_dtmf()
1814 if (!hc->created[hc->chan[ch].port]) in hfcmulti_dtmf()
1816 if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_dtmf()
1821 coeff = &(hc->chan[ch].coeff[hc->chan[ch].coeff_count * 16]); in hfcmulti_dtmf()
1824 /* read W(n-1) coefficient */ in hfcmulti_dtmf()
1825 addr = hc->DTMFbase + ((co << 7) | (ch << 2)); in hfcmulti_dtmf()
1842 mantissa <<= (exponent - 1); in hfcmulti_dtmf()
1861 mantissa <<= (exponent - 1); in hfcmulti_dtmf()
1872 hc->chan[ch].coeff_count++; in hfcmulti_dtmf()
1873 if (hc->chan[ch].coeff_count == 8) { in hfcmulti_dtmf()
1874 hc->chan[ch].coeff_count = 0; in hfcmulti_dtmf()
1882 hh->prim = PH_CONTROL_IND; in hfcmulti_dtmf()
1883 hh->id = DTMF_HFC_COEF; in hfcmulti_dtmf()
1884 skb_put_data(skb, hc->chan[ch].coeff, 512); in hfcmulti_dtmf()
1890 hc->dtmf = dtmf; in hfcmulti_dtmf()
1892 HFC_outb_nodebug(hc, R_DTMF, hc->hw.r_dtmf | V_RST_DTMF); in hfcmulti_dtmf()
1913 bch = hc->chan[ch].bch; in hfcmulti_tx()
1914 dch = hc->chan[ch].dch; in hfcmulti_tx()
1918 txpending = &hc->chan[ch].txpending; in hfcmulti_tx()
1919 slot_tx = hc->chan[ch].slot_tx; in hfcmulti_tx()
1921 if (!test_bit(FLG_ACTIVE, &dch->Flags)) in hfcmulti_tx()
1923 sp = &dch->tx_skb; in hfcmulti_tx()
1924 idxp = &dch->tx_idx; in hfcmulti_tx()
1926 if (!test_bit(FLG_ACTIVE, &bch->Flags)) in hfcmulti_tx()
1928 sp = &bch->tx_skb; in hfcmulti_tx()
1929 idxp = &bch->tx_idx; in hfcmulti_tx()
1932 len = (*sp)->len; in hfcmulti_tx()
1937 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_tx()
1938 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_tx()
1939 (hc->chan[ch].slot_rx < 0) && in hfcmulti_tx()
1940 (hc->chan[ch].slot_tx < 0)) in hfcmulti_tx()
1954 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_tx()
1961 __func__, hc->id + 1, temp, f2); in hfcmulti_tx()
1964 Fspace = f2 - f1 - 1; in hfcmulti_tx()
1966 Fspace += hc->Flen; in hfcmulti_tx()
1973 if (test_bit(HFC_CHIP_REVISION0, &hc->chip)) { in hfcmulti_tx()
1979 /* one frame only for ST D-channels, to allow resending */ in hfcmulti_tx()
1980 if (hc->ctype != HFC_TYPE_E1 && dch) { in hfcmulti_tx()
1984 /* F-counter full condition */ in hfcmulti_tx()
1988 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_tx()
1989 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_tx()
1990 while (z2 != (temp = (HFC_inw_nodebug(hc, A_Z2) - hc->Zmin))) { in hfcmulti_tx()
1993 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_tx()
1996 hc->chan[ch].Zfill = z1 - z2; in hfcmulti_tx()
1997 if (hc->chan[ch].Zfill < 0) in hfcmulti_tx()
1998 hc->chan[ch].Zfill += hc->Zlen; in hfcmulti_tx()
1999 Zspace = z2 - z1; in hfcmulti_tx()
2001 Zspace += hc->Zlen; in hfcmulti_tx()
2002 Zspace -= 4; /* keep not too full, so pointers will not overrun */ in hfcmulti_tx()
2004 if (bch && test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_tx()
2005 Zspace = Zspace - hc->Zlen + hc->max_trans; in hfcmulti_tx()
2013 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && in hfcmulti_tx()
2022 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2031 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2047 if (bch && test_bit(FLG_FILLEMPTY, &bch->Flags) in hfcmulti_tx()
2048 && !test_bit(FLG_HDLC, &bch->Flags) && z2 == z1) { in hfcmulti_tx()
2053 hc->write_fifo(hc, hc->silence_data, poll >> 1); in hfcmulti_tx()
2054 Zspace -= (poll >> 1); in hfcmulti_tx()
2058 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && (!*txpending) in hfcmulti_tx()
2065 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2074 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2088 hc->activity_tx |= 1 << hc->chan[ch].port; in hfcmulti_tx()
2092 if (dch || test_bit(FLG_HDLC, &bch->Flags)) in hfcmulti_tx()
2097 d = (*sp)->data + i; in hfcmulti_tx()
2098 if (ii - i > Zspace) in hfcmulti_tx()
2103 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i, in hfcmulti_tx()
2107 hc->write_fifo(hc, d, ii - i); in hfcmulti_tx()
2108 hc->chan[ch].Zfill += ii - i; in hfcmulti_tx()
2118 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_tx()
2119 /* increment f-counter */ in hfcmulti_tx()
2124 tmp_len = (*sp)->len; in hfcmulti_tx()
2141 if (bch && test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_tx()
2142 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in hfcmulti_tx()
2159 bch = hc->chan[ch].bch; in hfcmulti_rx()
2161 if (!test_bit(FLG_ACTIVE, &bch->Flags)) in hfcmulti_rx()
2163 } else if (hc->chan[ch].dch) { in hfcmulti_rx()
2164 dch = hc->chan[ch].dch; in hfcmulti_rx()
2165 if (!test_bit(FLG_ACTIVE, &dch->Flags)) in hfcmulti_rx()
2173 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_rx()
2174 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_rx()
2175 (hc->chan[ch].slot_rx < 0) && in hfcmulti_rx()
2176 (hc->chan[ch].slot_tx < 0)) in hfcmulti_rx()
2183 if (hc->chan[ch].rx_off) { in hfcmulti_rx()
2185 bch->dropcnt += poll; /* not exact but fair enough */ in hfcmulti_rx()
2189 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_rx()
2195 __func__, hc->id + 1, temp, f1); in hfcmulti_rx()
2200 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_rx()
2201 while (z1 != (temp = (HFC_inw_nodebug(hc, A_Z1) - hc->Zmin))) { in hfcmulti_rx()
2204 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_rx()
2207 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_rx()
2208 Zsize = z1 - z2; in hfcmulti_rx()
2209 if ((dch || test_bit(FLG_HDLC, &bch->Flags)) && f1 != f2) in hfcmulti_rx()
2213 Zsize += hc->Zlen; in hfcmulti_rx()
2222 hc->id + 1, bch->nr, Zsize); in hfcmulti_rx()
2225 sp = &bch->rx_skb; in hfcmulti_rx()
2226 maxlen = bch->maxlen; in hfcmulti_rx()
2228 sp = &dch->rx_skb; in hfcmulti_rx()
2229 maxlen = dch->maxlen + 3; in hfcmulti_rx()
2234 hc->id + 1); in hfcmulti_rx()
2241 hc->activity_rx |= 1 << hc->chan[ch].port; in hfcmulti_rx()
2244 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_rx()
2248 "got=%d (again %d)\n", __func__, hc->id + 1, ch, in hfcmulti_rx()
2250 f1, f2, Zsize + (*sp)->len, again); in hfcmulti_rx()
2252 if ((Zsize + (*sp)->len) > maxlen) { in hfcmulti_rx()
2255 "%s(card %d): hdlc-frame too large.\n", in hfcmulti_rx()
2256 __func__, hc->id + 1); in hfcmulti_rx()
2263 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2266 /* increment Z2,F2-counter */ in hfcmulti_rx()
2270 if ((*sp)->len < 4) { in hfcmulti_rx()
2274 "size\n", __func__, hc->id + 1); in hfcmulti_rx()
2279 if ((*sp)->data[(*sp)->len - 1]) { in hfcmulti_rx()
2282 "%s: CRC-error\n", __func__); in hfcmulti_rx()
2286 skb_trim(*sp, (*sp)->len - 3); in hfcmulti_rx()
2287 if ((*sp)->len < MISDN_COPY_SIZE) { in hfcmulti_rx()
2289 *sp = mI_alloc_skb(skb->len, GFP_ATOMIC); in hfcmulti_rx()
2291 skb_put_data(*sp, skb->data, skb->len); in hfcmulti_rx()
2304 __func__, hc->id + 1); in hfcmulti_rx()
2306 while (temp < (*sp)->len) in hfcmulti_rx()
2307 printk(" %02x", (*sp)->data[temp++]); in hfcmulti_rx()
2321 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2326 __func__, hc->id + 1, ch, Zsize, z1, z2); in hfcmulti_rx()
2328 recv_Bchannel(bch, hc->chan[ch].Zfill, false); in hfcmulti_rx()
2362 if (hc->e1_resync) { in handle_timer_irq()
2365 if (hc->e1_resync & 1) { in handle_timer_irq()
2370 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in handle_timer_irq()
2373 if (hc->e1_resync & 2) { in handle_timer_irq()
2378 if (hc->e1_resync & 4) { in handle_timer_irq()
2381 "Enable QUARTZ for HFC-E1\n"); in handle_timer_irq()
2388 hc->e1_resync = 0; in handle_timer_irq()
2392 if (hc->ctype != HFC_TYPE_E1 || hc->e1_state == 1) in handle_timer_irq()
2394 if (hc->created[hc->chan[ch].port]) { in handle_timer_irq()
2396 /* fifo is started when switching to rx-fifo */ in handle_timer_irq()
2398 if (hc->chan[ch].dch && in handle_timer_irq()
2399 hc->chan[ch].nt_timer > -1) { in handle_timer_irq()
2400 dch = hc->chan[ch].dch; in handle_timer_irq()
2401 if (!(--hc->chan[ch].nt_timer)) { in handle_timer_irq()
2410 dch->state); in handle_timer_irq()
2415 if (hc->ctype == HFC_TYPE_E1 && hc->created[0]) { in handle_timer_irq()
2416 dch = hc->chan[hc->dnum[0]].dch; in handle_timer_irq()
2419 hc->chan[hc->dnum[0]].los = temp; in handle_timer_irq()
2420 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2421 if (!temp && hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2424 if (temp && !hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2428 if (test_bit(HFC_CFG_REPORT_AIS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2431 if (!temp && hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2434 if (temp && !hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2437 hc->chan[hc->dnum[0]].ais = temp; in handle_timer_irq()
2439 if (test_bit(HFC_CFG_REPORT_SLIP, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2442 if (!temp && hc->chan[hc->dnum[0]].slip_rx) in handle_timer_irq()
2445 hc->chan[hc->dnum[0]].slip_rx = temp; in handle_timer_irq()
2447 if (!temp && hc->chan[hc->dnum[0]].slip_tx) in handle_timer_irq()
2450 hc->chan[hc->dnum[0]].slip_tx = temp; in handle_timer_irq()
2452 if (test_bit(HFC_CFG_REPORT_RDI, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2455 if (!temp && hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2458 if (temp && !hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2461 hc->chan[hc->dnum[0]].rdi = temp; in handle_timer_irq()
2464 switch (hc->chan[hc->dnum[0]].sync) { in handle_timer_irq()
2471 __func__, hc->id); in handle_timer_irq()
2473 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2475 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2476 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2486 __func__, hc->id); in handle_timer_irq()
2487 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2497 __func__, hc->id); in handle_timer_irq()
2498 hc->chan[hc->dnum[0]].sync = 2; in handle_timer_irq()
2507 __func__, hc->id); in handle_timer_irq()
2508 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2517 __func__, hc->id); in handle_timer_irq()
2518 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2524 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in handle_timer_irq()
2527 if (hc->leds) in handle_timer_irq()
2541 if (hc->chan[ch].dch) { in ph_state_irq()
2542 dch = hc->chan[ch].dch; in ph_state_irq()
2545 hc->chan[ch].port); in ph_state_irq()
2560 /* Speech Design TE-sync indication */ in ph_state_irq()
2561 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && in ph_state_irq()
2562 dch->dev.D.protocol == ISDN_P_TE_S0) { in ph_state_irq()
2564 hc->syncronized |= in ph_state_irq()
2565 (1 << hc->chan[ch].port); in ph_state_irq()
2567 hc->syncronized &= in ph_state_irq()
2568 ~(1 << hc->chan[ch].port); in ph_state_irq()
2570 dch->state = st_status & 0x0f; in ph_state_irq()
2571 if (dch->dev.D.protocol == ISDN_P_NT_S0) in ph_state_irq()
2575 if (dch->state == active) { in ph_state_irq()
2582 dch->tx_idx = 0; in ph_state_irq()
2588 __func__, dch->state, in ph_state_irq()
2589 hc->chan[ch].port); in ph_state_irq()
2594 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in ph_state_irq()
2610 dch = hc->chan[ch].dch; in fifo_irq()
2611 bch = hc->chan[ch].bch; in fifo_irq()
2612 if (((!dch) && (!bch)) || (!hc->created[hc->chan[ch].port])) { in fifo_irq()
2617 test_bit(FLG_ACTIVE, &dch->Flags)) { in fifo_irq()
2624 test_bit(FLG_ACTIVE, &bch->Flags)) { in fifo_irq()
2632 test_bit(FLG_ACTIVE, &dch->Flags)) { in fifo_irq()
2636 test_bit(FLG_ACTIVE, &bch->Flags)) { in fifo_irq()
2663 printk(KERN_ERR "HFC-multi: Spurious interrupt!\n"); in hfcmulti_interrupt()
2667 spin_lock(&hc->lock); in hfcmulti_interrupt()
2672 "card %d, this is no bug.\n", hc->id + 1, irqsem); in hfcmulti_interrupt()
2673 irqsem = hc->id + 1; in hfcmulti_interrupt()
2676 if (hc->immap->im_cpm.cp_pbdat & hc->pb_irqmsk) in hfcmulti_interrupt()
2679 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_interrupt()
2681 plx_acc = hc->plx_membase + PLX_INTCSR; in hfcmulti_interrupt()
2716 hc->irqcnt++; in hfcmulti_interrupt()
2718 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_interrupt()
2728 r_irq_misc &= hc->hw.r_irqmsk_misc; /* ignore disabled irqs */ in hfcmulti_interrupt()
2730 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_interrupt()
2732 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_interrupt()
2734 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in hfcmulti_interrupt()
2735 && hc->e1_getclock) { in hfcmulti_interrupt()
2737 hc->syncronized = 1; in hfcmulti_interrupt()
2739 hc->syncronized = 0; in hfcmulti_interrupt()
2755 __func__, hc->id, temp & 0x7); in hfcmulti_interrupt()
2756 for (i = 0; i < hc->ports; i++) { in hfcmulti_interrupt()
2757 dch = hc->chan[hc->dnum[i]].dch; in hfcmulti_interrupt()
2758 dch->state = temp & 0x7; in hfcmulti_interrupt()
2762 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in hfcmulti_interrupt()
2767 if (hc->iclock_on) in hfcmulti_interrupt()
2768 mISDN_clock_update(hc->iclock, poll, NULL); in hfcmulti_interrupt()
2778 printk(KERN_DEBUG "%s: got V_IRQ_PROC -" in hfcmulti_interrupt()
2795 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2802 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2808 * timer callback for D-chan busy resolution. Currently no function
2820 * configure B-channel with the given protocol
2821 * ch eqals to the HFC-channel (0-31)
2822 * ch is the number of channel (0-4,4-7,8-11,12-15,16-19,20-23,24-27,28-31
2823 * for S/T, 1-31 for E1)
2835 return -EINVAL; in mode_hfcmulti()
2836 oslot_tx = hc->chan[ch].slot_tx; in mode_hfcmulti()
2837 oslot_rx = hc->chan[ch].slot_rx; in mode_hfcmulti()
2838 conf = hc->chan[ch].conf; in mode_hfcmulti()
2844 __func__, hc->id, ch, protocol, oslot_tx, slot_tx, in mode_hfcmulti()
2852 if (hc->slot_owner[oslot_tx << 1] == ch) { in mode_hfcmulti()
2855 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2857 hc->slot_owner[oslot_tx << 1] = -1; in mode_hfcmulti()
2863 __func__, hc->slot_owner[oslot_tx << 1]); in mode_hfcmulti()
2873 if (hc->slot_owner[(oslot_rx << 1) | 1] == ch) { in mode_hfcmulti()
2876 hc->slot_owner[(oslot_rx << 1) | 1] = -1; in mode_hfcmulti()
2883 hc->slot_owner[(oslot_rx << 1) | 1]); in mode_hfcmulti()
2888 flow_tx = 0x80; /* FIFO->ST */ in mode_hfcmulti()
2890 hc->chan[ch].slot_tx = -1; in mode_hfcmulti()
2891 hc->chan[ch].bank_tx = 0; in mode_hfcmulti()
2894 if (hc->chan[ch].txpending) in mode_hfcmulti()
2895 flow_tx = 0x80; /* FIFO->ST */ in mode_hfcmulti()
2897 flow_tx = 0xc0; /* PCM->ST */ in mode_hfcmulti()
2909 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2912 hc->slot_owner[slot_tx << 1] = ch; in mode_hfcmulti()
2913 hc->chan[ch].slot_tx = slot_tx; in mode_hfcmulti()
2914 hc->chan[ch].bank_tx = bank_tx; in mode_hfcmulti()
2918 flow_rx = 0x80; /* ST->FIFO */ in mode_hfcmulti()
2919 hc->chan[ch].slot_rx = -1; in mode_hfcmulti()
2920 hc->chan[ch].bank_rx = 0; in mode_hfcmulti()
2923 if (hc->chan[ch].txpending) in mode_hfcmulti()
2924 flow_rx = 0x80; /* ST->FIFO */ in mode_hfcmulti()
2926 flow_rx = 0xc0; /* ST->(FIFO,PCM) */ in mode_hfcmulti()
2938 hc->slot_owner[(slot_rx << 1) | 1] = ch; in mode_hfcmulti()
2939 hc->chan[ch].slot_rx = slot_rx; in mode_hfcmulti()
2940 hc->chan[ch].bank_rx = bank_rx; in mode_hfcmulti()
2961 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
2962 hc->hw.a_st_ctrl0[hc->chan[ch].port] &= in mode_hfcmulti()
2964 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
2968 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
2970 if (hc->chan[ch].bch) { in mode_hfcmulti()
2971 test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
2973 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
2976 case (ISDN_P_B_RAW): /* B-channel */ in mode_hfcmulti()
2978 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in mode_hfcmulti()
2979 (hc->chan[ch].slot_rx < 0) && in mode_hfcmulti()
2980 (hc->chan[ch].slot_tx < 0)) { in mode_hfcmulti()
2983 "Setting B-channel %d to echo cancelable " in mode_hfcmulti()
2991 /* S/T -> PCM */ in mode_hfcmulti()
2999 /* PCM -> FIFO */ in mode_hfcmulti()
3005 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3014 /* PCM -> S/T */ in mode_hfcmulti()
3022 /* FIFO -> PCM */ in mode_hfcmulti()
3028 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3033 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3041 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3050 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3055 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3059 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3068 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3073 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3074 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3076 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3080 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3082 if (hc->chan[ch].bch) in mode_hfcmulti()
3084 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3086 case (ISDN_P_B_HDLC): /* B-channel */ in mode_hfcmulti()
3087 case (ISDN_P_TE_S0): /* D-channel */ in mode_hfcmulti()
3094 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) { in mode_hfcmulti()
3095 /* E1 or B-channel */ in mode_hfcmulti()
3099 /* D-Channel without HDLC fill flags */ in mode_hfcmulti()
3110 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) in mode_hfcmulti()
3117 if (hc->chan[ch].bch) { in mode_hfcmulti()
3118 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3119 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3120 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3122 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3126 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3133 hc->chan[ch].protocol = ISDN_P_NONE; in mode_hfcmulti()
3134 return -ENOPROTOOPT; in mode_hfcmulti()
3136 hc->chan[ch].protocol = protocol; in mode_hfcmulti()
3151 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0); in hfcmulti_pcm()
3156 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, slot_tx, bank_tx, in hfcmulti_pcm()
3168 hc->chan[ch].conf = num; in hfcmulti_conf()
3170 hc->chan[ch].conf = -1; in hfcmulti_conf()
3171 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, hc->chan[ch].slot_tx, in hfcmulti_conf()
3172 hc->chan[ch].bank_tx, hc->chan[ch].slot_rx, in hfcmulti_conf()
3173 hc->chan[ch].bank_rx); in hfcmulti_conf()
3189 struct hfc_multi *hc = dch->hw; in hfcm_l1callback()
3199 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3200 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3206 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3215 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3216 l1_event(dch->l1, HW_POWERUP_IND); in hfcm_l1callback()
3221 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3222 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3228 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3233 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcm_l1callback()
3234 hc->syncronized &= in hfcm_l1callback()
3235 ~(1 << hc->chan[dch->slot].port); in hfcm_l1callback()
3239 skb_queue_splice_init(&dch->squeue, &free_queue); in hfcm_l1callback()
3240 if (dch->tx_skb) { in hfcm_l1callback()
3241 __skb_queue_tail(&free_queue, dch->tx_skb); in hfcm_l1callback()
3242 dch->tx_skb = NULL; in hfcm_l1callback()
3244 dch->tx_idx = 0; in hfcm_l1callback()
3245 if (dch->rx_skb) { in hfcm_l1callback()
3246 __skb_queue_tail(&free_queue, dch->rx_skb); in hfcm_l1callback()
3247 dch->rx_skb = NULL; in hfcm_l1callback()
3249 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfcm_l1callback()
3250 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfcm_l1callback()
3251 del_timer(&dch->timer); in hfcm_l1callback()
3252 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3256 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3257 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3263 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3270 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3273 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in hfcm_l1callback()
3274 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfcm_l1callback()
3278 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in hfcm_l1callback()
3279 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfcm_l1callback()
3283 if (dch->debug & DEBUG_HW) in hfcm_l1callback()
3286 return -1; in hfcm_l1callback()
3292 * Layer2 -> Layer 1 Transfer
3300 struct hfc_multi *hc = dch->hw; in handle_dmsg()
3302 int ret = -EINVAL; in handle_dmsg()
3306 switch (hh->prim) { in handle_dmsg()
3308 if (skb->len < 1) in handle_dmsg()
3310 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3313 id = hh->id; /* skb can be freed */ in handle_dmsg()
3314 hfcmulti_tx(hc, dch->slot); in handle_dmsg()
3319 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3322 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3325 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in handle_dmsg()
3326 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3331 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3332 hc->ports - 1); in handle_dmsg()
3334 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3339 __func__, dch->state); in handle_dmsg()
3342 hc->chan[dch->slot].port); in handle_dmsg()
3351 dch->state = 1; in handle_dmsg()
3353 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3355 ret = l1_event(dch->l1, hh->prim); in handle_dmsg()
3358 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in handle_dmsg()
3359 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in handle_dmsg()
3363 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3367 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3368 hc->ports - 1); in handle_dmsg()
3370 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3377 hc->chan[dch->slot].port); in handle_dmsg()
3382 dch->state = 1; in handle_dmsg()
3384 skb_queue_splice_init(&dch->squeue, &free_queue); in handle_dmsg()
3385 if (dch->tx_skb) { in handle_dmsg()
3386 __skb_queue_tail(&free_queue, dch->tx_skb); in handle_dmsg()
3387 dch->tx_skb = NULL; in handle_dmsg()
3389 dch->tx_idx = 0; in handle_dmsg()
3390 if (dch->rx_skb) { in handle_dmsg()
3391 __skb_queue_tail(&free_queue, dch->rx_skb); in handle_dmsg()
3392 dch->rx_skb = NULL; in handle_dmsg()
3394 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in handle_dmsg()
3395 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in handle_dmsg()
3396 del_timer(&dch->timer); in handle_dmsg()
3398 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) in handle_dmsg()
3399 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in handle_dmsg()
3402 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3405 ret = l1_event(dch->l1, hh->prim); in handle_dmsg()
3416 struct hfc_multi *hc = bch->hw; in deactivate_bchannel()
3419 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
3421 hc->chan[bch->slot].coeff_count = 0; in deactivate_bchannel()
3422 hc->chan[bch->slot].rx_off = 0; in deactivate_bchannel()
3423 hc->chan[bch->slot].conf = -1; in deactivate_bchannel()
3424 mode_hfcmulti(hc, bch->slot, ISDN_P_NONE, -1, 0, -1, 0); in deactivate_bchannel()
3425 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
3432 struct hfc_multi *hc = bch->hw; in handle_bmsg()
3433 int ret = -EINVAL; in handle_bmsg()
3437 switch (hh->prim) { in handle_bmsg()
3439 if (!skb->len) in handle_bmsg()
3441 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3444 hfcmulti_tx(hc, bch->slot); in handle_bmsg()
3450 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3455 __func__, bch->slot); in handle_bmsg()
3456 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3457 /* activate B-channel if not already activated */ in handle_bmsg()
3458 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) { in handle_bmsg()
3459 hc->chan[bch->slot].txpending = 0; in handle_bmsg()
3460 ret = mode_hfcmulti(hc, bch->slot, in handle_bmsg()
3461 ch->protocol, in handle_bmsg()
3462 hc->chan[bch->slot].slot_tx, in handle_bmsg()
3463 hc->chan[bch->slot].bank_tx, in handle_bmsg()
3464 hc->chan[bch->slot].slot_rx, in handle_bmsg()
3465 hc->chan[bch->slot].bank_rx); in handle_bmsg()
3467 if (ch->protocol == ISDN_P_B_RAW && !hc->dtmf in handle_bmsg()
3468 && test_bit(HFC_CHIP_DTMF, &hc->chip)) { in handle_bmsg()
3470 hc->dtmf = 1; in handle_bmsg()
3475 HFC_outb(hc, R_DTMF, hc->hw.r_dtmf | in handle_bmsg()
3481 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3487 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3488 switch (hh->id) { in handle_bmsg()
3493 __func__, skb->len); in handle_bmsg()
3505 __func__, hh->id); in handle_bmsg()
3506 ret = -EINVAL; in handle_bmsg()
3508 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3530 (struct dsp_features *)(*((u_long *)&cq->p1)); in channel_bctrl()
3531 struct hfc_multi *hc = bch->hw; in channel_bctrl()
3538 switch (cq->op) { in channel_bctrl()
3541 cq->op |= MISDN_CTRL_HFC_OP | MISDN_CTRL_HW_FEATURES_OP; in channel_bctrl()
3545 hc->chan[bch->slot].rx_off = !!cq->p1; in channel_bctrl()
3546 if (!hc->chan[bch->slot].rx_off) { in channel_bctrl()
3548 HFC_outb_nodebug(hc, R_FIFO, (bch->slot << 1) | 1); in channel_bctrl()
3555 __func__, bch->nr, hc->chan[bch->slot].rx_off); in channel_bctrl()
3559 hc->silence = bch->fill[0]; in channel_bctrl()
3560 memset(hc->silence_data, hc->silence, sizeof(hc->silence_data)); in channel_bctrl()
3567 features->hfc_id = hc->id; in channel_bctrl()
3568 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) in channel_bctrl()
3569 features->hfc_dtmf = 1; in channel_bctrl()
3570 if (test_bit(HFC_CHIP_CONF, &hc->chip)) in channel_bctrl()
3571 features->hfc_conf = 1; in channel_bctrl()
3572 features->hfc_loops = 0; in channel_bctrl()
3573 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in channel_bctrl()
3574 features->hfc_echocanhw = 1; in channel_bctrl()
3576 features->pcm_id = hc->pcm; in channel_bctrl()
3577 features->pcm_slots = hc->slots; in channel_bctrl()
3578 features->pcm_banks = 2; in channel_bctrl()
3582 slot_tx = cq->p1 & 0xff; in channel_bctrl()
3583 bank_tx = cq->p1 >> 8; in channel_bctrl()
3584 slot_rx = cq->p2 & 0xff; in channel_bctrl()
3585 bank_rx = cq->p2 >> 8; in channel_bctrl()
3592 if (slot_tx < hc->slots && bank_tx <= 2 && in channel_bctrl()
3593 slot_rx < hc->slots && bank_rx <= 2) in channel_bctrl()
3594 hfcmulti_pcm(hc, bch->slot, in channel_bctrl()
3602 ret = -EINVAL; in channel_bctrl()
3609 hfcmulti_pcm(hc, bch->slot, -1, 0, -1, 0); in channel_bctrl()
3612 num = cq->p1 & 0xff; in channel_bctrl()
3617 hfcmulti_conf(hc, bch->slot, num); in channel_bctrl()
3622 ret = -EINVAL; in channel_bctrl()
3628 hfcmulti_conf(hc, bch->slot, -1); in channel_bctrl()
3633 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3634 vpm_echocan_on(hc, bch->slot, cq->p1); in channel_bctrl()
3636 ret = -EINVAL; in channel_bctrl()
3643 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3644 vpm_echocan_off(hc, bch->slot); in channel_bctrl()
3646 ret = -EINVAL; in channel_bctrl()
3659 struct hfc_multi *hc = bch->hw; in hfcm_bctrl()
3660 int err = -EINVAL; in hfcm_bctrl()
3663 if (bch->debug & DEBUG_HW) in hfcm_bctrl()
3668 test_and_clear_bit(FLG_OPEN, &bch->Flags); in hfcm_bctrl()
3670 ch->protocol = ISDN_P_NONE; in hfcm_bctrl()
3671 ch->peer = NULL; in hfcm_bctrl()
3676 spin_lock_irqsave(&hc->lock, flags); in hfcm_bctrl()
3678 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_bctrl()
3688 * handle D-channel events
3702 hc = dch->hw; in ph_state_change()
3703 ch = dch->slot; in ph_state_change()
3705 if (hc->ctype == HFC_TYPE_E1) { in ph_state_change()
3706 if (dch->dev.D.protocol == ISDN_P_TE_E1) { in ph_state_change()
3709 "%s: E1 TE (id=%d) newstate %x\n", in ph_state_change()
3710 __func__, hc->id, dch->state); in ph_state_change()
3715 __func__, hc->id, dch->state); in ph_state_change()
3717 switch (dch->state) { in ph_state_change()
3719 if (hc->e1_state != 1) { in ph_state_change()
3730 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3731 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in ph_state_change()
3736 if (hc->e1_state != 1) in ph_state_change()
3738 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3739 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_change()
3742 hc->e1_state = dch->state; in ph_state_change()
3744 if (dch->dev.D.protocol == ISDN_P_TE_S0) { in ph_state_change()
3747 "%s: S/T TE newstate %x\n", in ph_state_change()
3748 __func__, dch->state); in ph_state_change()
3749 switch (dch->state) { in ph_state_change()
3751 l1_event(dch->l1, HW_RESET_IND); in ph_state_change()
3754 l1_event(dch->l1, HW_DEACT_IND); in ph_state_change()
3758 l1_event(dch->l1, ANYSIGNAL); in ph_state_change()
3761 l1_event(dch->l1, INFO2); in ph_state_change()
3764 l1_event(dch->l1, INFO4_P8); in ph_state_change()
3770 __func__, dch->state); in ph_state_change()
3771 switch (dch->state) { in ph_state_change()
3773 if (hc->chan[ch].nt_timer == 0) { in ph_state_change()
3774 hc->chan[ch].nt_timer = -1; in ph_state_change()
3776 hc->chan[ch].port); in ph_state_change()
3783 dch->state = 4; in ph_state_change()
3786 hc->chan[ch].nt_timer = in ph_state_change()
3789 hc->chan[ch].port); in ph_state_change()
3792 /* allow G2 -> G3 transition */ in ph_state_change()
3798 hc->chan[ch].nt_timer = -1; in ph_state_change()
3799 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3800 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_change()
3804 hc->chan[ch].nt_timer = -1; in ph_state_change()
3807 hc->chan[ch].nt_timer = -1; in ph_state_change()
3808 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3809 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in ph_state_change()
3824 struct hfc_multi *hc = dch->hw; in hfcmulti_initmode()
3831 i = dch->slot; in hfcmulti_initmode()
3832 pt = hc->chan[i].port; in hfcmulti_initmode()
3833 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_initmode()
3835 hc->chan[hc->dnum[pt]].slot_tx = -1; in hfcmulti_initmode()
3836 hc->chan[hc->dnum[pt]].slot_rx = -1; in hfcmulti_initmode()
3837 hc->chan[hc->dnum[pt]].conf = -1; in hfcmulti_initmode()
3838 if (hc->dnum[pt]) { in hfcmulti_initmode()
3839 mode_hfcmulti(hc, dch->slot, dch->dev.D.protocol, in hfcmulti_initmode()
3840 -1, 0, -1, 0); in hfcmulti_initmode()
3841 timer_setup(&dch->timer, hfcmulti_dbusy_timer, 0); in hfcmulti_initmode()
3844 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in hfcmulti_initmode()
3846 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3847 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3848 hc->chan[i].conf = -1; in hfcmulti_initmode()
3849 mode_hfcmulti(hc, i, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3852 if (hc->ctype == HFC_TYPE_E1 && pt == 0) { in hfcmulti_initmode()
3854 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_initmode()
3855 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3859 if (test_bit(HFC_CFG_OPTICAL, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3861 hc->hw.r_tx0 = 0 | V_OUT_EN; in hfcmulti_initmode()
3864 hc->hw.r_tx0 = 1 | V_OUT_EN; in hfcmulti_initmode()
3866 hc->hw.r_tx1 = V_ATX | V_NTRI; in hfcmulti_initmode()
3867 HFC_outb(hc, R_TX0, hc->hw.r_tx0); in hfcmulti_initmode()
3868 HFC_outb(hc, R_TX1, hc->hw.r_tx1); in hfcmulti_initmode()
3872 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3877 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3880 if (dch->dev.D.protocol == ISDN_P_NT_E1) { in hfcmulti_initmode()
3882 printk(KERN_DEBUG "%s: E1 port is NT-mode\n", in hfcmulti_initmode()
3885 hc->e1_getclock = 0; in hfcmulti_initmode()
3888 printk(KERN_DEBUG "%s: E1 port is TE-mode\n", in hfcmulti_initmode()
3891 hc->e1_getclock = 1; in hfcmulti_initmode()
3893 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in hfcmulti_initmode()
3897 if (test_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip)) in hfcmulti_initmode()
3898 hc->e1_getclock = 1; in hfcmulti_initmode()
3899 if (test_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip)) in hfcmulti_initmode()
3900 hc->e1_getclock = 0; in hfcmulti_initmode()
3901 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in hfcmulti_initmode()
3909 if (hc->e1_getclock) { in hfcmulti_initmode()
3936 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
3937 hc->syncronized = 0; in hfcmulti_initmode()
3941 if (hc->ctype != HFC_TYPE_E1) { in hfcmulti_initmode()
3943 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3944 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3945 hc->chan[i].conf = -1; in hfcmulti_initmode()
3946 mode_hfcmulti(hc, i, dch->dev.D.protocol, -1, 0, -1, 0); in hfcmulti_initmode()
3947 timer_setup(&dch->timer, hfcmulti_dbusy_timer, 0); in hfcmulti_initmode()
3948 hc->chan[i - 2].slot_tx = -1; in hfcmulti_initmode()
3949 hc->chan[i - 2].slot_rx = -1; in hfcmulti_initmode()
3950 hc->chan[i - 2].conf = -1; in hfcmulti_initmode()
3951 mode_hfcmulti(hc, i - 2, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3952 hc->chan[i - 1].slot_tx = -1; in hfcmulti_initmode()
3953 hc->chan[i - 1].slot_rx = -1; in hfcmulti_initmode()
3954 hc->chan[i - 1].conf = -1; in hfcmulti_initmode()
3955 mode_hfcmulti(hc, i - 1, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3960 if (dch->dev.D.protocol == ISDN_P_NT_S0) { in hfcmulti_initmode()
3963 "%s: ST port %d is NT-mode\n", in hfcmulti_initmode()
3968 hc->hw.a_st_ctrl0[pt] = V_ST_MD; in hfcmulti_initmode()
3972 "%s: ST port %d is TE-mode\n", in hfcmulti_initmode()
3977 hc->hw.a_st_ctrl0[pt] = 0; in hfcmulti_initmode()
3979 if (!test_bit(HFC_CFG_NONCAP_TX, &hc->chan[i].cfg)) in hfcmulti_initmode()
3980 hc->hw.a_st_ctrl0[pt] |= V_TX_LI; in hfcmulti_initmode()
3981 if (hc->ctype == HFC_TYPE_XHFC) { in hfcmulti_initmode()
3982 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */; in hfcmulti_initmode()
3987 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]); in hfcmulti_initmode()
3988 /* disable E-channel */ in hfcmulti_initmode()
3989 if ((dch->dev.D.protocol == ISDN_P_NT_S0) || in hfcmulti_initmode()
3990 test_bit(HFC_CFG_DIS_ECHANNEL, &hc->chan[i].cfg)) in hfcmulti_initmode()
3994 /* enable B-channel receive */ in hfcmulti_initmode()
4000 hc->hw.r_sci_msk |= 1 << pt; in hfcmulti_initmode()
4002 HFC_outb(hc, R_SCI_MSK, hc->hw.r_sci_msk); in hfcmulti_initmode()
4004 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
4005 hc->syncronized &= in hfcmulti_initmode()
4006 ~(1 << hc->chan[dch->slot].port); in hfcmulti_initmode()
4024 dch->dev.id, __builtin_return_address(0)); in open_dchannel()
4025 if (rq->protocol == ISDN_P_NONE) in open_dchannel()
4026 return -EINVAL; in open_dchannel()
4027 if ((dch->dev.D.protocol != ISDN_P_NONE) && in open_dchannel()
4028 (dch->dev.D.protocol != rq->protocol)) { in open_dchannel()
4031 __func__, dch->dev.D.protocol, rq->protocol); in open_dchannel()
4033 if ((dch->dev.D.protocol == ISDN_P_TE_S0) && in open_dchannel()
4034 (rq->protocol != ISDN_P_TE_S0)) in open_dchannel()
4035 l1_event(dch->l1, CLOSE_CHANNEL); in open_dchannel()
4036 if (dch->dev.D.protocol != rq->protocol) { in open_dchannel()
4037 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
4042 dch->dev.D.protocol = rq->protocol; in open_dchannel()
4043 spin_lock_irqsave(&hc->lock, flags); in open_dchannel()
4045 spin_unlock_irqrestore(&hc->lock, flags); in open_dchannel()
4047 if (test_bit(FLG_ACTIVE, &dch->Flags)) in open_dchannel()
4048 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, MISDN_ID_ANY, in open_dchannel()
4050 rq->ch = &dch->dev.D; in open_dchannel()
4063 if (!test_channelmap(rq->adr.channel, dch->dev.channelmap)) in open_bchannel()
4064 return -EINVAL; in open_bchannel()
4065 if (rq->protocol == ISDN_P_NONE) in open_bchannel()
4066 return -EINVAL; in open_bchannel()
4067 if (hc->ctype == HFC_TYPE_E1) in open_bchannel()
4068 ch = rq->adr.channel; in open_bchannel()
4070 ch = (rq->adr.channel - 1) + (dch->slot - 2); in open_bchannel()
4071 bch = hc->chan[ch].bch; in open_bchannel()
4075 return -EINVAL; in open_bchannel()
4077 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) in open_bchannel()
4078 return -EBUSY; /* b-channel can be only open once */ in open_bchannel()
4079 bch->ch.protocol = rq->protocol; in open_bchannel()
4080 hc->chan[ch].rx_off = 0; in open_bchannel()
4081 rq->ch = &bch->ch; in open_bchannel()
4093 struct hfc_multi *hc = dch->hw; in channel_dctrl()
4097 switch (cq->op) { in channel_dctrl()
4099 cq->op = MISDN_CTRL_HFC_OP | MISDN_CTRL_L1_TIMER3; in channel_dctrl()
4102 wd_cnt = cq->p1 & 0xf; in channel_dctrl()
4103 wd_mode = !!(cq->p1 >> 4); in channel_dctrl()
4110 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0); in channel_dctrl()
4111 if (hc->ctype == HFC_TYPE_XHFC) in channel_dctrl()
4112 hc->hw.r_bert_wd_md |= 0x40 /* V_WD_EN */; in channel_dctrl()
4114 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4115 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in channel_dctrl()
4116 /* enable the watchdog output for Speech-Design */ in channel_dctrl()
4127 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4130 ret = l1_event(dch->l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); in channel_dctrl()
4134 __func__, cq->op); in channel_dctrl()
4135 ret = -EINVAL; in channel_dctrl()
4146 struct hfc_multi *hc = dch->hw; in hfcm_dctrl()
4151 if (dch->debug & DEBUG_HW) in hfcm_dctrl()
4157 switch (rq->protocol) { in hfcm_dctrl()
4160 if (hc->ctype == HFC_TYPE_E1) { in hfcm_dctrl()
4161 err = -EINVAL; in hfcm_dctrl()
4168 if (hc->ctype != HFC_TYPE_E1) { in hfcm_dctrl()
4169 err = -EINVAL; in hfcm_dctrl()
4175 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4177 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4183 __func__, dch->dev.id, in hfcm_dctrl()
4188 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4190 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4193 if (dch->debug & DEBUG_HW) in hfcm_dctrl()
4196 err = -EINVAL; in hfcm_dctrl()
4206 hc->iclock_on = enable; in clockctl()
4221 int err = -EIO; in init_card()
4229 spin_lock_irqsave(&hc->lock, flags); in init_card()
4231 hc->hw.r_irq_ctrl = V_FIFO_IRQ; in init_card()
4233 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4235 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED, in init_card()
4236 "HFC-multi", hc)) { in init_card()
4238 hc->irq); in init_card()
4239 hc->irq = 0; in init_card()
4240 return -EIO; in init_card()
4243 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4245 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4253 __func__, hc->irq, hc->irqcnt); in init_card()
4262 spin_lock_irqsave(&hc->lock, flags); in init_card()
4264 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4269 spin_lock_irqsave(&hc->lock, flags); in init_card()
4271 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4274 __func__, hc->irq, hc->irqcnt); in init_card()
4275 if (hc->irqcnt) { in init_card()
4281 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_card()
4287 hc->irq); in init_card()
4289 err = -EIO; in init_card()
4292 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4294 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4300 printk(KERN_DEBUG "%s: free irq %d\n", __func__, hc->irq); in init_card()
4301 if (hc->irq) { in init_card()
4302 free_irq(hc->irq, hc); in init_card()
4303 hc->irq = 0; in init_card()
4319 struct hm_map *m = (struct hm_map *)ent->driver_data; in setup_pci()
4322 "HFC-multi: card manufacturer: '%s' card name: '%s' clock: %s\n", in setup_pci()
4323 m->vendor_name, m->card_name, m->clock2 ? "double" : "normal"); in setup_pci()
4325 hc->pci_dev = pdev; in setup_pci()
4326 if (m->clock2) in setup_pci()
4327 test_and_set_bit(HFC_CHIP_CLOCK2, &hc->chip); in setup_pci()
4329 if (ent->vendor == PCI_VENDOR_ID_DIGIUM && in setup_pci()
4330 ent->device == PCI_DEVICE_ID_DIGIUM_HFC4S) { in setup_pci()
4331 test_and_set_bit(HFC_CHIP_B410P, &hc->chip); in setup_pci()
4332 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in setup_pci()
4333 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in setup_pci()
4334 hc->slots = 32; in setup_pci()
4337 if (hc->pci_dev->irq <= 0) { in setup_pci()
4338 printk(KERN_WARNING "HFC-multi: No IRQ for PCI card found.\n"); in setup_pci()
4339 return -EIO; in setup_pci()
4341 if (pci_enable_device(hc->pci_dev)) { in setup_pci()
4342 printk(KERN_WARNING "HFC-multi: Error enabling PCI card.\n"); in setup_pci()
4343 return -EIO; in setup_pci()
4345 hc->leds = m->leds; in setup_pci()
4346 hc->ledstate = 0xAFFEAFFE; in setup_pci()
4347 hc->opticalsupport = m->opticalsupport; in setup_pci()
4349 hc->pci_iobase = 0; in setup_pci()
4350 hc->pci_membase = NULL; in setup_pci()
4351 hc->plx_membase = NULL; in setup_pci()
4354 if (m->io_mode) /* use mode from card config */ in setup_pci()
4355 hc->io_mode = m->io_mode; in setup_pci()
4356 switch (hc->io_mode) { in setup_pci()
4358 test_and_set_bit(HFC_CHIP_PLXSD, &hc->chip); in setup_pci()
4359 hc->slots = 128; /* required */ in setup_pci()
4360 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4361 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4362 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4363 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4364 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4365 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4366 hc->plx_origmembase = hc->pci_dev->resource[0].start; in setup_pci()
4369 if (!hc->plx_origmembase) { in setup_pci()
4371 "HFC-multi: No IO-Memory for PCI PLX bridge found\n"); in setup_pci()
4372 pci_disable_device(hc->pci_dev); in setup_pci()
4373 return -EIO; in setup_pci()
4376 hc->plx_membase = ioremap(hc->plx_origmembase, 0x80); in setup_pci()
4377 if (!hc->plx_membase) { in setup_pci()
4379 "HFC-multi: failed to remap plx address space. " in setup_pci()
4381 pci_disable_device(hc->pci_dev); in setup_pci()
4382 return -EIO; in setup_pci()
4385 "HFC-multi: plx_membase:%#lx plx_origmembase:%#lx\n", in setup_pci()
4386 (u_long)hc->plx_membase, hc->plx_origmembase); in setup_pci()
4388 hc->pci_origmembase = hc->pci_dev->resource[2].start; in setup_pci()
4390 if (!hc->pci_origmembase) { in setup_pci()
4392 "HFC-multi: No IO-Memory for PCI card found\n"); in setup_pci()
4393 pci_disable_device(hc->pci_dev); in setup_pci()
4394 return -EIO; in setup_pci()
4397 hc->pci_membase = ioremap(hc->pci_origmembase, 0x400); in setup_pci()
4398 if (!hc->pci_membase) { in setup_pci()
4399 printk(KERN_WARNING "HFC-multi: failed to remap io " in setup_pci()
4401 pci_disable_device(hc->pci_dev); in setup_pci()
4402 return -EIO; in setup_pci()
4407 "leds-type %d\n", in setup_pci()
4408 hc->id, (u_long)hc->pci_membase, hc->pci_origmembase, in setup_pci()
4409 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4410 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4413 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4414 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4415 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4416 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4417 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4418 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4419 hc->pci_origmembase = hc->pci_dev->resource[1].start; in setup_pci()
4420 if (!hc->pci_origmembase) { in setup_pci()
4422 "HFC-multi: No IO-Memory for PCI card found\n"); in setup_pci()
4423 pci_disable_device(hc->pci_dev); in setup_pci()
4424 return -EIO; in setup_pci()
4427 hc->pci_membase = ioremap(hc->pci_origmembase, 256); in setup_pci()
4428 if (!hc->pci_membase) { in setup_pci()
4430 "HFC-multi: failed to remap io address space. " in setup_pci()
4432 pci_disable_device(hc->pci_dev); in setup_pci()
4433 return -EIO; in setup_pci()
4436 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase, in setup_pci()
4437 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4438 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4441 hc->HFC_outb = HFC_outb_regio; in setup_pci()
4442 hc->HFC_inb = HFC_inb_regio; in setup_pci()
4443 hc->HFC_inw = HFC_inw_regio; in setup_pci()
4444 hc->HFC_wait = HFC_wait_regio; in setup_pci()
4445 hc->read_fifo = read_fifo_regio; in setup_pci()
4446 hc->write_fifo = write_fifo_regio; in setup_pci()
4447 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start; in setup_pci()
4448 if (!hc->pci_iobase) { in setup_pci()
4450 "HFC-multi: No IO for PCI card found\n"); in setup_pci()
4451 pci_disable_device(hc->pci_dev); in setup_pci()
4452 return -EIO; in setup_pci()
4455 if (!request_region(hc->pci_iobase, 8, "hfcmulti")) { in setup_pci()
4456 printk(KERN_WARNING "HFC-multi: failed to request " in setup_pci()
4458 hc->pci_iobase); in setup_pci()
4459 pci_disable_device(hc->pci_dev); in setup_pci()
4460 return -EIO; in setup_pci()
4464 "%s %s: defined at IOBASE %#x IRQ %d HZ %d leds-type %d\n", in setup_pci()
4465 m->vendor_name, m->card_name, (u_int) hc->pci_iobase, in setup_pci()
4466 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4467 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_REGIO); in setup_pci()
4470 printk(KERN_WARNING "HFC-multi: Invalid IO mode.\n"); in setup_pci()
4471 pci_disable_device(hc->pci_dev); in setup_pci()
4472 return -EIO; in setup_pci()
4475 pci_set_drvdata(hc->pci_dev, hc); in setup_pci()
4494 ci = dch->slot; in release_port()
4495 pt = hc->chan[ci].port; in release_port()
4501 if (pt >= hc->ports) { in release_port()
4511 if (dch->dev.D.protocol == ISDN_P_TE_S0) in release_port()
4512 l1_event(dch->l1, CLOSE_CHANNEL); in release_port()
4514 hc->chan[ci].dch = NULL; in release_port()
4516 if (hc->created[pt]) { in release_port()
4517 hc->created[pt] = 0; in release_port()
4518 mISDN_unregister_device(&dch->dev); in release_port()
4521 spin_lock_irqsave(&hc->lock, flags); in release_port()
4523 if (dch->timer.function) { in release_port()
4524 del_timer(&dch->timer); in release_port()
4525 dch->timer.function = NULL; in release_port()
4528 if (hc->ctype == HFC_TYPE_E1) { /* E1 */ in release_port()
4530 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4531 hc->syncronized = 0; in release_port()
4536 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in release_port()
4538 if (hc->chan[i].bch) { in release_port()
4542 __func__, hc->chan[i].port + 1, i); in release_port()
4543 pb = hc->chan[i].bch; in release_port()
4544 hc->chan[i].bch = NULL; in release_port()
4545 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4548 kfree(hc->chan[i].coeff); in release_port()
4549 spin_lock_irqsave(&hc->lock, flags); in release_port()
4554 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4555 hc->syncronized &= in release_port()
4556 ~(1 << hc->chan[ci].port); in release_port()
4560 if (hc->chan[ci - 2].bch) { in release_port()
4564 __func__, hc->chan[ci - 2].port + 1, in release_port()
4565 ci - 2); in release_port()
4566 pb = hc->chan[ci - 2].bch; in release_port()
4567 hc->chan[ci - 2].bch = NULL; in release_port()
4568 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4571 kfree(hc->chan[ci - 2].coeff); in release_port()
4572 spin_lock_irqsave(&hc->lock, flags); in release_port()
4574 if (hc->chan[ci - 1].bch) { in release_port()
4578 __func__, hc->chan[ci - 1].port + 1, in release_port()
4579 ci - 1); in release_port()
4580 pb = hc->chan[ci - 1].bch; in release_port()
4581 hc->chan[ci - 1].bch = NULL; in release_port()
4582 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4585 kfree(hc->chan[ci - 1].coeff); in release_port()
4586 spin_lock_irqsave(&hc->lock, flags); in release_port()
4590 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4610 __func__, hc->id); in release_card()
4613 if (hc->iclock) in release_card()
4614 mISDN_unregister_clock(hc->iclock); in release_card()
4617 spin_lock_irqsave(&hc->lock, flags); in release_card()
4619 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
4621 if (hc->irq) { in release_card()
4624 __func__, hc->irq, hc); in release_card()
4625 free_irq(hc->irq, hc); in release_card()
4626 hc->irq = 0; in release_card()
4630 /* disable D-channels & B-channels */ in release_card()
4635 if (hc->chan[ch].dch) in release_card()
4636 release_port(hc, hc->chan[ch].dch); in release_card()
4640 if (hc->leds) in release_card()
4649 list_del(&hc->list); in release_card()
4666 if (!m->opticalsupport) { in init_e1_port_hw()
4679 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4689 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4698 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4708 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4718 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4720 /* set CRC-4 Mode */ in init_e1_port_hw()
4727 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4740 test_and_set_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip); in init_e1_port_hw()
4747 test_and_set_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip); in init_e1_port_hw()
4755 test_and_set_bit(HFC_CHIP_RX_SYNC, &hc->chip); in init_e1_port_hw()
4759 hc->chan[hc->dnum[0]].jitter = (port[Port_cnt]>>12) & 0x3; in init_e1_port_hw()
4764 __func__, hc->chan[hc->dnum[0]].jitter, in init_e1_port_hw()
4767 hc->chan[hc->dnum[0]].jitter = 2; /* default */ in init_e1_port_hw()
4781 return -ENOMEM; in init_e1_port()
4782 dch->debug = debug; in init_e1_port()
4784 dch->hw = hc; in init_e1_port()
4785 dch->dev.Dprotocols = (1 << ISDN_P_TE_E1) | (1 << ISDN_P_NT_E1); in init_e1_port()
4786 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in init_e1_port()
4788 dch->dev.D.send = handle_dmsg; in init_e1_port()
4789 dch->dev.D.ctrl = hfcm_dctrl; in init_e1_port()
4790 dch->slot = hc->dnum[pt]; in init_e1_port()
4791 hc->chan[hc->dnum[pt]].dch = dch; in init_e1_port()
4792 hc->chan[hc->dnum[pt]].port = pt; in init_e1_port()
4793 hc->chan[hc->dnum[pt]].nt_timer = -1; in init_e1_port()
4795 if (!((1 << ch) & hc->bmask[pt])) /* skip unused channel */ in init_e1_port()
4801 ret = -ENOMEM; in init_e1_port()
4804 hc->chan[ch].coeff = kzalloc(512, GFP_KERNEL); in init_e1_port()
4805 if (!hc->chan[ch].coeff) { in init_e1_port()
4808 ret = -ENOMEM; in init_e1_port()
4812 bch->nr = ch; in init_e1_port()
4813 bch->slot = ch; in init_e1_port()
4814 bch->debug = debug; in init_e1_port()
4816 bch->hw = hc; in init_e1_port()
4817 bch->ch.send = handle_bmsg; in init_e1_port()
4818 bch->ch.ctrl = hfcm_bctrl; in init_e1_port()
4819 bch->ch.nr = ch; in init_e1_port()
4820 list_add(&bch->ch.list, &dch->dev.bchannels); in init_e1_port()
4821 hc->chan[ch].bch = bch; in init_e1_port()
4822 hc->chan[ch].port = pt; in init_e1_port()
4823 set_channelmap(bch->nr, dch->dev.channelmap); in init_e1_port()
4826 dch->dev.nrbchan = bcount; in init_e1_port()
4829 if (hc->ports > 1) in init_e1_port()
4830 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d-%d", in init_e1_port()
4833 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d", HFC_cnt + 1); in init_e1_port()
4834 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_e1_port()
4837 hc->created[pt] = 1; in init_e1_port()
4854 return -ENOMEM; in init_multi_port()
4855 dch->debug = debug; in init_multi_port()
4857 dch->hw = hc; in init_multi_port()
4858 dch->dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0); in init_multi_port()
4859 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in init_multi_port()
4861 dch->dev.D.send = handle_dmsg; in init_multi_port()
4862 dch->dev.D.ctrl = hfcm_dctrl; in init_multi_port()
4863 dch->dev.nrbchan = 2; in init_multi_port()
4865 dch->slot = i + 2; in init_multi_port()
4866 hc->chan[i + 2].dch = dch; in init_multi_port()
4867 hc->chan[i + 2].port = pt; in init_multi_port()
4868 hc->chan[i + 2].nt_timer = -1; in init_multi_port()
4869 for (ch = 0; ch < dch->dev.nrbchan; ch++) { in init_multi_port()
4874 ret = -ENOMEM; in init_multi_port()
4877 hc->chan[i + ch].coeff = kzalloc(512, GFP_KERNEL); in init_multi_port()
4878 if (!hc->chan[i + ch].coeff) { in init_multi_port()
4881 ret = -ENOMEM; in init_multi_port()
4885 bch->nr = ch + 1; in init_multi_port()
4886 bch->slot = i + ch; in init_multi_port()
4887 bch->debug = debug; in init_multi_port()
4889 bch->hw = hc; in init_multi_port()
4890 bch->ch.send = handle_bmsg; in init_multi_port()
4891 bch->ch.ctrl = hfcm_bctrl; in init_multi_port()
4892 bch->ch.nr = ch + 1; in init_multi_port()
4893 list_add(&bch->ch.list, &dch->dev.bchannels); in init_multi_port()
4894 hc->chan[i + ch].bch = bch; in init_multi_port()
4895 hc->chan[i + ch].port = pt; in init_multi_port()
4896 set_channelmap(bch->nr, dch->dev.channelmap); in init_multi_port()
4905 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in init_multi_port()
4908 " possible with TE-mode\n", in init_multi_port()
4910 ret = -EINVAL; in init_multi_port()
4913 if (hc->masterclk >= 0) { in init_multi_port()
4917 pt + 1, HFC_cnt + 1, hc->masterclk + 1); in init_multi_port()
4918 ret = -EINVAL; in init_multi_port()
4921 hc->masterclk = pt; in init_multi_port()
4931 &hc->chan[i + 2].cfg); in init_multi_port()
4933 /* disable E-channel */ in init_multi_port()
4937 "%s: PROTOCOL disable E-channel: " in init_multi_port()
4941 &hc->chan[i + 2].cfg); in init_multi_port()
4943 if (hc->ctype == HFC_TYPE_XHFC) { in init_multi_port()
4944 snprintf(name, MISDN_MAX_IDLEN - 1, "xhfc.%d-%d", in init_multi_port()
4946 ret = mISDN_register_device(&dch->dev, NULL, name); in init_multi_port()
4948 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-%ds.%d-%d", in init_multi_port()
4949 hc->ctype, HFC_cnt + 1, pt + 1); in init_multi_port()
4950 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_multi_port()
4954 hc->created[pt] = 1; in init_multi_port()
4976 return -EINVAL; in hfcmulti_init()
4978 if ((type[HFC_cnt] & 0xff) && (type[HFC_cnt] & 0xff) != m->type) { in hfcmulti_init()
4979 printk(KERN_WARNING "HFC-MULTI: Card '%s:%s' type %d found but " in hfcmulti_init()
4981 m->vendor_name, m->card_name, m->type, HFC_cnt, in hfcmulti_init()
4983 printk(KERN_WARNING "HFC-MULTI: Load module without parameters " in hfcmulti_init()
4985 return -EINVAL; in hfcmulti_init()
4989 __func__, m->vendor_name, m->card_name, m->type, in hfcmulti_init()
4995 printk(KERN_ERR "No kmem for HFC-Multi card\n"); in hfcmulti_init()
4996 return -ENOMEM; in hfcmulti_init()
4998 spin_lock_init(&hc->lock); in hfcmulti_init()
4999 hc->mtyp = m; in hfcmulti_init()
5000 hc->ctype = m->type; in hfcmulti_init()
5001 hc->ports = m->ports; in hfcmulti_init()
5002 hc->id = HFC_cnt; in hfcmulti_init()
5003 hc->pcm = pcm[HFC_cnt]; in hfcmulti_init()
5004 hc->io_mode = iomode[HFC_cnt]; in hfcmulti_init()
5005 if (hc->ctype == HFC_TYPE_E1 && dmask[E1_cnt]) { in hfcmulti_init()
5012 hc->dnum[pt] = ch; in hfcmulti_init()
5013 hc->bmask[pt] = bmask[bmask_cnt++]; in hfcmulti_init()
5014 if ((maskcheck & hc->bmask[pt]) in hfcmulti_init()
5015 || (dmask[E1_cnt] & hc->bmask[pt])) { in hfcmulti_init()
5017 "HFC-E1 #%d has overlapping B-channels on fragment #%d\n", in hfcmulti_init()
5020 return -EINVAL; in hfcmulti_init()
5022 maskcheck |= hc->bmask[pt]; in hfcmulti_init()
5024 "HFC-E1 #%d uses D-channel on slot %d and a B-channel map of 0x%08x\n", in hfcmulti_init()
5025 E1_cnt + 1, ch, hc->bmask[pt]); in hfcmulti_init()
5028 hc->ports = pt; in hfcmulti_init()
5030 if (hc->ctype == HFC_TYPE_E1 && !dmask[E1_cnt]) { in hfcmulti_init()
5032 hc->dnum[0] = 16; in hfcmulti_init()
5033 hc->bmask[0] = 0xfffefffe; in hfcmulti_init()
5034 hc->ports = 1; in hfcmulti_init()
5038 hc->masterclk = -1; in hfcmulti_init()
5040 test_and_set_bit(HFC_CHIP_ULAW, &hc->chip); in hfcmulti_init()
5041 hc->silence = 0xff; /* ulaw silence */ in hfcmulti_init()
5043 hc->silence = 0x2a; /* alaw silence */ in hfcmulti_init()
5044 if ((poll >> 1) > sizeof(hc->silence_data)) { in hfcmulti_init()
5048 return -EINVAL; in hfcmulti_init()
5051 hc->silence_data[i] = hc->silence; in hfcmulti_init()
5053 if (hc->ctype != HFC_TYPE_XHFC) { in hfcmulti_init()
5055 test_and_set_bit(HFC_CHIP_DTMF, &hc->chip); in hfcmulti_init()
5056 test_and_set_bit(HFC_CHIP_CONF, &hc->chip); in hfcmulti_init()
5060 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5062 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in hfcmulti_init()
5063 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5066 test_and_set_bit(HFC_CHIP_EXRAM_128, &hc->chip); in hfcmulti_init()
5068 test_and_set_bit(HFC_CHIP_EXRAM_512, &hc->chip); in hfcmulti_init()
5069 hc->slots = 32; in hfcmulti_init()
5071 hc->slots = 64; in hfcmulti_init()
5073 hc->slots = 128; in hfcmulti_init()
5075 test_and_set_bit(HFC_CHIP_WATCHDOG, &hc->chip); in hfcmulti_init()
5076 hc->wdcount = 0; in hfcmulti_init()
5077 hc->wdbyte = V_GPIO_OUT2; in hfcmulti_init()
5082 /* setup pci, hc->slots may change due to PLXSD */ in hfcmulti_init()
5090 ret_err = -EIO; in hfcmulti_init()
5100 hc->HFC_outb_nodebug = hc->HFC_outb; in hfcmulti_init()
5101 hc->HFC_inb_nodebug = hc->HFC_inb; in hfcmulti_init()
5102 hc->HFC_inw_nodebug = hc->HFC_inw; in hfcmulti_init()
5103 hc->HFC_wait_nodebug = hc->HFC_wait; in hfcmulti_init()
5105 hc->HFC_outb = HFC_outb_debug; in hfcmulti_init()
5106 hc->HFC_inb = HFC_inb_debug; in hfcmulti_init()
5107 hc->HFC_inw = HFC_inw_debug; in hfcmulti_init()
5108 hc->HFC_wait = HFC_wait_debug; in hfcmulti_init()
5111 for (pt = 0; pt < hc->ports; pt++) { in hfcmulti_init()
5115 ret_err = -EINVAL; in hfcmulti_init()
5118 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5124 "%s: Registering D-channel, card(%d) port(%d) " in hfcmulti_init()
5130 pt--; in hfcmulti_init()
5131 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5133 hc->chan[hc->dnum[pt]].dch); in hfcmulti_init()
5136 hc->chan[(pt << 2) + 2].dch); in hfcmulti_init()
5140 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_init()
5143 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_init()
5149 switch (m->dip_type) { in hfcmulti_init()
5160 /* Port mode (TE/NT) jumpers */ in hfcmulti_init()
5163 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in hfcmulti_init()
5167 m->vendor_name, m->card_name, dips, pmj); in hfcmulti_init()
5176 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_init()
5181 dips = inb(hc->pci_iobase); in hfcmulti_init()
5182 dips = inb(hc->pci_iobase); in hfcmulti_init()
5183 dips = inb(hc->pci_iobase); in hfcmulti_init()
5184 dips = ~inb(hc->pci_iobase) & 0x3F; in hfcmulti_init()
5185 outw(0x0, hc->pci_iobase + 4); in hfcmulti_init()
5189 m->vendor_name, m->card_name, dips); in hfcmulti_init()
5198 m->vendor_name, m->card_name, dips); in hfcmulti_init()
5204 list_add_tail(&hc->list, &HFClist); in hfcmulti_init()
5209 hc->iclock = mISDN_register_clock("HFCMulti", 0, clockctl, hc); in hfcmulti_init()
5212 hc->irq = (m->irq) ? : hc->pci_dev->irq; in hfcmulti_init()
5221 spin_lock_irqsave(&hc->lock, flags); in hfcmulti_init()
5223 spin_unlock_irqrestore(&hc->lock, flags); in hfcmulti_init()
5242 pdev->vendor, pdev->device, in hfc_remove_pci()
5243 pdev->subsystem_vendor, pdev->subsystem_device); in hfc_remove_pci()
5263 /*0*/ {VENDOR_BN, "HFC-1S Card (mini PCI)", 4, 1, 1, 3, 0, DIP_4S, 0, 0},
5264 /*1*/ {VENDOR_BN, "HFC-2S Card", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5265 /*2*/ {VENDOR_BN, "HFC-2S Card (mini PCI)", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5266 /*3*/ {VENDOR_BN, "HFC-4S Card", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5267 /*4*/ {VENDOR_BN, "HFC-4S Card (mini PCI)", 4, 4, 1, 2, 0, 0, 0, 0},
5268 /*5*/ {VENDOR_CCD, "HFC-4S Eval (old)", 4, 4, 0, 0, 0, 0, 0, 0},
5269 /*6*/ {VENDOR_CCD, "HFC-4S IOB4ST", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5270 /*7*/ {VENDOR_CCD, "HFC-4S", 4, 4, 1, 2, 0, 0, 0, 0},
5271 /*8*/ {VENDOR_DIG, "HFC-4S Card", 4, 4, 0, 2, 0, 0, HFC_IO_MODE_REGIO, 0},
5272 /*9*/ {VENDOR_CCD, "HFC-4S Swyx 4xS0 SX2 QuadBri", 4, 4, 1, 2, 0, 0, 0, 0},
5273 /*10*/ {VENDOR_JH, "HFC-4S (junghanns 2.0)", 4, 4, 1, 2, 0, 0, 0, 0},
5274 /*11*/ {VENDOR_PRIM, "HFC-2S Primux Card", 4, 2, 0, 0, 0, 0, 0, 0},
5276 /*12*/ {VENDOR_BN, "HFC-8S Card", 8, 8, 1, 0, 0, 0, 0, 0},
5277 /*13*/ {VENDOR_BN, "HFC-8S Card (+)", 8, 8, 1, 8, 0, DIP_8S,
5279 /*14*/ {VENDOR_CCD, "HFC-8S Eval (old)", 8, 8, 0, 0, 0, 0, 0, 0},
5280 /*15*/ {VENDOR_CCD, "HFC-8S IOB4ST Recording", 8, 8, 1, 0, 0, 0, 0, 0},
5282 /*16*/ {VENDOR_CCD, "HFC-8S IOB8ST", 8, 8, 1, 0, 0, 0, 0, 0},
5283 /*17*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5284 /*18*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5286 /*19*/ {VENDOR_BN, "HFC-E1 Card", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5287 /*20*/ {VENDOR_BN, "HFC-E1 Card (mini PCI)", 1, 1, 0, 1, 0, 0, 0, 0},
5288 /*21*/ {VENDOR_BN, "HFC-E1+ Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5289 /*22*/ {VENDOR_BN, "HFC-E1 Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5291 /*23*/ {VENDOR_CCD, "HFC-E1 Eval (old)", 1, 1, 0, 0, 0, 0, 0, 0},
5292 /*24*/ {VENDOR_CCD, "HFC-E1 IOB1E1", 1, 1, 0, 1, 0, 0, 0, 0},
5293 /*25*/ {VENDOR_CCD, "HFC-E1", 1, 1, 0, 1, 0, 0, 0, 0},
5295 /*26*/ {VENDOR_CCD, "HFC-4S Speech Design", 4, 4, 0, 0, 0, 0,
5297 /*27*/ {VENDOR_CCD, "HFC-E1 Speech Design", 1, 1, 0, 0, 0, 0,
5299 /*28*/ {VENDOR_CCD, "HFC-4S OpenVox", 4, 4, 1, 0, 0, 0, 0, 0},
5300 /*29*/ {VENDOR_CCD, "HFC-2S OpenVox", 4, 2, 1, 0, 0, 0, 0, 0},
5301 /*30*/ {VENDOR_CCD, "HFC-8S OpenVox", 8, 8, 1, 0, 0, 0, 0, 0},
5302 /*31*/ {VENDOR_CCD, "XHFC-4S Speech Design", 5, 4, 0, 0, 0, 0,
5304 /*32*/ {VENDOR_JH, "HFC-8S (junghanns)", 8, 8, 1, 0, 0, 0, 0, 0},
5305 /*33*/ {VENDOR_BN, "HFC-2S Beronet Card PCIe", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5306 /*34*/ {VENDOR_BN, "HFC-4S Beronet Card PCIe", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5313 /* Cards with HFC-4S Chip */
5347 /* Cards with HFC-8S Chip */
5368 /* Cards with HFC-E1 Chip */
5405 struct hm_map *m = (struct hm_map *)ent->driver_data; in hfcmulti_probe()
5408 if (m == NULL && ent->vendor == PCI_VENDOR_ID_CCD && ( in hfcmulti_probe()
5409 ent->device == PCI_DEVICE_ID_CCD_HFC4S || in hfcmulti_probe()
5410 ent->device == PCI_DEVICE_ID_CCD_HFC8S || in hfcmulti_probe()
5411 ent->device == PCI_DEVICE_ID_CCD_HFCE1)) { in hfcmulti_probe()
5414 "subvendor:%04x subdevice:%04x)\n", pdev->vendor, in hfcmulti_probe()
5415 pdev->device, pdev->subsystem_vendor, in hfcmulti_probe()
5416 pdev->subsystem_device); in hfcmulti_probe()
5419 return -ENODEV; in hfcmulti_probe()
5454 printk(KERN_INFO "mISDN: HFC-multi driver %s\n", HFC_MULTI_VERSION); in HFCmulti_init()
5489 err = -EINVAL; in HFCmulti_init()