62 static struct icu_chip_data icu_data[MAX_ICU_NR];  variable
75 	if (data == &icu_data[0]) {  in icu_mask_ack_irq()
99 	if (data == &icu_data[0]) {  in icu_mask_irq()
128 	if (data == &icu_data[0]) {  in icu_unmask_irq()
158 		if (irq == icu_data[i].cascade_irq) {  in icu_mux_irq_demux()
159 			domain = icu_data[i].domain;  in icu_mux_irq_demux()
175 			generic_handle_irq(icu_data[i].virq_base + n);  in icu_mux_irq_demux()
233 	generic_handle_domain_irq(icu_data[0].domain, hwirq);  in mmp_handle_irq()
244 	generic_handle_domain_irq(icu_data[0].domain, hwirq);  in mmp2_handle_irq()
263 	icu_data[0].virq_base = 0;  in mmp_init_bases()
264 	icu_data[0].domain = irq_domain_add_linear(node, nr_irqs,  in mmp_init_bases()
266 						   &icu_data[0]);  in mmp_init_bases()
268 		ret = irq_create_mapping(icu_data[0].domain, irq);  in mmp_init_bases()
274 			icu_data[0].virq_base = ret;  in mmp_init_bases()
276 	icu_data[0].nr_irqs = nr_irqs;  in mmp_init_bases()
279 	if (icu_data[0].virq_base) {  in mmp_init_bases()
281 			irq_dispose_mapping(icu_data[0].virq_base + i);  in mmp_init_bases()
283 	irq_domain_remove(icu_data[0].domain);  in mmp_init_bases()
297 	icu_data[0].conf_enable = mmp_conf.conf_enable;  in mmp_of_init()
298 	icu_data[0].conf_disable = mmp_conf.conf_disable;  in mmp_of_init()
299 	icu_data[0].conf_mask = mmp_conf.conf_mask;  in mmp_of_init()
315 	icu_data[0].conf_enable = mmp2_conf.conf_enable;  in mmp2_of_init()
316 	icu_data[0].conf_disable = mmp2_conf.conf_disable;  in mmp2_of_init()
317 	icu_data[0].conf_mask = mmp2_conf.conf_mask;  in mmp2_of_init()
341 	icu_data[0].conf_enable = mmp3_conf.conf_enable;  in mmp3_of_init()
342 	icu_data[0].conf_disable = mmp3_conf.conf_disable;  in mmp3_of_init()
343 	icu_data[0].conf_mask = mmp3_conf.conf_mask;  in mmp3_of_init()
344 	icu_data[0].conf2_mask = mmp3_conf.conf2_mask;  in mmp3_of_init()
387 	icu_data[i].reg_status = mmp_icu_base + reg[0];  in mmp2_mux_of_init()
388 	icu_data[i].reg_mask = mmp_icu_base + reg[2];  in mmp2_mux_of_init()
389 	icu_data[i].cascade_irq = irq_of_parse_and_map(node, 0);  in mmp2_mux_of_init()
390 	if (!icu_data[i].cascade_irq)  in mmp2_mux_of_init()
393 	icu_data[i].virq_base = 0;  in mmp2_mux_of_init()
394 	icu_data[i].domain = irq_domain_add_linear(node, nr_irqs,  in mmp2_mux_of_init()
396 						   &icu_data[i]);  in mmp2_mux_of_init()
398 		ret = irq_create_mapping(icu_data[i].domain, irq);  in mmp2_mux_of_init()
404 			icu_data[i].virq_base = ret;  in mmp2_mux_of_init()
406 	icu_data[i].nr_irqs = nr_irqs;  in mmp2_mux_of_init()
409 		icu_data[i].clr_mfp_irq_base = icu_data[i].virq_base;  in mmp2_mux_of_init()
410 		icu_data[i].clr_mfp_hwirq = mfp_irq;  in mmp2_mux_of_init()
412 	irq_set_chained_handler(icu_data[i].cascade_irq,  in mmp2_mux_of_init()
417 	if (icu_data[i].virq_base) {  in mmp2_mux_of_init()
419 			irq_dispose_mapping(icu_data[i].virq_base + j);  in mmp2_mux_of_init()
421 	irq_domain_remove(icu_data[i].domain);  in mmp2_mux_of_init()