Lines Matching refs:AT91_AIC5_SSR
39 #define AT91_AIC5_SSR 0x0 macro
97 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); in aic5_mask()
114 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); in aic5_unmask()
127 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR); in aic5_retrigger()
142 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR); in aic5_set_type()
166 irq_reg_writel(bgc, i, AT91_AIC5_SSR); in aic5_suspend()
176 irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR); in aic5_suspend()
199 irq_reg_writel(bgc, i, AT91_AIC5_SSR); in aic5_resume()
212 irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR); in aic5_resume()
231 irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR); in aic5_pm_shutdown()
267 irq_reg_writel(gc, i, AT91_AIC5_SSR); in aic5_hw_init()
294 irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR); in aic5_irq_domain_xlate()