Lines Matching +full:imx +full:- +full:irqsteer

1 # SPDX-License-Identifier: GPL-2.0-only
121 	tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
129 	tristate "Broadcom STB 7120-style L2 interrupt controller driver"
211 	bool "J-Core integrated AIC" if COMPILE_TEST
215 	  Support for the J-Core integrated AIC.
226 	  interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
229 	bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
234 	  devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
284 	tristate "TS-4800 IRQ controller"
289 	  Support for the TS-4800 FPGA IRQ controller
356 	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
454 	  Say yes here to enable C-SKY SMP interrupt controller driver used
455 	  for C-SKY SMP system.
460 	bool "C-SKY APB Interrupt Controller"
463 	  Say yes here to enable C-SKY APB interrupt controller driver used
464 	  by C-SKY single core SOC system. It uses mmio map apb-bus to visit
468 	bool "i.MX IRQSTEER support"
473 	  Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
492 	  CPU-to-CPU MSI controller. This requires a specially crafted DT
498 	bool "Loongson-1 Interrupt Controller"
504 	  Support for the Loongson-1 platform Interrupt Controller.
533 	  This enables support for the PRU-ICSS Local Interrupt Controller
534 	  present within a PRU-ICSS subsystem present on various TI SoCs.
570 	  Documentation/arch/loongarch/irq-chip-model.rst.
598 	  Support for the Loongson-3 HyperTransport PIC Controller.
678 	  SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
679 	  chained controller, routing all interrupt source in P-Chip to
680 	  the primary controller on C-Chip.