Lines Matching refs:MTK_IOMMU_HAS_FLAG

153 #define MTK_IOMMU_HAS_FLAG(pdata, _x)	MTK_IOMMU_HAS_FLAG_MASK(pdata, _x, _x)  macro
417 check_pm_status = !MTK_IOMMU_HAS_FLAG(data->plat_data, PM_CLK_AO); in mtk_iommu_tlb_flush_range_sync()
480 if (MTK_IOMMU_HAS_FLAG(plat_data, IOVA_34_EN)) { in mtk_iommu_isr()
489 if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_2BITS)) { in mtk_iommu_isr()
493 } else if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_3BITS)) { in mtk_iommu_isr()
497 } else if (MTK_IOMMU_HAS_FLAG(plat_data, INT_ID_PORT_WIDTH_6)) { in mtk_iommu_isr()
613 if (MTK_IOMMU_HAS_FLAG(data->plat_data, CFG_IFA_MASTER_IN_ATF)) { in mtk_iommu_config()
659 .ias = MTK_IOMMU_HAS_FLAG(data->plat_data, IOVA_34_EN) ? 34 : 32, in mtk_iommu_domain_finalise()
663 if (MTK_IOMMU_HAS_FLAG(data->plat_data, PGTABLE_PA_35_EN)) in mtk_iommu_domain_finalise()
666 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) in mtk_iommu_domain_finalise()
1028 if (MTK_IOMMU_HAS_FLAG(data->plat_data, TF_PORT_TO_ADDR_MT8173)) { in mtk_iommu_hw_init()
1038 MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_VLD_PA_RNG)) { in mtk_iommu_hw_init()
1046 if (MTK_IOMMU_HAS_FLAG(data->plat_data, DCM_DISABLE)) in mtk_iommu_hw_init()
1051 if (MTK_IOMMU_HAS_FLAG(data->plat_data, WR_THROT_EN)) { in mtk_iommu_hw_init()
1058 if (MTK_IOMMU_HAS_FLAG(data->plat_data, RESET_AXI)) { in mtk_iommu_hw_init()
1063 if (!MTK_IOMMU_HAS_FLAG(data->plat_data, STD_AXI_MODE)) in mtk_iommu_hw_init()
1065 if (MTK_IOMMU_HAS_FLAG(data->plat_data, OUT_ORDER_WR_EN)) in mtk_iommu_hw_init()
1088 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_LEGACY_IVRP_PADDR)) in mtk_iommu_hw_init()
1256 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) { in mtk_iommu_probe()
1322 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_BCLK)) { in mtk_iommu_probe()
1328 if (MTK_IOMMU_HAS_FLAG(data->plat_data, PGTABLE_PA_35_EN)) { in mtk_iommu_probe()
1345 !MTK_IOMMU_HAS_FLAG(data->plat_data, CFG_IFA_MASTER_IN_ATF)) { in mtk_iommu_probe()
1366 if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE)) { in mtk_iommu_probe()