212 static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain,  in ipmmu_ctx_read_root()  argument
215 	return ipmmu_ctx_read(domain->mmu->root, domain->context_id, reg);  in ipmmu_ctx_read_root()
218 static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain,  in ipmmu_ctx_write_root()  argument
221 	ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);  in ipmmu_ctx_write_root()
224 static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain,  in ipmmu_ctx_write_all()  argument
227 	if (domain->mmu != domain->mmu->root)  in ipmmu_ctx_write_all()
228 		ipmmu_ctx_write(domain->mmu, domain->context_id, reg, data);  in ipmmu_ctx_write_all()
230 	ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);  in ipmmu_ctx_write_all()
255 static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain)  in ipmmu_tlb_sync()  argument
261 				     false, domain, IMCTR))  in ipmmu_tlb_sync()
262 		dev_err_ratelimited(domain->mmu->dev,  in ipmmu_tlb_sync()
266 static void ipmmu_tlb_invalidate(struct ipmmu_vmsa_domain *domain)  in ipmmu_tlb_invalidate()  argument
270 	reg = ipmmu_ctx_read_root(domain, IMCTR);  in ipmmu_tlb_invalidate()
272 	ipmmu_ctx_write_all(domain, IMCTR, reg);  in ipmmu_tlb_invalidate()
274 	ipmmu_tlb_sync(domain);  in ipmmu_tlb_invalidate()
280 static void ipmmu_utlb_enable(struct ipmmu_vmsa_domain *domain,  in ipmmu_utlb_enable()  argument
283 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_utlb_enable()
293 	ipmmu_imuctr_write(mmu, utlb, IMUCTR_TTSEL_MMU(domain->context_id) |  in ipmmu_utlb_enable()
295 	mmu->utlb_ctx[utlb] = domain->context_id;  in ipmmu_utlb_enable()
300 	struct ipmmu_vmsa_domain *domain = cookie;  in ipmmu_tlb_flush_all()  local
302 	ipmmu_tlb_invalidate(domain);  in ipmmu_tlb_flush_all()
321 					 struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_allocate_context()  argument
330 		mmu->domains[ret] = domain;  in ipmmu_domain_allocate_context()
353 static void ipmmu_domain_setup_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_setup_context()  argument
359 	ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr;  in ipmmu_domain_setup_context()
360 	ipmmu_ctx_write_root(domain, IMTTLBR0, ttbr);  in ipmmu_domain_setup_context()
361 	ipmmu_ctx_write_root(domain, IMTTUBR0, ttbr >> 32);  in ipmmu_domain_setup_context()
368 	if (domain->mmu->features->twobit_imttbcr_sl0)  in ipmmu_domain_setup_context()
373 	if (domain->mmu->features->cache_snoop)  in ipmmu_domain_setup_context()
377 	ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE | tmp);  in ipmmu_domain_setup_context()
380 	ipmmu_ctx_write_root(domain, IMMAIR0,  in ipmmu_domain_setup_context()
381 			     domain->cfg.arm_lpae_s1_cfg.mair);  in ipmmu_domain_setup_context()
384 	if (domain->mmu->features->setup_imbuscr)  in ipmmu_domain_setup_context()
385 		ipmmu_ctx_write_root(domain, IMBUSCR,  in ipmmu_domain_setup_context()
386 				     ipmmu_ctx_read_root(domain, IMBUSCR) &  in ipmmu_domain_setup_context()
393 	ipmmu_ctx_write_root(domain, IMSTR, ipmmu_ctx_read_root(domain, IMSTR));  in ipmmu_domain_setup_context()
402 	ipmmu_ctx_write_all(domain, IMCTR,  in ipmmu_domain_setup_context()
406 static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_init_context()  argument
421 	domain->cfg.quirks = IO_PGTABLE_QUIRK_ARM_NS;  in ipmmu_domain_init_context()
422 	domain->cfg.pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K;  in ipmmu_domain_init_context()
423 	domain->cfg.ias = 32;  in ipmmu_domain_init_context()
424 	domain->cfg.oas = 40;  in ipmmu_domain_init_context()
425 	domain->cfg.tlb = &ipmmu_flush_ops;  in ipmmu_domain_init_context()
426 	domain->io_domain.geometry.aperture_end = DMA_BIT_MASK(32);  in ipmmu_domain_init_context()
427 	domain->io_domain.geometry.force_aperture = true;  in ipmmu_domain_init_context()
432 	domain->cfg.coherent_walk = false;  in ipmmu_domain_init_context()
433 	domain->cfg.iommu_dev = domain->mmu->root->dev;  in ipmmu_domain_init_context()
438 	ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);  in ipmmu_domain_init_context()
442 	domain->context_id = ret;  in ipmmu_domain_init_context()
444 	domain->iop = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &domain->cfg,  in ipmmu_domain_init_context()
445 					   domain);  in ipmmu_domain_init_context()
446 	if (!domain->iop) {  in ipmmu_domain_init_context()
447 		ipmmu_domain_free_context(domain->mmu->root,  in ipmmu_domain_init_context()
448 					  domain->context_id);  in ipmmu_domain_init_context()
452 	ipmmu_domain_setup_context(domain);  in ipmmu_domain_init_context()
456 static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_destroy_context()  argument
458 	if (!domain->mmu)  in ipmmu_domain_destroy_context()
467 	ipmmu_ctx_write_all(domain, IMCTR, IMCTR_FLUSH);  in ipmmu_domain_destroy_context()
468 	ipmmu_tlb_sync(domain);  in ipmmu_domain_destroy_context()
469 	ipmmu_domain_free_context(domain->mmu->root, domain->context_id);  in ipmmu_domain_destroy_context()
476 static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_irq()  argument
479 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_domain_irq()
483 	status = ipmmu_ctx_read_root(domain, IMSTR);  in ipmmu_domain_irq()
487 	iova = ipmmu_ctx_read_root(domain, IMELAR);  in ipmmu_domain_irq()
489 		iova |= (u64)ipmmu_ctx_read_root(domain, IMEUAR) << 32;  in ipmmu_domain_irq()
497 	ipmmu_ctx_write_root(domain, IMSTR, 0);  in ipmmu_domain_irq()
516 	if (!report_iommu_fault(&domain->io_domain, mmu->dev, iova, 0))  in ipmmu_domain_irq()
556 	struct ipmmu_vmsa_domain *domain;  in ipmmu_domain_alloc()  local
561 	domain = kzalloc(sizeof(*domain), GFP_KERNEL);  in ipmmu_domain_alloc()
562 	if (!domain)  in ipmmu_domain_alloc()
565 	mutex_init(&domain->mutex);  in ipmmu_domain_alloc()
567 	return &domain->io_domain;  in ipmmu_domain_alloc()
572 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_domain_free()  local
578 	ipmmu_domain_destroy_context(domain);  in ipmmu_domain_free()
579 	free_io_pgtable_ops(domain->iop);  in ipmmu_domain_free()
580 	kfree(domain);  in ipmmu_domain_free()
588 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_attach_device()  local
597 	mutex_lock(&domain->mutex);  in ipmmu_attach_device()
599 	if (!domain->mmu) {  in ipmmu_attach_device()
601 		domain->mmu = mmu;  in ipmmu_attach_device()
602 		ret = ipmmu_domain_init_context(domain);  in ipmmu_attach_device()
605 			domain->mmu = NULL;  in ipmmu_attach_device()
608 				 domain->context_id);  in ipmmu_attach_device()
610 	} else if (domain->mmu != mmu) {  in ipmmu_attach_device()
617 		dev_info(dev, "Reusing IPMMU context %u\n", domain->context_id);  in ipmmu_attach_device()
619 	mutex_unlock(&domain->mutex);  in ipmmu_attach_device()
625 		ipmmu_utlb_enable(domain, fwspec->ids[i]);  in ipmmu_attach_device()
634 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_map()  local
636 	return domain->iop->map_pages(domain->iop, iova, paddr, pgsize, pgcount,  in ipmmu_map()
644 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_unmap()  local
646 	return domain->iop->unmap_pages(domain->iop, iova, pgsize, pgcount, gather);  in ipmmu_unmap()
651 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_flush_iotlb_all()  local
653 	if (domain->mmu)  in ipmmu_flush_iotlb_all()
654 		ipmmu_tlb_flush_all(domain);  in ipmmu_flush_iotlb_all()
666 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_iova_to_phys()  local
670 	return domain->iop->iova_to_phys(domain->iop, iova);  in ipmmu_iova_to_phys()