Lines Matching refs:iommu_writel
101 iommu_writel(struct qcom_iommu_ctx *ctx, unsigned reg, u32 val) in iommu_writel() function
134 iommu_writel(ctx, ARM_SMMU_CB_TLBSYNC, 0); in qcom_iommu_tlb_sync()
151 iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid); in qcom_iommu_tlb_inv_context()
173 iommu_writel(ctx, reg, iova); in qcom_iommu_tlb_inv_range_nosync()
220 iommu_writel(ctx, ARM_SMMU_CB_FSR, fsr); in qcom_iommu_fault()
221 iommu_writel(ctx, ARM_SMMU_CB_RESUME, ARM_SMMU_RESUME_TERMINATE); in qcom_iommu_fault()
283 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0); in qcom_iommu_init_domain()
286 iommu_writel(ctx, ARM_SMMU_CB_FAR, 0); in qcom_iommu_init_domain()
287 iommu_writel(ctx, ARM_SMMU_CB_FSR, ARM_SMMU_FSR_FAULT); in qcom_iommu_init_domain()
296 iommu_writel(ctx, ARM_SMMU_CB_TCR2, in qcom_iommu_init_domain()
298 iommu_writel(ctx, ARM_SMMU_CB_TCR, in qcom_iommu_init_domain()
302 iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR0, in qcom_iommu_init_domain()
304 iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR1, in qcom_iommu_init_domain()
316 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, reg); in qcom_iommu_init_domain()
683 iommu_writel(ctx, ARM_SMMU_CB_FSR, iommu_readl(ctx, ARM_SMMU_CB_FSR)); in qcom_iommu_ctx_probe()