Lines Matching full:62
386 #define IRDMA_CQPSQ_QHASH_MANAGE GENMASK_ULL(62, 61)
391 #define IRDMA_CQPSQ_STATS_ALLOC_INST BIT_ULL(62)
400 #define IRDMA_CQPSQ_WS_ENABLENODE BIT_ULL(62)
413 #define IRDMA_CQPSQ_UP_USEVLAN BIT_ULL(62)
470 #define IRDMA_CQ_SQ BIT_ULL(62)
473 #define IRDMA_CQ_IMMVALID BIT_ULL(62)
495 #define IRDMA_CEQE_CQCTX GENMASK_ULL(62, 0)
508 #define IRDMA_AEQE_Q2DATA GENMASK_ULL(62, 61)
517 #define IRDMA_UDA_QPSQ_SIGCOMPL BIT_ULL(62)
518 #define IRDMA_UDA_QPSQ_MACLEN GENMASK_ULL(62, 56)
565 #define IRDMA_CQPSQ_QP_NEXTIWSTATE GENMASK_ULL(62, 60)
570 #define IRDMA_CQPSQ_CQ_CQCTX GENMASK_ULL(62, 0)
608 #define IRDMA_CQPSQ_MLM_FREEENTRY BIT_ULL(62)
625 #define IRDMA_CQPSQ_MVPBP_INV_PD_ENT BIT_ULL(62)
636 #define IRDMA_CQPSQ_MPP_FREE_PAGE BIT_ULL(62)
644 #define IRDMA_CQPSQ_UCTX_FREEZEQP BIT_ULL(62)
647 #define IRDMA_CQPSQ_MHMC_FREEPMFN BIT_ULL(62)
677 #define IRDMA_CQPSQ_FWQE_FLUSHRQ BIT_ULL(62)
679 #define IRDMA_CQPSQ_MAPT_ADDPORT BIT_ULL(62)
727 #define IRDMAQPC_RDMAP_VER GENMASK_ULL(63, 62)
847 #define IRDMAQPSQ_SIGCOMPL BIT_ULL(62)
852 #define IRDMAQPSQ_FRAG_LEN GENMASK_ULL(62, 32)