Lines Matching full:sbr

768  * before the SBR for the Pcie Gen3.
792  * Trigger a secondary bus reset (SBR) on ourselves using our parent.
818 	 * This is an end around to do an SBR during probe time. A new API needs  in trigger_sbr()
1011 	/* hold the SBus resource across the firmware download and SBR */  in do_pcie_gen3_transition()
1047 	 * will be performed automatically after the SBR when the target  in do_pcie_gen3_transition()
1247 	/* hold DC in reset across the SBR */  in do_pcie_gen3_transition()
1250 	/* save firmware control across the SBR */  in do_pcie_gen3_transition()
1265 	 * step 7: initiate the secondary bus reset (SBR)  in do_pcie_gen3_transition()
1280 			    "%s: read of VendorID failed after SBR, err %d\n",  in do_pcie_gen3_transition()
1286 		dd_dev_info(dd, "%s: VendorID is all 1s after SBR\n", __func__);  in do_pcie_gen3_transition()
1308 	 * This is the first CSR read after the SBR.  If the read returns  in do_pcie_gen3_transition()
1312 	 * the SBR.  Then check for any per-lane errors. Then look over  in do_pcie_gen3_transition()
1318 		dd_dev_err(dd, "SBR failed - unable to read from device\n");  in do_pcie_gen3_transition()