1019 struct hfi1_devdata {  struct
1020 	struct hfi1_ibdev verbs_dev;     /* must be first */
1023 	struct pci_dev *pcidev;
1024 	struct cdev user_cdev;
1025 	struct cdev diag_cdev;
1026 	struct cdev ui_cdev;
1027 	struct device *user_device;
1028 	struct device *diag_device;
1029 	struct device *ui_device;
1032 	u8 __iomem *kregbase1;
1033 	resource_size_t physaddr;
1036 	u8 __iomem *kregbase2;
1038 	u32 base2_start;
1041 	struct per_vl_data vld[PER_VL_SEND_CONTEXTS];
1043 	struct send_context_info *send_contexts;
1045 	u8 *hw_to_sw;
1047 	spinlock_t sc_lock;
1049 	spinlock_t pio_map_lock;
1051 	spinlock_t sc_init_lock;
1053 	spinlock_t                          sde_map_lock;
1055 	struct send_context **kernel_send_context;
1057 	struct pio_vl_map __rcu *pio_map;
1059 	u64 default_desc1;
1063 	volatile __le64                    *sdma_heads_dma; /* DMA'ed by chip */
1064 	dma_addr_t                          sdma_heads_phys;
1065 	void                               *sdma_pad_dma; /* DMA'ed by chip */
1066 	dma_addr_t                          sdma_pad_phys;
1068 	size_t                              sdma_heads_size;
1070 	u32                                 num_sdma;
1072 	struct sdma_engine                 *per_sdma;
1074 	struct sdma_vl_map __rcu           *sdma_map;
1076 	wait_queue_head_t		  sdma_unfreeze_wq;
1077 	atomic_t			  sdma_unfreeze_count;
1079 	u32 lcb_access_count;		/* count of LCB users */
1082 	struct hfi1_asic_data *asic_data;
1085 	void __iomem *piobase;
1090 	void __iomem *rcvarray_wc;
1095 	struct credit_return_base *cr_base;
1098 	struct sc_config_sizes sc_sizes[SC_MAX];
1100 	char *boardname; /* human readable board info */
1102 	u64 ctx0_seq_drop;
1105 	u64 z_int_counter;
1106 	u64 z_rcv_limit;
1107 	u64 z_send_schedule;
1109 	u64 __percpu *send_schedule;
1111 	u16 num_netdev_contexts;
1113 	u32 num_rcv_contexts;
1115 	u32 num_send_contexts;
1119 	u32 freectxts;
1121 	u32 num_user_contexts;
1123 	u32 rcv_intr_timeout_csr;
1125 	spinlock_t sendctrl_lock; /* protect changes to SendCtrl */
1126 	spinlock_t rcvctrl_lock; /* protect changes to RcvCtrl */
1127 	spinlock_t uctxt_lock; /* protect rcd changes */
1128 	struct mutex dc8051_lock; /* exclusive access to 8051 */
1129 	struct workqueue_struct *update_cntr_wq;
1130 	struct work_struct update_cntr_work;
1132 	spinlock_t dc8051_memlock;
1133 	int dc8051_timed_out;	/* remember if the 8051 timed out */
1138 	unsigned long *events;
1144 	struct hfi1_status *status;
1147 	u64 revision;
1149 	u64 base_guid;
1152 	u8 link_gen3_capable;
1153 	u8 dc_shutdown;
1155 	u32 lbus_width;
1157 	u32 lbus_speed;
1158 	int unit; /* unit # of this chip */
1159 	int node; /* home node of this chip */
1162 	u32 pcibar0;
1163 	u32 pcibar1;
1164 	u32 pci_rom;
1165 	u16 pci_command;
1166 	u16 pcie_devctl;
1167 	u16 pcie_lnkctl;
1168 	u16 pcie_devctl2;
1169 	u32 pci_msix0;
1170 	u32 pci_tph2;
1176 	u8 serial[SERIAL_MAX];
1178 	u8 boardversion[BOARD_VERS_MAX];
1179 	u8 lbus_info[32]; /* human readable localbus info */
1181 	u8 majrev;
1183 	u8 minrev;
1185 	u8 hfi1_id;
1187 	u8 icode;
1189 	u8 vau;
1191 	u8 vcu;
1193 	u16 link_credits;
1195 	u16 vl15_init;
1203 	u16 vl15buf_cached;
1206 	u8 n_krcv_queues;
1207 	u8 qos_shift;
1209 	u16 irev;	/* implementation revision */
1210 	u32 dc8051_ver; /* 8051 firmware version */
1212 	spinlock_t hfi1_diag_trans_lock; /* protect diag observer ops */
1213 	struct platform_config platform_config;
1214 	struct platform_config_cache pcfg_cache;
1216 	struct diag_client *diag_client;
1219 	u64 gi_mask[CCE_NUM_INT_CSRS];
1221 	struct rcv_array_data rcv_entries;
1224 	u16 psxmitwait_check_rate;
1229 	struct timer_list synth_stats_timer;
1232 	struct hfi1_msix_info msix_info;
1237 	char *cntrnames;
1238 	size_t cntrnameslen;
1239 	size_t ndevcntrs;
1240 	u64 *cntrs;
1241 	u64 *scntrs;
1246 	u64 last_tx;
1247 	u64 last_rx;
1252 	size_t nportcntrs;
1253 	char *portcntrnames;
1254 	size_t portcntrnameslen;
1256 	struct err_info_rcvport err_info_rcvport;
1257 	struct err_info_constraint err_info_rcv_constraint;
1258 	struct err_info_constraint err_info_xmit_constraint;
1260 	atomic_t drop_packet;
1261 	bool do_drop;
1262 	u8 err_info_uncorrectable;
1263 	u8 err_info_fmconfig;
1269 	u64 cce_err_status_cnt[NUM_CCE_ERR_STATUS_COUNTERS];
1270 	u64 rcv_err_status_cnt[NUM_RCV_ERR_STATUS_COUNTERS];
1271 	u64 misc_err_status_cnt[NUM_MISC_ERR_STATUS_COUNTERS];
1272 	u64 send_pio_err_status_cnt[NUM_SEND_PIO_ERR_STATUS_COUNTERS];
1273 	u64 send_dma_err_status_cnt[NUM_SEND_DMA_ERR_STATUS_COUNTERS];
1274 	u64 send_egress_err_status_cnt[NUM_SEND_EGRESS_ERR_STATUS_COUNTERS];
1275 	u64 send_err_status_cnt[NUM_SEND_ERR_STATUS_COUNTERS];
1299 	void (*pio_inline_send)(struct hfi1_devdata *dd, struct pio_buf *pbuf,  argument
1301 	int (*process_vnic_dma_send)(struct hfi1_devdata *dd, u8 q_idx,  argument
1307 	struct hfi1_pportdata *pport;
1309 	struct hfi1_ctxtdata **rcd;
1310 	u64 __percpu *int_counter;
1312 	struct hfi1_opcode_stats_perctx __percpu *tx_opstats;
1314 	u16 flags;
1316 	u8 num_pports;
1318 	u8 first_dyn_alloc_ctxt;
1322 	seqlock_t sc2vl_lock ____cacheline_aligned_in_smp;
1323 	u64 sc2vl[4];
1324 	u64 __percpu *rcv_limit;
1328 	u8 oui1;
1329 	u8 oui2;
1330 	u8 oui3;
1333 	struct timer_list rcverr_timer;
1335 	wait_queue_head_t event_queue;
1338 	__le64 *rcvhdrtail_dummy_kvaddr;
1339 	dma_addr_t rcvhdrtail_dummy_dma;
1341 	u32 rcv_ovfl_cnt;
1343 	spinlock_t aspm_lock;
1345 	atomic_t aspm_disabled_cnt;
1347 	refcount_t user_refcount;
1349 	struct completion user_comp;
1351 	bool eprom_available;	/* true if EPROM is available for this device */
1352 	bool aspm_supported;	/* Does HW support ASPM */
1353 	bool aspm_enabled;	/* ASPM state: enabled/disabled */
1354 	struct rhashtable *sdma_rht;
1357 	struct hfi1_vnic_data vnic;
1359 	spinlock_t irq_src_lock;
1360 	int vnic_num_vports;
1361 	struct hfi1_netdev_rx *netdev_rx;
1385 	struct hfi1_devdata *dd;  argument