Lines Matching +full:data +full:- +full:clock +full:- +full:ratio
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/nvmem-consumer.h>
63 /* Timeout (us) for ADC data conversion according to ADC datasheet */
70 /* ADC voltage ratio definition */
101 * address and ratio, we should save ratio config and base
102 * in the device data structure.
111 void (*init_scale)(struct sc27xx_adc_data *data);
126 * should use the small-scale graph, and if more than 1.2v, we should use the
127 * big-scale graph.
161 return ((calib_data & 0xff) + calib_adc - 128) * 4; in sc27xx_adc_get_calib_data()
164 /* get the adc nvmem cell calibration data */
165 static int adc_nvmem_cell_calib_data(struct sc27xx_adc_data *data, const char *cell_name) in adc_nvmem_cell_calib_data() argument
172 if (!data) in adc_nvmem_cell_calib_data()
173 return -EINVAL; in adc_nvmem_cell_calib_data()
175 cell = nvmem_cell_get(data->dev, cell_name); in adc_nvmem_cell_calib_data()
192 static int sc27xx_adc_scale_calibration(struct sc27xx_adc_data *data, in sc27xx_adc_scale_calibration() argument
201 calib_graph = data->var_data->bscale_cal; in sc27xx_adc_scale_calibration()
205 calib_graph = data->var_data->sscale_cal; in sc27xx_adc_scale_calibration()
210 calib_data = adc_nvmem_cell_calib_data(data, cell_name); in sc27xx_adc_scale_calibration()
213 graph->adc0 = sc27xx_adc_get_calib_data(calib_data, calib_graph->adc0); in sc27xx_adc_scale_calibration()
214 graph->adc1 = sc27xx_adc_get_calib_data(calib_data >> 8, in sc27xx_adc_scale_calibration()
215 calib_graph->adc1); in sc27xx_adc_scale_calibration()
410 static void sc2720_adc_scale_init(struct sc27xx_adc_data *data) in sc2720_adc_scale_init() argument
417 data->channel_scale[i] = 3; in sc2720_adc_scale_init()
421 data->channel_scale[i] = 2; in sc2720_adc_scale_init()
424 data->channel_scale[i] = 1; in sc2720_adc_scale_init()
429 data->channel_scale[i] = 3; in sc2720_adc_scale_init()
432 data->channel_scale[i] = 0; in sc2720_adc_scale_init()
438 static void sc2730_adc_scale_init(struct sc27xx_adc_data *data) in sc2730_adc_scale_init() argument
449 data->channel_scale[i] = 3; in sc2730_adc_scale_init()
453 data->channel_scale[i] = 2; in sc2730_adc_scale_init()
456 data->channel_scale[i] = 1; in sc2730_adc_scale_init()
459 data->channel_scale[i] = 0; in sc2730_adc_scale_init()
465 static void sc2731_adc_scale_init(struct sc27xx_adc_data *data) in sc2731_adc_scale_init() argument
475 data->channel_scale[i] = 1; in sc2731_adc_scale_init()
478 data->channel_scale[i] = 0; in sc2731_adc_scale_init()
484 static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, in sc27xx_adc_read() argument
490 ret = hwspin_lock_timeout_raw(data->hwlock, SC27XX_ADC_HWLOCK_TIMEOUT); in sc27xx_adc_read()
492 dev_err(data->dev, "timeout to get the hwspinlock\n"); in sc27xx_adc_read()
497 * According to the sc2721 chip data sheet, the reference voltage of in sc27xx_adc_read()
501 if ((data->var_data->set_volref) && (channel == 30 || channel == 31)) { in sc27xx_adc_read()
502 ret = regulator_set_voltage(data->volref, in sc27xx_adc_read()
506 dev_err(data->dev, "failed to set the volref 3.5v\n"); in sc27xx_adc_read()
511 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, in sc27xx_adc_read()
516 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_INT_CLR, in sc27xx_adc_read()
522 tmp = (scale << data->var_data->scale_shift) & data->var_data->scale_mask; in sc27xx_adc_read()
524 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CH_CFG, in sc27xx_adc_read()
526 data->var_data->scale_mask, in sc27xx_adc_read()
534 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, in sc27xx_adc_read()
540 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, in sc27xx_adc_read()
545 ret = regmap_read_poll_timeout(data->regmap, in sc27xx_adc_read()
546 data->base + SC27XX_ADC_INT_RAW, in sc27xx_adc_read()
551 dev_err(data->dev, "read adc timeout, status = 0x%x\n", status); in sc27xx_adc_read()
555 ret = regmap_read(data->regmap, data->base + SC27XX_ADC_DATA, &value); in sc27xx_adc_read()
562 regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, in sc27xx_adc_read()
565 if ((data->var_data->set_volref) && (channel == 30 || channel == 31)) { in sc27xx_adc_read()
566 ret_volref = regulator_set_voltage(data->volref, in sc27xx_adc_read()
570 dev_err(data->dev, "failed to set the volref 2.8v,ret_volref = 0x%x\n", in sc27xx_adc_read()
576 hwspin_unlock_raw(data->hwlock); in sc27xx_adc_read()
584 static void sc27xx_adc_volt_ratio(struct sc27xx_adc_data *data, int channel, int scale, in sc27xx_adc_volt_ratio() argument
587 u32 ratio; in sc27xx_adc_volt_ratio() local
589 ratio = data->var_data->get_ratio(channel, scale); in sc27xx_adc_volt_ratio()
590 fract->numerator = ratio >> SC27XX_RATIO_NUMERATOR_OFFSET; in sc27xx_adc_volt_ratio()
591 fract->denominator = ratio & SC27XX_RATIO_DENOMINATOR_MASK; in sc27xx_adc_volt_ratio()
599 tmp = (graph->volt0 - graph->volt1) * (raw_adc - graph->adc1); in adc_to_volt()
600 tmp /= (graph->adc0 - graph->adc1); in adc_to_volt()
601 tmp += graph->volt1; in adc_to_volt()
616 static int sc27xx_adc_convert_volt(struct sc27xx_adc_data *data, int channel, in sc27xx_adc_convert_volt() argument
627 * voltage ratio. in sc27xx_adc_convert_volt()
641 sc27xx_adc_volt_ratio(data, channel, scale, &fract); in sc27xx_adc_convert_volt()
646 static int sc27xx_adc_read_processed(struct sc27xx_adc_data *data, in sc27xx_adc_read_processed() argument
651 ret = sc27xx_adc_read(data, channel, scale, &raw_adc); in sc27xx_adc_read_processed()
655 *val = sc27xx_adc_convert_volt(data, channel, scale, raw_adc); in sc27xx_adc_read_processed()
663 struct sc27xx_adc_data *data = iio_priv(indio_dev); in sc27xx_adc_read_raw() local
664 int scale = data->channel_scale[chan->channel]; in sc27xx_adc_read_raw()
669 mutex_lock(&data->lock); in sc27xx_adc_read_raw()
670 ret = sc27xx_adc_read(data, chan->channel, scale, &tmp); in sc27xx_adc_read_raw()
671 mutex_unlock(&data->lock); in sc27xx_adc_read_raw()
680 mutex_lock(&data->lock); in sc27xx_adc_read_raw()
681 ret = sc27xx_adc_read_processed(data, chan->channel, scale, in sc27xx_adc_read_raw()
683 mutex_unlock(&data->lock); in sc27xx_adc_read_raw()
696 return -EINVAL; in sc27xx_adc_read_raw()
704 struct sc27xx_adc_data *data = iio_priv(indio_dev); in sc27xx_adc_write_raw() local
708 data->channel_scale[chan->channel] = val; in sc27xx_adc_write_raw()
712 return -EINVAL; in sc27xx_adc_write_raw()
764 static int sc27xx_adc_enable(struct sc27xx_adc_data *data) in sc27xx_adc_enable() argument
768 ret = regmap_update_bits(data->regmap, data->var_data->module_en, in sc27xx_adc_enable()
773 /* Enable ADC work clock and controller clock */ in sc27xx_adc_enable()
774 ret = regmap_update_bits(data->regmap, data->var_data->clk_en, in sc27xx_adc_enable()
781 ret = sc27xx_adc_scale_calibration(data, true); in sc27xx_adc_enable()
785 ret = sc27xx_adc_scale_calibration(data, false); in sc27xx_adc_enable()
792 regmap_update_bits(data->regmap, data->var_data->clk_en, in sc27xx_adc_enable()
795 regmap_update_bits(data->regmap, data->var_data->module_en, in sc27xx_adc_enable()
803 struct sc27xx_adc_data *data = _data; in sc27xx_adc_disable() local
805 /* Disable ADC work clock and controller clock */ in sc27xx_adc_disable()
806 regmap_update_bits(data->regmap, data->var_data->clk_en, in sc27xx_adc_disable()
809 regmap_update_bits(data->regmap, data->var_data->module_en, in sc27xx_adc_disable()
863 struct device *dev = &pdev->dev; in sc27xx_adc_probe()
864 struct device_node *np = dev->of_node; in sc27xx_adc_probe()
872 dev_err(dev, "No matching driver data found\n"); in sc27xx_adc_probe()
873 return -EINVAL; in sc27xx_adc_probe()
878 return -ENOMEM; in sc27xx_adc_probe()
882 sc27xx_data->regmap = dev_get_regmap(dev->parent, NULL); in sc27xx_adc_probe()
883 if (!sc27xx_data->regmap) { in sc27xx_adc_probe()
885 return -ENODEV; in sc27xx_adc_probe()
888 ret = of_property_read_u32(np, "reg", &sc27xx_data->base); in sc27xx_adc_probe()
894 sc27xx_data->irq = platform_get_irq(pdev, 0); in sc27xx_adc_probe()
895 if (sc27xx_data->irq < 0) in sc27xx_adc_probe()
896 return sc27xx_data->irq; in sc27xx_adc_probe()
904 sc27xx_data->hwlock = devm_hwspin_lock_request_specific(dev, ret); in sc27xx_adc_probe()
905 if (!sc27xx_data->hwlock) { in sc27xx_adc_probe()
907 return -ENXIO; in sc27xx_adc_probe()
910 sc27xx_data->dev = dev; in sc27xx_adc_probe()
911 if (pdata->set_volref) { in sc27xx_adc_probe()
912 sc27xx_data->volref = devm_regulator_get(dev, "vref"); in sc27xx_adc_probe()
913 if (IS_ERR(sc27xx_data->volref)) { in sc27xx_adc_probe()
914 ret = PTR_ERR(sc27xx_data->volref); in sc27xx_adc_probe()
919 sc27xx_data->var_data = pdata; in sc27xx_adc_probe()
920 sc27xx_data->var_data->init_scale(sc27xx_data); in sc27xx_adc_probe()
934 indio_dev->name = dev_name(dev); in sc27xx_adc_probe()
935 indio_dev->modes = INDIO_DIRECT_MODE; in sc27xx_adc_probe()
936 indio_dev->info = &sc27xx_info; in sc27xx_adc_probe()
937 indio_dev->channels = sc27xx_channels; in sc27xx_adc_probe()
938 indio_dev->num_channels = ARRAY_SIZE(sc27xx_channels); in sc27xx_adc_probe()
940 mutex_init(&sc27xx_data->lock); in sc27xx_adc_probe()
950 { .compatible = "sprd,sc2731-adc", .data = &sc2731_data},
951 { .compatible = "sprd,sc2730-adc", .data = &sc2730_data},
952 { .compatible = "sprd,sc2721-adc", .data = &sc2721_data},
953 { .compatible = "sprd,sc2720-adc", .data = &sc2720_data},
961 .name = "sc27xx-adc",