44 	#define MESON_SAR_ADC_REG0_CONTINUOUS_EN		BIT(1)
49 	#define MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK(_chan)	\  argument
50 					(GENMASK(2, 0) << ((_chan) * 3))
53 	#define MESON_SAR_ADC_AVG_CNTL_AVG_MODE_SHIFT(_chan)	\  argument
54 					(16 + ((_chan) * 2))
55 	#define MESON_SAR_ADC_AVG_CNTL_AVG_MODE_MASK(_chan)	\  argument
56 					(GENMASK(17, 16) << ((_chan) * 2))
57 	#define MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_SHIFT(_chan)	\  argument
58 					(0 + ((_chan) * 2))
59 	#define MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_MASK(_chan)	\  argument
60 					(GENMASK(1, 0) << ((_chan) * 2))
95 	#define MESON_SAR_ADC_AUX_SW_MUX_SEL_CHAN_SHIFT(_chan)	\  argument
96 					(8 + (((_chan) - 2) * 3))
102 	#define MESON_SAR_ADC_AUX_SW_YM_DRIVE_SW		BIT(1)
120 	#define MESON_SAR_ADC_CHAN_10_SW_CHAN0_YM_DRIVE_SW	BIT(1)
139 	#define MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_YM_DRIVE_SW	BIT(1)
160 	#define MESON_SAR_ADC_REG11_EOC                         BIT(1)
183 #define MESON_SAR_ADC_CHAN(_chan) {					\  argument
185 	.indexed = 1,							\
186 	.channel = _chan,						\
187 	.address = _chan,						\
193 	.datasheet_name = "SAR_ADC_CH"#_chan,				\
196 #define MESON_SAR_ADC_TEMP_CHAN(_chan) {				\  argument
198 	.channel = _chan,						\
209 #define MESON_SAR_ADC_MUX(_chan, _sel) {				\  argument
211 	.channel = _chan,						\
212 	.indexed = 1,							\
224 	VREF_VDDA = 1,
292 	MESON_SAR_ADC_MUX(NUM_MUX_1_VDD_DIV4, 1),
309 	MESON_SAR_ADC_MUX(NUM_MUX_1_VDD_DIV4, 1),
404 	return clamp(tmp, 0, (1 << priv->param->resolution) - 1);  in meson_sar_adc_calib_val()
417 	udelay(1);  in meson_sar_adc_wait_busy_clear()
420 					       1, 10000);  in meson_sar_adc_wait_busy_clear()
451 	if (count != 1) {  in meson_sar_adc_read_raw_sample()
465 	fifo_val &= GENMASK(priv->param->resolution - 1, 0);  in meson_sar_adc_read_raw_sample()
498 	 * channel, which starts counting at index 0 (which means: count = 1).  in meson_sar_adc_enable_channel()
593 		udelay(1);  in meson_sar_adc_lock()
601 						      1, 10000);  in meson_sar_adc_lock()
744 	const char *clk_parents[1];  in meson_sar_adc_clk_init()
754 	init.num_parents = 1;  in meson_sar_adc_clk_init()
774 	init.num_parents = 1;  in meson_sar_adc_clk_init()
825 	trimming_mask = BIT(trimming_bits) - 1;  in meson_sar_adc_temp_sensor_init()
884 	/* delay between two samples = (10+1) * 1uS */  in meson_sar_adc_init()
894 	/* delay between two samples = (10+1) * 1uS */  in meson_sar_adc_init()
902 				      1));  in meson_sar_adc_init()
906 	 * (0 = SAR_ADC_CH0, 1 = SAR_ADC_CH1)  in meson_sar_adc_init()
912 	regval = FIELD_PREP(MESON_SAR_ADC_CHAN_10_SW_CHAN1_MUX_SEL_MASK, 1);  in meson_sar_adc_init()
970 			 * bit [4] (the 5th bit when starting to count at 1)  in meson_sar_adc_init()
1057 	regval = FIELD_PREP(MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, 1);  in meson_sar_adc_hw_enable()
1141 	nominal0 = (1 << priv->param->resolution) / 4;  in meson_sar_adc_calib()
1142 	nominal1 = (1 << priv->param->resolution) * 3 / 4;  in meson_sar_adc_calib()
1226 	.vref_volatge = 1,
1227 	.cmv_select = 1,
1236 	.disable_ring_counter = 1,
1238 	.vref_volatge = 1,
1239 	.cmv_select = 1,
1248 	.disable_ring_counter = 1,
1250 	.vref_volatge = 1,
1253 	.cmv_select = 1,
1262 	.disable_ring_counter = 1,
1264 	.adc_eoc = 1,