Lines Matching +full:adc +full:- +full:startup +full:- +full:time
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the ADC present in the Atmel AT91 evaluation boards.
37 #define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
38 #define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
52 #define AT91_ADC_STARTUP_9260 (0x1f << 16) /* Startup Up Time */
56 #define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
58 #define AT91_ADC_PENDBC (0x0f << 28) /* Pen Debounce time */
62 #define AT91_ADC_TSR_SHTIM (0xf << 24) /* Sample & Hold Time */
102 #define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */
112 #define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */
114 #define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */
136 (st->registers->channel_base + (ch * 4))
138 (readl_relaxed(st->reg_base + reg))
140 (writel_relaxed(val, st->reg_base + reg))
151 #define TOUCH_SCTIM_US 10 /* 10us for the Touchscreen Switches Closure Time */
160 * struct at91_adc_trigger - description of triggers
162 * @value: value to set in the ADC's trigger setup register
173 * struct at91_adc_reg_desc - Various informations relative to registers
179 * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
180 * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
199 /* Pen Detection input pull-up resistor, can be 0~3 */
202 /* startup time calculate function */
238 * Following ADC channels are shared by touchscreen:
240 * CH0 -- Touch screen XP/UL
241 * CH1 -- Touch screen XM/UR
242 * CH2 -- Touch screen YP/LL
243 * CH3 -- Touch screen YM/Sense
244 * CH4 -- Touch screen LR(5-wire only)
266 struct iio_dev *idev = pf->indio_dev; in at91_adc_trigger_handler()
271 for (i = 0; i < idev->masklength; i++) { in at91_adc_trigger_handler()
272 if (!test_bit(i, idev->active_scan_mask)) in at91_adc_trigger_handler()
274 chan = idev->channels + i; in at91_adc_trigger_handler()
275 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel)); in at91_adc_trigger_handler()
279 iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp); in at91_adc_trigger_handler()
281 iio_trigger_notify_done(idev->trig); in at91_adc_trigger_handler()
286 enable_irq(st->irq); in at91_adc_trigger_handler()
291 /* Handler for classic adc channel eoc trigger */
298 iio_trigger_poll(idev->trig); in handle_adc_eoc_trigger()
300 st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb)); in handle_adc_eoc_trigger()
303 st->done = true; in handle_adc_eoc_trigger()
304 wake_up_interruptible(&st->wq_data_avail); in handle_adc_eoc_trigger()
316 unsigned int xyz_mask_bits = st->res; in at91_ts_sample()
317 unsigned int xyz_mask = (1 << xyz_mask_bits) - 1; in at91_ts_sample()
320 /* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */ in at91_ts_sample()
323 x = (xpos << MAX_POS_BITS) - xpos; in at91_ts_sample()
326 dev_err(&idev->dev, "Error: xscale == 0!\n"); in at91_ts_sample()
327 return -1; in at91_ts_sample()
331 /* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */ in at91_ts_sample()
334 y = (ypos << MAX_POS_BITS) - ypos; in at91_ts_sample()
337 dev_err(&idev->dev, "Error: yscale == 0!\n"); in at91_ts_sample()
338 return -1; in at91_ts_sample()
348 pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor) in at91_ts_sample()
351 pres = st->ts_pressure_threshold; /* no pen contacted */ in at91_ts_sample()
353 …dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\… in at91_ts_sample()
356 if (pres < st->ts_pressure_threshold) { in at91_ts_sample()
357 dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n", in at91_ts_sample()
359 input_report_abs(st->ts_input, ABS_X, x); in at91_ts_sample()
360 input_report_abs(st->ts_input, ABS_Y, y); in at91_ts_sample()
361 input_report_abs(st->ts_input, ABS_PRESSURE, pres); in at91_ts_sample()
362 input_report_key(st->ts_input, BTN_TOUCH, 1); in at91_ts_sample()
363 input_sync(st->ts_input); in at91_ts_sample()
365 dev_dbg(&idev->dev, "pressure too low: not reporting\n"); in at91_ts_sample()
375 u32 status = at91_adc_readl(st, st->registers->status_register); in at91_adc_rl_interrupt()
379 if (status & GENMASK(st->num_channels - 1, 0)) in at91_adc_rl_interrupt()
392 at91_adc_writel(st, st->registers->trigger_register, in at91_adc_rl_interrupt()
394 AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val)); in at91_adc_rl_interrupt()
397 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC; in at91_adc_rl_interrupt()
399 at91_adc_writel(st, st->registers->trigger_register, in at91_adc_rl_interrupt()
405 st->ts_bufferedmeasure = false; in at91_adc_rl_interrupt()
406 input_report_key(st->ts_input, BTN_TOUCH, 0); in at91_adc_rl_interrupt()
407 input_sync(st->ts_input); in at91_adc_rl_interrupt()
408 } else if (status & AT91_ADC_EOC(3) && st->ts_input) { in at91_adc_rl_interrupt()
410 if (st->ts_bufferedmeasure) { in at91_adc_rl_interrupt()
416 input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx); in at91_adc_rl_interrupt()
417 input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy); in at91_adc_rl_interrupt()
418 input_report_key(st->ts_input, BTN_TOUCH, 1); in at91_adc_rl_interrupt()
419 input_sync(st->ts_input); in at91_adc_rl_interrupt()
421 st->ts_bufferedmeasure = true; in at91_adc_rl_interrupt()
424 st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3)) in at91_adc_rl_interrupt()
426 st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2)); in at91_adc_rl_interrupt()
428 st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1)) in at91_adc_rl_interrupt()
430 st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0)); in at91_adc_rl_interrupt()
440 u32 status = at91_adc_readl(st, st->registers->status_register); in at91_adc_9x5_interrupt()
446 if (status & GENMASK(st->num_channels - 1, 0)) in at91_adc_9x5_interrupt()
454 at91_adc_writel(st, st->registers->trigger_register, in at91_adc_9x5_interrupt()
456 AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val)); in at91_adc_9x5_interrupt()
458 at91_adc_writel(st, st->registers->trigger_register, 0); in at91_adc_9x5_interrupt()
463 input_report_key(st->ts_input, BTN_TOUCH, 0); in at91_adc_9x5_interrupt()
464 input_sync(st->ts_input); in at91_adc_9x5_interrupt()
491 /* If touchscreen is enable, then reserve the adc channels */ in at91_adc_channel_init()
492 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE) in at91_adc_channel_init()
494 else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE) in at91_adc_channel_init()
498 st->channels_mask &= ~rsvd_mask; in at91_adc_channel_init()
500 idev->num_channels = bitmap_weight(&st->channels_mask, in at91_adc_channel_init()
501 st->num_channels) + 1; in at91_adc_channel_init()
503 chan_array = devm_kzalloc(&idev->dev, in at91_adc_channel_init()
504 ((idev->num_channels + 1) * in at91_adc_channel_init()
509 return -ENOMEM; in at91_adc_channel_init()
511 for_each_set_bit(bit, &st->channels_mask, st->num_channels) { in at91_adc_channel_init()
514 chan->type = IIO_VOLTAGE; in at91_adc_channel_init()
515 chan->indexed = 1; in at91_adc_channel_init()
516 chan->channel = bit; in at91_adc_channel_init()
517 chan->scan_index = idx; in at91_adc_channel_init()
518 chan->scan_type.sign = 'u'; in at91_adc_channel_init()
519 chan->scan_type.realbits = st->res; in at91_adc_channel_init()
520 chan->scan_type.storagebits = 16; in at91_adc_channel_init()
521 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); in at91_adc_channel_init()
522 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); in at91_adc_channel_init()
527 timestamp->type = IIO_TIMESTAMP; in at91_adc_channel_init()
528 timestamp->channel = -1; in at91_adc_channel_init()
529 timestamp->scan_index = idx; in at91_adc_channel_init()
530 timestamp->scan_type.sign = 's'; in at91_adc_channel_init()
531 timestamp->scan_type.realbits = 64; in at91_adc_channel_init()
532 timestamp->scan_type.storagebits = 64; in at91_adc_channel_init()
534 idev->channels = chan_array; in at91_adc_channel_init()
535 return idev->num_channels; in at91_adc_channel_init()
545 for (i = 0; i < st->caps->trigger_number; i++) { in at91_adc_get_trigger_value_by_name()
547 "%s-dev%d-%s", in at91_adc_get_trigger_value_by_name()
548 idev->name, in at91_adc_get_trigger_value_by_name()
552 return -ENOMEM; in at91_adc_get_trigger_value_by_name()
557 return -EINVAL; in at91_adc_get_trigger_value_by_name()
564 return -EINVAL; in at91_adc_get_trigger_value_by_name()
571 const struct at91_adc_reg_desc *reg = st->registers; in at91_adc_configure_trigger()
572 u32 status = at91_adc_readl(st, reg->trigger_register); in at91_adc_configure_trigger()
577 st->caps->triggers, in at91_adc_configure_trigger()
578 idev->trig->name); in at91_adc_configure_trigger()
583 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL); in at91_adc_configure_trigger()
584 if (st->buffer == NULL) in at91_adc_configure_trigger()
585 return -ENOMEM; in at91_adc_configure_trigger()
587 at91_adc_writel(st, reg->trigger_register, in at91_adc_configure_trigger()
590 for_each_set_bit(bit, idev->active_scan_mask, in at91_adc_configure_trigger()
591 st->num_channels) { in at91_adc_configure_trigger()
592 struct iio_chan_spec const *chan = idev->channels + bit; in at91_adc_configure_trigger()
594 AT91_ADC_CH(chan->channel)); in at91_adc_configure_trigger()
597 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask); in at91_adc_configure_trigger()
600 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask); in at91_adc_configure_trigger()
602 at91_adc_writel(st, reg->trigger_register, in at91_adc_configure_trigger()
605 for_each_set_bit(bit, idev->active_scan_mask, in at91_adc_configure_trigger()
606 st->num_channels) { in at91_adc_configure_trigger()
607 struct iio_chan_spec const *chan = idev->channels + bit; in at91_adc_configure_trigger()
609 AT91_ADC_CH(chan->channel)); in at91_adc_configure_trigger()
611 kfree(st->buffer); in at91_adc_configure_trigger()
627 trig = iio_trigger_alloc(idev->dev.parent, "%s-dev%d-%s", idev->name, in at91_adc_allocate_trigger()
628 iio_device_id(idev), trigger->name); in at91_adc_allocate_trigger()
633 trig->ops = &at91_adc_trigger_ops; in at91_adc_allocate_trigger()
649 st->trig = devm_kcalloc(&idev->dev, in at91_adc_trigger_init()
650 st->caps->trigger_number, sizeof(*st->trig), in at91_adc_trigger_init()
653 if (st->trig == NULL) { in at91_adc_trigger_init()
654 ret = -ENOMEM; in at91_adc_trigger_init()
658 for (i = 0; i < st->caps->trigger_number; i++) { in at91_adc_trigger_init()
659 if (st->caps->triggers[i].is_external && !(st->use_external)) in at91_adc_trigger_init()
662 st->trig[i] = at91_adc_allocate_trigger(idev, in at91_adc_trigger_init()
663 st->caps->triggers + i); in at91_adc_trigger_init()
664 if (st->trig[i] == NULL) { in at91_adc_trigger_init()
665 dev_err(&idev->dev, in at91_adc_trigger_init()
667 ret = -ENOMEM; in at91_adc_trigger_init()
675 for (i--; i >= 0; i--) { in at91_adc_trigger_init()
676 iio_trigger_unregister(st->trig[i]); in at91_adc_trigger_init()
677 iio_trigger_free(st->trig[i]); in at91_adc_trigger_init()
688 for (i = 0; i < st->caps->trigger_number; i++) { in at91_adc_trigger_remove()
689 iio_trigger_unregister(st->trig[i]); in at91_adc_trigger_remove()
690 iio_trigger_free(st->trig[i]); in at91_adc_trigger_remove()
714 mutex_lock(&st->lock); in at91_adc_read_raw()
716 st->chnb = chan->channel; in at91_adc_read_raw()
718 AT91_ADC_CH(chan->channel)); in at91_adc_read_raw()
719 at91_adc_writel(st, AT91_ADC_IER, BIT(chan->channel)); in at91_adc_read_raw()
722 ret = wait_event_interruptible_timeout(st->wq_data_avail, in at91_adc_read_raw()
723 st->done, in at91_adc_read_raw()
726 /* Disable interrupts, regardless if adc conversion was in at91_adc_read_raw()
730 AT91_ADC_CH(chan->channel)); in at91_adc_read_raw()
731 at91_adc_writel(st, AT91_ADC_IDR, BIT(chan->channel)); in at91_adc_read_raw()
735 *val = st->last_value; in at91_adc_read_raw()
736 st->last_value = 0; in at91_adc_read_raw()
737 st->done = false; in at91_adc_read_raw()
741 dev_err(&idev->dev, "ADC Channel %d timeout.\n", in at91_adc_read_raw()
742 chan->channel); in at91_adc_read_raw()
743 ret = -ETIMEDOUT; in at91_adc_read_raw()
746 mutex_unlock(&st->lock); in at91_adc_read_raw()
750 *val = st->vref_mv; in at91_adc_read_raw()
751 *val2 = chan->scan_type.realbits; in at91_adc_read_raw()
756 return -EINVAL; in at91_adc_read_raw()
763 * Number of ticks needed to cover the startup time of the ADC in calc_startup_ticks_9260()
766 * Startup Time = (ticks + 1) * 8 / ADC Clock in calc_startup_ticks_9260()
768 return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8; in calc_startup_ticks_9260()
775 * Startup Time = <lookup_table_value> / ADC Clock in calc_startup_ticks_9x5()
794 ticks = size - 1; in calc_startup_ticks_9x5()
805 ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop); in at91_adc_probe_dt_ts()
807 dev_info(dev, "ADC Touch screen is disabled.\n"); in at91_adc_probe_dt_ts()
814 st->touchscreen_type = prop; in at91_adc_probe_dt_ts()
818 return -EINVAL; in at91_adc_probe_dt_ts()
821 if (!st->caps->has_tsmr) in at91_adc_probe_dt_ts()
824 of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop); in at91_adc_probe_dt_ts()
825 st->ts_pressure_threshold = prop; in at91_adc_probe_dt_ts()
826 if (st->ts_pressure_threshold) { in at91_adc_probe_dt_ts()
830 return -EINVAL; in at91_adc_probe_dt_ts()
843 if (st->caps->has_tsmr) in atmel_ts_open()
854 if (st->caps->has_tsmr) in atmel_ts_close()
867 /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid in at91_ts_hw_init()
869 * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock in at91_ts_hw_init()
871 st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / in at91_ts_hw_init()
874 while (st->ts_pendbc >> ++i) in at91_ts_hw_init()
876 if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1)))) in at91_ts_hw_init()
877 st->ts_pendbc = i; in at91_ts_hw_init()
879 st->ts_pendbc = i - 1; in at91_ts_hw_init()
881 if (!st->caps->has_tsmr) { in at91_ts_hw_init()
885 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC; in at91_ts_hw_init()
891 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL * in at91_ts_hw_init()
892 adc_clk_khz / 1000) - 1, 1); in at91_ts_hw_init()
897 /* Touchscreen Switches Closure time needed for allowing the value to in at91_ts_hw_init()
899 * Switch Closure Time = (TSSCTIM * 4) ADCClock periods in at91_ts_hw_init()
902 dev_dbg(&idev->dev, "adc_clk at: %d KHz, tssctim at: %d\n", in at91_ts_hw_init()
905 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE) in at91_ts_hw_init()
911 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average) in at91_ts_hw_init()
913 reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC; in at91_ts_hw_init()
920 /* Change adc internal resistor value for better pen detection, in at91_ts_hw_init()
925 at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity in at91_ts_hw_init()
928 /* Sample Period Time = (TRGPER + 1) / ADCClock */ in at91_ts_hw_init()
929 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US * in at91_ts_hw_init()
930 adc_clk_khz / 1000) - 1, 1); in at91_ts_hw_init()
944 dev_err(&idev->dev, "Failed to allocate TS device!\n"); in at91_ts_register()
945 return -ENOMEM; in at91_ts_register()
948 input->name = DRIVER_NAME; in at91_ts_register()
949 input->id.bustype = BUS_HOST; in at91_ts_register()
950 input->dev.parent = &pdev->dev; in at91_ts_register()
951 input->open = atmel_ts_open; in at91_ts_register()
952 input->close = atmel_ts_close; in at91_ts_register()
954 __set_bit(EV_ABS, input->evbit); in at91_ts_register()
955 __set_bit(EV_KEY, input->evbit); in at91_ts_register()
956 __set_bit(BTN_TOUCH, input->keybit); in at91_ts_register()
957 if (st->caps->has_tsmr) { in at91_ts_register()
958 input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, in at91_ts_register()
960 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, in at91_ts_register()
964 if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) { in at91_ts_register()
965 dev_err(&pdev->dev, in at91_ts_register()
967 ret = -EINVAL; in at91_ts_register()
971 input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1, in at91_ts_register()
973 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1, in at91_ts_register()
977 st->ts_input = input; in at91_ts_register()
987 input_free_device(st->ts_input); in at91_ts_register()
993 input_unregister_device(st->ts_input); in at91_ts_unregister()
999 struct device_node *node = pdev->dev.of_node; in at91_adc_probe()
1006 idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state)); in at91_adc_probe()
1008 return -ENOMEM; in at91_adc_probe()
1012 st->caps = of_device_get_match_data(&pdev->dev); in at91_adc_probe()
1014 st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers"); in at91_adc_probe()
1016 if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) { in at91_adc_probe()
1017 dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n"); in at91_adc_probe()
1018 return -EINVAL; in at91_adc_probe()
1020 st->channels_mask = prop; in at91_adc_probe()
1022 st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode"); in at91_adc_probe()
1024 if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) { in at91_adc_probe()
1025 dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n"); in at91_adc_probe()
1026 return -EINVAL; in at91_adc_probe()
1028 st->startup_time = prop; in at91_adc_probe()
1031 of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop); in at91_adc_probe()
1032 st->sample_hold_time = prop; in at91_adc_probe()
1034 if (of_property_read_u32(node, "atmel,adc-vref", &prop)) { in at91_adc_probe()
1035 dev_err(&idev->dev, "Missing adc-vref property in the DT.\n"); in at91_adc_probe()
1036 return -EINVAL; in at91_adc_probe()
1038 st->vref_mv = prop; in at91_adc_probe()
1040 st->res = st->caps->high_res_bits; in at91_adc_probe()
1041 if (st->caps->low_res_bits && in at91_adc_probe()
1042 !of_property_read_string(node, "atmel,adc-use-res", (const char **)&s) in at91_adc_probe()
1044 st->res = st->caps->low_res_bits; in at91_adc_probe()
1046 dev_info(&idev->dev, "Resolution used: %u bits\n", st->res); in at91_adc_probe()
1048 st->registers = &st->caps->registers; in at91_adc_probe()
1049 st->num_channels = st->caps->num_channels; in at91_adc_probe()
1052 if (st->caps->has_ts) { in at91_adc_probe()
1053 ret = at91_adc_probe_dt_ts(node, st, &idev->dev); in at91_adc_probe()
1060 idev->name = dev_name(&pdev->dev); in at91_adc_probe()
1061 idev->modes = INDIO_DIRECT_MODE; in at91_adc_probe()
1062 idev->info = &at91_adc_info; in at91_adc_probe()
1064 st->irq = platform_get_irq(pdev, 0); in at91_adc_probe()
1065 if (st->irq < 0) in at91_adc_probe()
1066 return -ENODEV; in at91_adc_probe()
1068 st->reg_base = devm_platform_ioremap_resource(pdev, 0); in at91_adc_probe()
1069 if (IS_ERR(st->reg_base)) in at91_adc_probe()
1070 return PTR_ERR(st->reg_base); in at91_adc_probe()
1079 if (st->caps->has_tsmr) in at91_adc_probe()
1080 ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0, in at91_adc_probe()
1081 pdev->dev.driver->name, idev); in at91_adc_probe()
1083 ret = request_irq(st->irq, at91_adc_rl_interrupt, 0, in at91_adc_probe()
1084 pdev->dev.driver->name, idev); in at91_adc_probe()
1086 dev_err(&pdev->dev, "Failed to allocate IRQ.\n"); in at91_adc_probe()
1090 st->clk = devm_clk_get(&pdev->dev, "adc_clk"); in at91_adc_probe()
1091 if (IS_ERR(st->clk)) { in at91_adc_probe()
1092 dev_err(&pdev->dev, "Failed to get the clock.\n"); in at91_adc_probe()
1093 ret = PTR_ERR(st->clk); in at91_adc_probe()
1097 ret = clk_prepare_enable(st->clk); in at91_adc_probe()
1099 dev_err(&pdev->dev, in at91_adc_probe()
1104 st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk"); in at91_adc_probe()
1105 if (IS_ERR(st->adc_clk)) { in at91_adc_probe()
1106 dev_err(&pdev->dev, "Failed to get the ADC clock.\n"); in at91_adc_probe()
1107 ret = PTR_ERR(st->adc_clk); in at91_adc_probe()
1111 ret = clk_prepare_enable(st->adc_clk); in at91_adc_probe()
1113 dev_err(&pdev->dev, in at91_adc_probe()
1114 "Could not prepare or enable the ADC clock.\n"); in at91_adc_probe()
1120 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being in at91_adc_probe()
1123 mstrclk = clk_get_rate(st->clk); in at91_adc_probe()
1124 adc_clk = clk_get_rate(st->adc_clk); in at91_adc_probe()
1127 dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n", in at91_adc_probe()
1130 prsc = (mstrclk / (2 * adc_clk)) - 1; in at91_adc_probe()
1132 if (!st->startup_time) { in at91_adc_probe()
1133 dev_err(&pdev->dev, "No startup time available.\n"); in at91_adc_probe()
1134 ret = -EINVAL; in at91_adc_probe()
1137 ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz); in at91_adc_probe()
1140 * a minimal Sample and Hold Time is necessary for the ADC to guarantee in at91_adc_probe()
1142 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock in at91_adc_probe()
1144 if (st->sample_hold_time > 0) in at91_adc_probe()
1145 shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000) in at91_adc_probe()
1146 - 1, 1); in at91_adc_probe()
1150 reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask; in at91_adc_probe()
1151 reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask; in at91_adc_probe()
1152 if (st->res == st->caps->low_res_bits) in at91_adc_probe()
1154 if (st->sleep_mode) in at91_adc_probe()
1159 /* Setup the ADC channels available on the board */ in at91_adc_probe()
1162 dev_err(&pdev->dev, "Couldn't initialize the channels.\n"); in at91_adc_probe()
1166 init_waitqueue_head(&st->wq_data_avail); in at91_adc_probe()
1167 mutex_init(&st->lock); in at91_adc_probe()
1172 * trigger for classic adc. in at91_adc_probe()
1174 if (!st->touchscreen_type) { in at91_adc_probe()
1177 dev_err(&pdev->dev, "Couldn't initialize the buffer.\n"); in at91_adc_probe()
1183 dev_err(&pdev->dev, "Couldn't setup the triggers.\n"); in at91_adc_probe()
1197 dev_err(&pdev->dev, "Couldn't register the device.\n"); in at91_adc_probe()
1204 if (!st->touchscreen_type) { in at91_adc_probe()
1211 clk_disable_unprepare(st->adc_clk); in at91_adc_probe()
1213 clk_disable_unprepare(st->clk); in at91_adc_probe()
1215 free_irq(st->irq, idev); in at91_adc_probe()
1225 if (!st->touchscreen_type) { in at91_adc_remove()
1231 clk_disable_unprepare(st->adc_clk); in at91_adc_remove()
1232 clk_disable_unprepare(st->clk); in at91_adc_remove()
1233 free_irq(st->irq, idev); in at91_adc_remove()
1244 clk_disable_unprepare(st->clk); in at91_adc_suspend()
1254 clk_prepare_enable(st->clk); in at91_adc_resume()
1264 { .name = "timer-counter-0", .value = 0x1 },
1265 { .name = "timer-counter-1", .value = 0x3 },
1266 { .name = "timer-counter-2", .value = 0x5 },
1288 { .name = "external-rising", .value = 0x1, .is_external = true },
1289 { .name = "external-falling", .value = 0x2, .is_external = true },
1290 { .name = "external-any", .value = 0x3, .is_external = true },
1374 { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1375 { .compatible = "atmel,at91sam9rl-adc", .data = &at91sam9rl_caps },
1376 { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1377 { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1378 { .compatible = "atmel,sama5d3-adc", .data = &sama5d3_caps },
1396 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
1397 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");