iio/adc/at91_adc.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Driver for the ADC present in the Atmel AT91 evaluation boards.
37 #define		AT91_ADC_TSAMOD		(3 << 0)	/* ADC mode */
38 #define		AT91_ADC_TSAMOD_ADC_ONLY_MODE		(0 << 0)	/* ADC Mode */
102 #define		AT91_ADC_ACR_PENDETSENS	(0x3 << 0)	/* pull-up resistor */
136 	(st->registers->channel_base + (ch * 4))
138 	(readl_relaxed(st->reg_base + reg))
140 	(writel_relaxed(val, st->reg_base + reg))
160  * struct at91_adc_trigger - description of triggers
162  * @value:		value to set in the ADC's trigger setup register
173  * struct at91_adc_reg_desc - Various informations relative to registers
179  * @mr_prescal_mask:	Mask of the PRESCAL field in the adc MR register
180  * @mr_startup_mask:	Mask of the STARTUP field in the adc MR register
199 	/* Pen Detection input pull-up resistor, can be 0~3 */
238 	 * Following ADC channels are shared by touchscreen:
240 	 * CH0 -- Touch screen XP/UL
241 	 * CH1 -- Touch screen XM/UR
242 	 * CH2 -- Touch screen YP/LL
243 	 * CH3 -- Touch screen YM/Sense
244 	 * CH4 -- Touch screen LR(5-wire only)
246 	 * The bitfields below represents the reserved channel in the
266 	struct iio_dev *idev = pf->indio_dev;
271 	for (i = 0; i < idev->masklength; i++) {
272 		if (!test_bit(i, idev->active_scan_mask))
274 		chan = idev->channels + i;
275 		st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel));
279 	iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);
281 	iio_trigger_notify_done(idev->trig);
286 	enable_irq(st->irq);
291 /* Handler for classic adc channel eoc trigger */
298 		iio_trigger_poll(idev->trig);
300 		st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));
303 		st->done = true;
304 		wake_up_interruptible(&st->wq_data_avail);
316 	unsigned int xyz_mask_bits = st->res;
317 	unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;
320 	/* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */
323 	x = (xpos << MAX_POS_BITS) - xpos;
326 		dev_err(&idev->dev, "Error: xscale == 0!\n");
327 		return -1;
331 	/* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */
334 	y = (ypos << MAX_POS_BITS) - ypos;
337 		dev_err(&idev->dev, "Error: yscale == 0!\n");
338 		return -1;
348 		pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor)
351 		pres = st->ts_pressure_threshold;	/* no pen contacted */
353 	dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\n",
356 	if (pres < st->ts_pressure_threshold) {
357 		dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n",
359 		input_report_abs(st->ts_input, ABS_X, x);
360 		input_report_abs(st->ts_input, ABS_Y, y);
361 		input_report_abs(st->ts_input, ABS_PRESSURE, pres);
362 		input_report_key(st->ts_input, BTN_TOUCH, 1);
363 		input_sync(st->ts_input);
365 		dev_dbg(&idev->dev, "pressure too low: not reporting\n");
375 	u32 status = at91_adc_readl(st, st->registers->status_register);
379 	if (status & GENMASK(st->num_channels - 1, 0))
392 		at91_adc_writel(st, st->registers->trigger_register,
394 			AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
397 		reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
399 		at91_adc_writel(st, st->registers->trigger_register,
405 		st->ts_bufferedmeasure = false;
406 		input_report_key(st->ts_input, BTN_TOUCH, 0);
407 		input_sync(st->ts_input);
408 	} else if (status & AT91_ADC_EOC(3) && st->ts_input) {
410 		if (st->ts_bufferedmeasure) {
416 			input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);
417 			input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);
418 			input_report_key(st->ts_input, BTN_TOUCH, 1);
419 			input_sync(st->ts_input);
421 			st->ts_bufferedmeasure = true;
424 		st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
426 		st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
428 		st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
430 		st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
440 	u32 status = at91_adc_readl(st, st->registers->status_register);
446 	if (status & GENMASK(st->num_channels - 1, 0))
454 		at91_adc_writel(st, st->registers->trigger_register,
456 			AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
458 		at91_adc_writel(st, st->registers->trigger_register, 0);
463 		input_report_key(st->ts_input, BTN_TOUCH, 0);
464 		input_sync(st->ts_input);
491 	/* If touchscreen is enable, then reserve the adc channels */
492 	if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
494 	else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)
497 	/* set up the channel mask to reserve touchscreen channels */
498 	st->channels_mask &= ~rsvd_mask;
500 	idev->num_channels = bitmap_weight(&st->channels_mask,
501 					   st->num_channels) + 1;
503 	chan_array = devm_kzalloc(&idev->dev,
504 				  ((idev->num_channels + 1) *
509 		return -ENOMEM;
511 	for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
514 		chan->type = IIO_VOLTAGE;
515 		chan->indexed = 1;
516 		chan->channel = bit;
517 		chan->scan_index = idx;
518 		chan->scan_type.sign = 'u';
519 		chan->scan_type.realbits = st->res;
520 		chan->scan_type.storagebits = 16;
521 		chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
522 		chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
527 	timestamp->type = IIO_TIMESTAMP;
528 	timestamp->channel = -1;
529 	timestamp->scan_index = idx;
530 	timestamp->scan_type.sign = 's';
531 	timestamp->scan_type.realbits = 64;
532 	timestamp->scan_type.storagebits = 64;
534 	idev->channels = chan_array;
535 	return idev->num_channels;
545 	for (i = 0; i < st->caps->trigger_number; i++) {
547 				"%s-dev%d-%s",
548 				idev->name,
552 			return -ENOMEM;
557 				return -EINVAL;
564 	return -EINVAL;
571 	const struct at91_adc_reg_desc *reg = st->registers;
572 	u32 status = at91_adc_readl(st, reg->trigger_register);
577 						   st->caps->triggers,
578 						   idev->trig->name);
583 		st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
584 		if (st->buffer == NULL)
585 			return -ENOMEM;
587 		at91_adc_writel(st, reg->trigger_register,
590 		for_each_set_bit(bit, idev->active_scan_mask,
591 				 st->num_channels) {
592 			struct iio_chan_spec const *chan = idev->channels + bit;
594 					AT91_ADC_CH(chan->channel));
597 		at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
600 		at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
602 		at91_adc_writel(st, reg->trigger_register,
605 		for_each_set_bit(bit, idev->active_scan_mask,
606 				 st->num_channels) {
607 			struct iio_chan_spec const *chan = idev->channels + bit;
609 					AT91_ADC_CH(chan->channel));
611 		kfree(st->buffer);
627 	trig = iio_trigger_alloc(idev->dev.parent, "%s-dev%d-%s", idev->name,
628 				 iio_device_id(idev), trigger->name);
633 	trig->ops = &at91_adc_trigger_ops;
649 	st->trig = devm_kcalloc(&idev->dev,
650 				st->caps->trigger_number, sizeof(*st->trig),
653 	if (st->trig == NULL) {
654 		ret = -ENOMEM;
658 	for (i = 0; i < st->caps->trigger_number; i++) {
659 		if (st->caps->triggers[i].is_external && !(st->use_external))
662 		st->trig[i] = at91_adc_allocate_trigger(idev,
663 							st->caps->triggers + i);
664 		if (st->trig[i] == NULL) {
665 			dev_err(&idev->dev,
667 			ret = -ENOMEM;
675 	for (i--; i >= 0; i--) {
676 		iio_trigger_unregister(st->trig[i]);
677 		iio_trigger_free(st->trig[i]);
688 	for (i = 0; i < st->caps->trigger_number; i++) {
689 		iio_trigger_unregister(st->trig[i]);
690 		iio_trigger_free(st->trig[i]);
714 		mutex_lock(&st->lock);
716 		st->chnb = chan->channel;
718 				AT91_ADC_CH(chan->channel));
719 		at91_adc_writel(st, AT91_ADC_IER, BIT(chan->channel));
722 		ret = wait_event_interruptible_timeout(st->wq_data_avail,
723 						       st->done,
726 		/* Disable interrupts, regardless if adc conversion was
730 				AT91_ADC_CH(chan->channel));
731 		at91_adc_writel(st, AT91_ADC_IDR, BIT(chan->channel));
735 			*val = st->last_value;
736 			st->last_value = 0;
737 			st->done = false;
741 			dev_err(&idev->dev, "ADC Channel %d timeout.\n",
742 				chan->channel);
743 			ret = -ETIMEDOUT;
746 		mutex_unlock(&st->lock);
750 		*val = st->vref_mv;
751 		*val2 = chan->scan_type.realbits;
756 	return -EINVAL;
763 	 * Number of ticks needed to cover the startup time of the ADC
766 	 *   Startup Time = (ticks + 1) * 8 / ADC Clock
768 	return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;
775 	 * Startup Time = <lookup_table_value> / ADC Clock
794 		ticks = size - 1;
805 	ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop);
807 		dev_info(dev, "ADC Touch screen is disabled.\n");
814 		st->touchscreen_type = prop;
818 		return -EINVAL;
821 	if (!st->caps->has_tsmr)
824 	of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
825 	st->ts_pressure_threshold = prop;
826 	if (st->ts_pressure_threshold) {
830 		return -EINVAL;
843 	if (st->caps->has_tsmr)
854 	if (st->caps->has_tsmr)
867 	/* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
871 	st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /
874 	while (st->ts_pendbc >> ++i)
876 	if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))
877 		st->ts_pendbc = i;
879 		st->ts_pendbc = i - 1;
881 	if (!st->caps->has_tsmr) {
885 		reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
891 		st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *
892 						    adc_clk_khz / 1000) - 1, 1);
902 	dev_dbg(&idev->dev, "adc_clk at: %d KHz, tssctim at: %d\n",
905 	if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
911 	reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
913 	reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
920 	/* Change adc internal resistor value for better pen detection,
925 	at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
929 	st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
930 			adc_clk_khz / 1000) - 1, 1);
944 		dev_err(&idev->dev, "Failed to allocate TS device!\n");
945 		return -ENOMEM;
948 	input->name = DRIVER_NAME;
949 	input->id.bustype = BUS_HOST;
950 	input->dev.parent = &pdev->dev;
951 	input->open = atmel_ts_open;
952 	input->close = atmel_ts_close;
954 	__set_bit(EV_ABS, input->evbit);
955 	__set_bit(EV_KEY, input->evbit);
956 	__set_bit(BTN_TOUCH, input->keybit);
957 	if (st->caps->has_tsmr) {
958 		input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,
960 		input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,
964 		if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {
965 			dev_err(&pdev->dev,
967 			ret = -EINVAL;
971 		input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,
973 		input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,
977 	st->ts_input = input;
993 	input_unregister_device(st->ts_input);
999 	struct device_node *node = pdev->dev.of_node;
1006 	idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));
1008 		return -ENOMEM;
1012 	st->caps = of_device_get_match_data(&pdev->dev);
1014 	st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
1016 	if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
1017 		dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
1018 		return -EINVAL;
1020 	st->channels_mask = prop;
1022 	st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
1024 	if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
1025 		dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
1026 		return -EINVAL;
1028 	st->startup_time = prop;
1031 	of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
1032 	st->sample_hold_time = prop;
1034 	if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
1035 		dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
1036 		return -EINVAL;
1038 	st->vref_mv = prop;
1040 	st->res = st->caps->high_res_bits;
1041 	if (st->caps->low_res_bits &&
1042 	    !of_property_read_string(node, "atmel,adc-use-res", (const char **)&s)
1044 		st->res = st->caps->low_res_bits;
1046 	dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
1048 	st->registers = &st->caps->registers;
1049 	st->num_channels = st->caps->num_channels;
1052 	if (st->caps->has_ts) {
1053 		ret = at91_adc_probe_dt_ts(node, st, &idev->dev);
1060 	idev->name = dev_name(&pdev->dev);
1061 	idev->modes = INDIO_DIRECT_MODE;
1062 	idev->info = &at91_adc_info;
1064 	st->irq = platform_get_irq(pdev, 0);
1065 	if (st->irq < 0)
1066 		return -ENODEV;
1068 	st->reg_base = devm_platform_ioremap_resource(pdev, 0);
1069 	if (IS_ERR(st->reg_base))
1070 		return PTR_ERR(st->reg_base);
1079 	if (st->caps->has_tsmr)
1080 		ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0,
1081 				  pdev->dev.driver->name, idev);
1083 		ret = request_irq(st->irq, at91_adc_rl_interrupt, 0,
1084 				  pdev->dev.driver->name, idev);
1086 		dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
1090 	st->clk = devm_clk_get(&pdev->dev, "adc_clk");
1091 	if (IS_ERR(st->clk)) {
1092 		dev_err(&pdev->dev, "Failed to get the clock.\n");
1093 		ret = PTR_ERR(st->clk);
1097 	ret = clk_prepare_enable(st->clk);
1099 		dev_err(&pdev->dev,
1104 	st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
1105 	if (IS_ERR(st->adc_clk)) {
1106 		dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
1107 		ret = PTR_ERR(st->adc_clk);
1111 	ret = clk_prepare_enable(st->adc_clk);
1113 		dev_err(&pdev->dev,
1114 			"Could not prepare or enable the ADC clock.\n");
1120 	 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
1123 	mstrclk = clk_get_rate(st->clk);
1124 	adc_clk = clk_get_rate(st->adc_clk);
1127 	dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n",
1130 	prsc = (mstrclk / (2 * adc_clk)) - 1;
1132 	if (!st->startup_time) {
1133 		dev_err(&pdev->dev, "No startup time available.\n");
1134 		ret = -EINVAL;
1137 	ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);
1140 	 * a minimal Sample and Hold Time is necessary for the ADC to guarantee
1141 	 * the best converted final value between two channels selection
1144 	if (st->sample_hold_time > 0)
1145 		shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)
1146 				 - 1, 1);
1150 	reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
1151 	reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
1152 	if (st->res == st->caps->low_res_bits)
1154 	if (st->sleep_mode)
1159 	/* Setup the ADC channels available on the board */
1162 		dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
1166 	init_waitqueue_head(&st->wq_data_avail);
1167 	mutex_init(&st->lock);
1172 	 * trigger for classic adc.
1174 	if (!st->touchscreen_type) {
1177 			dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
1183 			dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
1197 		dev_err(&pdev->dev, "Couldn't register the device.\n");
1204 	if (!st->touchscreen_type) {
1211 	clk_disable_unprepare(st->adc_clk);
1213 	clk_disable_unprepare(st->clk);
1215 	free_irq(st->irq, idev);
1225 	if (!st->touchscreen_type) {
1231 	clk_disable_unprepare(st->adc_clk);
1232 	clk_disable_unprepare(st->clk);
1233 	free_irq(st->irq, idev);
1244 	clk_disable_unprepare(st->clk);
1254 	clk_prepare_enable(st->clk);
1264 	{ .name = "timer-counter-0", .value = 0x1 },
1265 	{ .name = "timer-counter-1", .value = 0x3 },
1266 	{ .name = "timer-counter-2", .value = 0x5 },
1288 	{ .name = "external-rising", .value = 0x1, .is_external = true },
1289 	{ .name = "external-falling", .value = 0x2, .is_external = true },
1290 	{ .name = "external-any", .value = 0x3, .is_external = true },
1374 	{ .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1375 	{ .compatible = "atmel,at91sam9rl-adc", .data = &at91sam9rl_caps },
1376 	{ .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1377 	{ .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1378 	{ .compatible = "atmel,sama5d3-adc", .data = &sama5d3_caps },
1396 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
1397 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");