Lines Matching +full:ad7124 +full:- +full:8
1 // SPDX-License-Identifier: GPL-2.0+
3 * AD7124 SPI ADC driver
26 /* AD7124 registers */
49 #define AD7124_ADC_CTRL_REF_EN_MSK BIT(8)
56 /* AD7124 ID */
95 #define AD7124_MAX_CONFIGS 8
116 static const unsigned int ad7124_gain[8] = {
117 1, 2, 4, 8, 16, 32, 64, 128
203 .name = "ad7124-4",
205 .num_inputs = 8,
208 .name = "ad7124-8",
224 diff_new = abs(val - array[i]); in ad7124_find_closest_match()
243 ret = ad_sd_read_reg(&st->sd, addr, bytes, &readval); in ad7124_spi_write_mask()
250 return ad_sd_write_reg(&st->sd, addr, bytes, readval); in ad7124_spi_write_mask()
258 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_set_mode()
259 st->adc_control |= AD7124_ADC_CTRL_MODE(mode); in ad7124_set_mode()
261 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_set_mode()
268 fclk = clk_get_rate(st->mclk); in ad7124_set_channel_odr()
282 if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits) in ad7124_set_channel_odr()
283 st->channels[channel].cfg.live = false; in ad7124_set_channel_odr()
286 st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32); in ad7124_set_channel_odr()
287 st->channels[channel].cfg.odr_sel_bits = odr_sel_bits; in ad7124_set_channel_odr()
295 fadc = st->channels[channel].cfg.odr; in ad7124_get_3db_filter_freq()
297 switch (st->channels[channel].cfg.filter_type) { in ad7124_get_3db_filter_freq()
303 return -EINVAL; in ad7124_get_3db_filter_freq()
326 if (new_odr != st->channels[channel].cfg.odr) in ad7124_set_3db_filter_freq()
327 st->channels[channel].cfg.live = false; in ad7124_set_3db_filter_freq()
329 st->channels[channel].cfg.filter_type = new_filter; in ad7124_set_3db_filter_freq()
330 st->channels[channel].cfg.odr = new_odr; in ad7124_set_3db_filter_freq()
341 for (i = 0; i < st->num_channels; i++) { in ad7124_find_similar_live_cfg()
342 cfg_aux = &st->channels[i].cfg; in ad7124_find_similar_live_cfg()
344 if (cfg_aux->live && in ad7124_find_similar_live_cfg()
345 !memcmp(&cfg->config_props, &cfg_aux->config_props, cmp_size)) in ad7124_find_similar_live_cfg()
356 free_cfg_slot = find_first_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS); in ad7124_find_free_config_slot()
358 return -1; in ad7124_find_free_config_slot()
365 unsigned int refsel = cfg->refsel; in ad7124_init_config_vref()
371 if (IS_ERR(st->vref[refsel])) { in ad7124_init_config_vref()
372 dev_err(&st->sd.spi->dev, in ad7124_init_config_vref()
375 return PTR_ERR(st->vref[refsel]); in ad7124_init_config_vref()
377 cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); in ad7124_init_config_vref()
379 cfg->vref_mv /= 1000; in ad7124_init_config_vref()
382 cfg->vref_mv = 2500; in ad7124_init_config_vref()
383 st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; in ad7124_init_config_vref()
384 st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); in ad7124_init_config_vref()
385 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, in ad7124_init_config_vref()
386 2, st->adc_control); in ad7124_init_config_vref()
388 dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); in ad7124_init_config_vref()
389 return -EINVAL; in ad7124_init_config_vref()
400 cfg->cfg_slot = cfg_slot; in ad7124_write_config()
402 tmp = (cfg->buf_positive << 1) + cfg->buf_negative; in ad7124_write_config()
403 val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) | in ad7124_write_config()
405 ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val); in ad7124_write_config()
409 tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type); in ad7124_write_config()
410 ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_TYPE_MSK, in ad7124_write_config()
415 ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_FS_MSK, in ad7124_write_config()
416 AD7124_FILTER_FS(cfg->odr_sel_bits), 3); in ad7124_write_config()
420 return ad7124_spi_write_mask(st, AD7124_CONFIG(cfg->cfg_slot), AD7124_CONFIG_PGA_MSK, in ad7124_write_config()
421 AD7124_CONFIG_PGA(cfg->pga_bits), 2); in ad7124_write_config()
435 ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg); in ad7124_pop_config()
439 lru_cfg->live = false; in ad7124_pop_config()
442 assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0); in ad7124_pop_config()
445 for (i = 0; i < st->num_channels; i++) { in ad7124_pop_config()
446 cfg = &st->channels[i].cfg; in ad7124_pop_config()
448 if (cfg->cfg_slot == lru_cfg->cfg_slot) in ad7124_pop_config()
449 cfg->live = false; in ad7124_pop_config()
463 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
468 return -EINVAL; in ad7124_push_config()
471 free_cfg_slot = lru_cfg->cfg_slot; in ad7124_push_config()
472 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
476 assign_bit(free_cfg_slot, &st->cfg_slots_status, 1); in ad7124_push_config()
483 ch->cfg.live = true; in ad7124_enable_channel()
484 return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain | in ad7124_enable_channel()
485 AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1)); in ad7124_enable_channel()
490 struct ad7124_channel_config *cfg = &st->channels[address].cfg; in ad7124_prepare_read()
497 if (!cfg->live) { in ad7124_prepare_read()
503 cfg->cfg_slot = live_cfg->cfg_slot; in ad7124_prepare_read()
507 return ad7124_enable_channel(st, &st->channels[address]); in ad7124_prepare_read()
522 mutex_lock(&st->cfgs_lock); in ad7124_set_channel()
524 mutex_unlock(&st->cfgs_lock); in ad7124_set_channel()
532 unsigned int adc_control = st->adc_control; in ad7124_append_status()
538 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, adc_control); in ad7124_append_status()
542 st->adc_control = adc_control; in ad7124_append_status()
553 for (i = 0; i < st->num_channels; i++) { in ad7124_disable_all()
572 .num_slots = 8,
590 ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan->address), 2, in ad7124_read_raw()
591 st->channels[chan->address].ain | AD7124_CHANNEL_EN(0)); in ad7124_read_raw()
597 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
599 idx = st->channels[chan->address].cfg.pga_bits; in ad7124_read_raw()
600 *val = st->channels[chan->address].cfg.vref_mv; in ad7124_read_raw()
601 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
602 *val2 = chan->scan_type.realbits - 1 + idx; in ad7124_read_raw()
604 *val2 = chan->scan_type.realbits + idx; in ad7124_read_raw()
606 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
609 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
610 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
611 *val = -(1 << (chan->scan_type.realbits - 1)); in ad7124_read_raw()
615 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
618 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
619 *val = st->channels[chan->address].cfg.odr; in ad7124_read_raw()
620 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
624 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
625 *val = ad7124_get_3db_filter_freq(st, chan->scan_index); in ad7124_read_raw()
626 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
630 return -EINVAL; in ad7124_read_raw()
642 mutex_lock(&st->cfgs_lock); in ad7124_write_raw()
647 ret = -EINVAL; in ad7124_write_raw()
651 ad7124_set_channel_odr(st, chan->address, val); in ad7124_write_raw()
655 ret = -EINVAL; in ad7124_write_raw()
659 if (st->channels[chan->address].cfg.bipolar) in ad7124_write_raw()
660 full_scale = 1 << (chan->scan_type.realbits - 1); in ad7124_write_raw()
662 full_scale = 1 << chan->scan_type.realbits; in ad7124_write_raw()
664 vref = st->channels[chan->address].cfg.vref_mv * 1000000LL; in ad7124_write_raw()
669 if (st->channels[chan->address].cfg.pga_bits != res) in ad7124_write_raw()
670 st->channels[chan->address].cfg.live = false; in ad7124_write_raw()
672 st->channels[chan->address].cfg.pga_bits = res; in ad7124_write_raw()
676 ret = -EINVAL; in ad7124_write_raw()
680 ad7124_set_3db_filter_freq(st, chan->address, val); in ad7124_write_raw()
683 ret = -EINVAL; in ad7124_write_raw()
686 mutex_unlock(&st->cfgs_lock); in ad7124_write_raw()
699 return -EINVAL; in ad7124_reg_access()
702 ret = ad_sd_read_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
705 ret = ad_sd_write_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
731 mutex_lock(&st->cfgs_lock); in ad7124_update_scan_mode()
732 for (i = 0; i < st->num_channels; i++) { in ad7124_update_scan_mode()
735 ret = __ad7124_set_channel(&st->sd, i); in ad7124_update_scan_mode()
740 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
746 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
765 ret = ad_sd_reset(&st->sd, 64); in ad7124_soft_reset()
772 ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); in ad7124_soft_reset()
779 /* The AD7124 requires typically 2ms to power up and settle */ in ad7124_soft_reset()
781 } while (--timeout); in ad7124_soft_reset()
783 dev_err(&st->sd.spi->dev, "Soft reset failed\n"); in ad7124_soft_reset()
785 return -EIO; in ad7124_soft_reset()
793 ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); in ad7124_check_chip_id()
800 if (chip_id != st->chip_info->chip_id) { in ad7124_check_chip_id()
801 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
803 st->chip_info->chip_id, chip_id); in ad7124_check_chip_id()
804 return -ENODEV; in ad7124_check_chip_id()
808 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
810 return -ENODEV; in ad7124_check_chip_id()
826 st->num_channels = device_get_child_node_count(dev); in ad7124_parse_channel_config()
827 if (!st->num_channels) in ad7124_parse_channel_config()
828 return dev_err_probe(dev, -ENODEV, "no channel children\n"); in ad7124_parse_channel_config()
830 chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, in ad7124_parse_channel_config()
833 return -ENOMEM; in ad7124_parse_channel_config()
835 channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels), in ad7124_parse_channel_config()
838 return -ENOMEM; in ad7124_parse_channel_config()
840 indio_dev->channels = chan; in ad7124_parse_channel_config()
841 indio_dev->num_channels = st->num_channels; in ad7124_parse_channel_config()
842 st->channels = channels; in ad7124_parse_channel_config()
849 if (channel >= indio_dev->num_channels) in ad7124_parse_channel_config()
850 return dev_err_probe(dev, -EINVAL, in ad7124_parse_channel_config()
853 ret = fwnode_property_read_u32_array(child, "diff-channels", in ad7124_parse_channel_config()
858 st->channels[channel].nr = channel; in ad7124_parse_channel_config()
859 st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | in ad7124_parse_channel_config()
862 cfg = &st->channels[channel].cfg; in ad7124_parse_channel_config()
863 cfg->bipolar = fwnode_property_read_bool(child, "bipolar"); in ad7124_parse_channel_config()
865 ret = fwnode_property_read_u32(child, "adi,reference-select", &tmp); in ad7124_parse_channel_config()
867 cfg->refsel = AD7124_INT_REF; in ad7124_parse_channel_config()
869 cfg->refsel = tmp; in ad7124_parse_channel_config()
871 cfg->buf_positive = in ad7124_parse_channel_config()
872 fwnode_property_read_bool(child, "adi,buffered-positive"); in ad7124_parse_channel_config()
873 cfg->buf_negative = in ad7124_parse_channel_config()
874 fwnode_property_read_bool(child, "adi,buffered-negative"); in ad7124_parse_channel_config()
891 fclk = clk_get_rate(st->mclk); in ad7124_setup()
893 return -EINVAL; in ad7124_setup()
900 ret = clk_set_rate(st->mclk, fclk); in ad7124_setup()
906 st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK; in ad7124_setup()
907 st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode); in ad7124_setup()
908 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_setup()
912 mutex_init(&st->cfgs_lock); in ad7124_setup()
913 INIT_KFIFO(st->live_cfgs_fifo); in ad7124_setup()
914 for (i = 0; i < st->num_channels; i++) { in ad7124_setup()
916 ret = ad7124_init_config_vref(st, &st->channels[i].cfg); in ad7124_setup()
928 ad_sd_write_reg(&st->sd, AD7124_CHANNEL(i), 2, 0); in ad7124_setup()
948 return -ENODEV; in ad7124_probe()
950 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad7124_probe()
952 return -ENOMEM; in ad7124_probe()
956 st->chip_info = info; in ad7124_probe()
958 indio_dev->name = st->chip_info->name; in ad7124_probe()
959 indio_dev->modes = INDIO_DIRECT_MODE; in ad7124_probe()
960 indio_dev->info = &ad7124_info; in ad7124_probe()
962 ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7124_sigma_delta_info); in ad7124_probe()
966 ret = ad7124_parse_channel_config(indio_dev, &spi->dev); in ad7124_probe()
970 for (i = 0; i < ARRAY_SIZE(st->vref); i++) { in ad7124_probe()
974 st->vref[i] = devm_regulator_get_optional(&spi->dev, in ad7124_probe()
976 if (PTR_ERR(st->vref[i]) == -ENODEV) in ad7124_probe()
978 else if (IS_ERR(st->vref[i])) in ad7124_probe()
979 return PTR_ERR(st->vref[i]); in ad7124_probe()
981 ret = regulator_enable(st->vref[i]); in ad7124_probe()
985 ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, in ad7124_probe()
986 st->vref[i]); in ad7124_probe()
991 st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); in ad7124_probe()
992 if (IS_ERR(st->mclk)) in ad7124_probe()
993 return PTR_ERR(st->mclk); in ad7124_probe()
1007 ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); in ad7124_probe()
1011 return devm_iio_device_register(&spi->dev, indio_dev); in ad7124_probe()
1016 { .compatible = "adi,ad7124-4",
1018 { .compatible = "adi,ad7124-8",
1025 { "ad7124-4", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_4] },
1026 { "ad7124-8", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_8] },
1033 .name = "ad7124",
1042 MODULE_DESCRIPTION("Analog Devices AD7124 SPI driver");