Lines Matching refs:mclk_sel
289 u32 mclk_sel; member
1687 st->mclk_sel = AD4130_MCLK_153_6KHZ_EXT; in ad4310_parse_fw()
1689 st->mclk_sel = AD4130_MCLK_76_8KHZ_EXT; in ad4310_parse_fw()
1691 st->mclk_sel = AD4130_MCLK_76_8KHZ; in ad4310_parse_fw()
1694 st->mclk_sel != AD4130_MCLK_76_8KHZ) in ad4310_parse_fw()
1697 st->mclk_sel, st->int_pin_sel); in ad4310_parse_fw()
1766 enum ad4130_mclk_sel mclk_sel) in ad4130_set_mclk_sel() argument
1771 mclk_sel)); in ad4130_set_mclk_sel()
1784 return st->mclk_sel == AD4130_MCLK_76_8KHZ_OUT; in ad4130_int_clk_is_enabled()
1796 st->mclk_sel = AD4130_MCLK_76_8KHZ_OUT; in ad4130_int_clk_prepare()
1810 st->mclk_sel = AD4130_MCLK_76_8KHZ; in ad4130_int_clk_unprepare()
1835 st->mclk_sel != AD4130_MCLK_76_8KHZ) in ad4130_setup_int_clk()
1869 if (st->mclk_sel == AD4130_MCLK_153_6KHZ_EXT) in ad4130_setup()
1895 val |= FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, st->mclk_sel); in ad4130_setup()