master/mipi-i3c-hci/cmd_v1.c

23 #define CMD_0_ATTR_A			FIELD_PREP(CMD_0_ATTR, 0x2)
27 #define CMD_A0_DEV_COUNT(v)		FIELD_PREP(W0_MASK(29, 26), v)
28 #define CMD_A0_DEV_INDEX(v)		FIELD_PREP(W0_MASK(20, 16), v)
29 #define CMD_A0_CMD(v)			FIELD_PREP(W0_MASK(14,  7), v)
30 #define CMD_A0_TID(v)			FIELD_PREP(W0_MASK( 6,  3), v)
36 #define CMD_0_ATTR_I			FIELD_PREP(CMD_0_ATTR, 0x1)
38 #define CMD_I1_DATA_BYTE_4(v)		FIELD_PREP(W1_MASK(63, 56), v)
39 #define CMD_I1_DATA_BYTE_3(v)		FIELD_PREP(W1_MASK(55, 48), v)
40 #define CMD_I1_DATA_BYTE_2(v)		FIELD_PREP(W1_MASK(47, 40), v)
41 #define CMD_I1_DATA_BYTE_1(v)		FIELD_PREP(W1_MASK(39, 32), v)
42 #define CMD_I1_DEF_BYTE(v)		FIELD_PREP(W1_MASK(39, 32), v)
46 #define CMD_I0_MODE(v)			FIELD_PREP(W0_MASK(28, 26), v)
47 #define CMD_I0_DTT(v)			FIELD_PREP(W0_MASK(25, 23), v)
48 #define CMD_I0_DEV_INDEX(v)		FIELD_PREP(W0_MASK(20, 16), v)
50 #define CMD_I0_CMD(v)			FIELD_PREP(W0_MASK(14,  7), v)
51 #define CMD_I0_TID(v)			FIELD_PREP(W0_MASK( 6,  3), v)
57 #define CMD_0_ATTR_R			FIELD_PREP(CMD_0_ATTR, 0x0)
59 #define CMD_R1_DATA_LENGTH(v)		FIELD_PREP(W1_MASK(63, 48), v)
60 #define CMD_R1_DEF_BYTE(v)		FIELD_PREP(W1_MASK(39, 32), v)
64 #define CMD_R0_MODE(v)			FIELD_PREP(W0_MASK(28, 26), v)
66 #define CMD_R0_DEV_INDEX(v)		FIELD_PREP(W0_MASK(20, 16), v)
68 #define CMD_R0_CMD(v)			FIELD_PREP(W0_MASK(14,  7), v)
69 #define CMD_R0_TID(v)			FIELD_PREP(W0_MASK( 6,  3), v)
75 #define CMD_0_ATTR_C			FIELD_PREP(CMD_0_ATTR, 0x3)
77 #define CMD_C1_DATA_LENGTH(v)		FIELD_PREP(W1_MASK(63, 48), v)
78 #define CMD_C1_OFFSET(v)		FIELD_PREP(W1_MASK(47, 32), v)
82 #define CMD_C0_MODE(v)			FIELD_PREP(W0_MASK(28, 26), v)
85 #define CMD_C0_DATA_LENGTH_POSITION(v)	FIELD_PREP(W0_MASK(23, 22), v)
86 #define CMD_C0_DEV_INDEX(v)		FIELD_PREP(W0_MASK(20, 16), v)
88 #define CMD_C0_CMD(v)			FIELD_PREP(W0_MASK(14,  7), v)
89 #define CMD_C0_TID(v)			FIELD_PREP(W0_MASK( 6,  3), v)
95 #define CMD_0_ATTR_M			FIELD_PREP(CMD_0_ATTR, 0x7)
101 #define CMD_M0_TID(v)			FIELD_PREP(W0_MASK( 6,  3), v)