Lines Matching refs:SYNQUACER_I2C_REG_BCR

27 #define SYNQUACER_I2C_REG_BCR		(0x01 << 2) // Bus Control  macro
183 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_stop()
244 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_hw_init()
268 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_master_start()
280 		       i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_master_start()
290 		       i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_master_start()
297 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_master_start()
364 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_isr()
417 			       i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_isr()
452 			       i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_isr()
460 			       i2c->base + SYNQUACER_I2C_REG_BCR);  in synquacer_i2c_isr()