Lines Matching +full:scl +full:- +full:output +full:- +full:only
1 // SPDX-License-Identifier: GPL-2.0
14 * This driver is based on i2c-stm32f4.c
21 #include <linux/i2c-smbus.h>
38 #include "i2c-stm32.h"
185 * struct stm32f7_i2c_regs - i2c f7 registers backup
201 * struct stm32f7_i2c_spec - private i2c specification timing
203 * @fall_max: Max fall time of both SDA and SCL signals (ns)
204 * @rise_max: Max rise time of both SDA and SCL signals (ns)
208 * @l_min: Min low period of the SCL clock (ns)
209 * @h_min: Min high period of the SCL clock (ns)
223 * struct stm32f7_i2c_setup - private I2C timing setup parameters
239 * struct stm32f7_i2c_timings - private I2C output parameters
244 * @sclh: SCL high period (master mode)
245 * @scll: SCL low period (master mode)
257 * struct stm32f7_i2c_msg - client specific data
258 * @addr: 8-bit or 10-bit slave addr, including r/w bit
266 * SMBus block read and SMBus block write - block read process call protocols
269 * This buffer has to be 32-bit aligned to be compliant with memory address
285 * struct stm32f7_i2c_alert - SMBus alert specific data
296 * struct stm32f7_i2c_dev - private data of the controller
323 * @host_notify_client: SMBus host-notify client
367 * Table10. Characteristics of the SDA and SCL bus lines for Standard, Fast,
368 * and Fast-mode Plus I2C-bus devices
432 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, mask); in stm32f7_i2c_disable_irq()
443 return ERR_PTR(-EINVAL); in stm32f7_get_specs()
449 struct stm32f7_i2c_timings *output) in stm32f7_i2c_compute_timing() argument
454 setup->clock_src); in stm32f7_i2c_compute_timing()
456 setup->speed_freq); in stm32f7_i2c_compute_timing()
469 specs = stm32f7_get_specs(setup->speed_freq); in stm32f7_i2c_compute_timing()
470 if (specs == ERR_PTR(-EINVAL)) { in stm32f7_i2c_compute_timing()
471 dev_err(i2c_dev->dev, "speed out of bound {%d}\n", in stm32f7_i2c_compute_timing()
472 setup->speed_freq); in stm32f7_i2c_compute_timing()
473 return -EINVAL; in stm32f7_i2c_compute_timing()
476 if ((setup->rise_time > specs->rise_max) || in stm32f7_i2c_compute_timing()
477 (setup->fall_time > specs->fall_max)) { in stm32f7_i2c_compute_timing()
478 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
480 setup->rise_time, specs->rise_max, in stm32f7_i2c_compute_timing()
481 setup->fall_time, specs->fall_max); in stm32f7_i2c_compute_timing()
482 return -EINVAL; in stm32f7_i2c_compute_timing()
485 i2c_dev->dnf = DIV_ROUND_CLOSEST(i2c_dev->dnf_dt, i2cclk); in stm32f7_i2c_compute_timing()
486 if (i2c_dev->dnf > STM32F7_I2C_DNF_MAX) { in stm32f7_i2c_compute_timing()
487 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
489 i2c_dev->dnf * i2cclk, STM32F7_I2C_DNF_MAX * i2cclk); in stm32f7_i2c_compute_timing()
490 return -EINVAL; in stm32f7_i2c_compute_timing()
495 (i2c_dev->analog_filter ? in stm32f7_i2c_compute_timing()
498 (i2c_dev->analog_filter ? in stm32f7_i2c_compute_timing()
500 dnf_delay = i2c_dev->dnf * i2cclk; in stm32f7_i2c_compute_timing()
502 sdadel_min = specs->hddat_min + setup->fall_time - in stm32f7_i2c_compute_timing()
503 af_delay_min - (i2c_dev->dnf + 3) * i2cclk; in stm32f7_i2c_compute_timing()
505 sdadel_max = specs->vddat_max - setup->rise_time - in stm32f7_i2c_compute_timing()
506 af_delay_max - (i2c_dev->dnf + 4) * i2cclk; in stm32f7_i2c_compute_timing()
508 scldel_min = setup->rise_time + specs->sudat_min; in stm32f7_i2c_compute_timing()
515 dev_dbg(i2c_dev->dev, "SDADEL(min/max): %i/%i, SCLDEL(Min): %i\n", in stm32f7_i2c_compute_timing()
535 ret = -ENOMEM; in stm32f7_i2c_compute_timing()
539 v->presc = p; in stm32f7_i2c_compute_timing()
540 v->scldel = l; in stm32f7_i2c_compute_timing()
541 v->sdadel = a; in stm32f7_i2c_compute_timing()
544 list_add_tail(&v->node, in stm32f7_i2c_compute_timing()
556 dev_err(i2c_dev->dev, "no Prescaler solution\n"); in stm32f7_i2c_compute_timing()
557 ret = -EPERM; in stm32f7_i2c_compute_timing()
563 clk_max = NSEC_PER_SEC / RATE_MIN(setup->speed_freq); in stm32f7_i2c_compute_timing()
564 clk_min = NSEC_PER_SEC / setup->speed_freq; in stm32f7_i2c_compute_timing()
567 * Among Prescaler possibilities discovered above figures out SCL Low in stm32f7_i2c_compute_timing()
569 * - SCL Low Period has to be higher than SCL Clock Low Period in stm32f7_i2c_compute_timing()
571 * (SCL Low Period - Analog/Digital filters) / 4. in stm32f7_i2c_compute_timing()
572 * - SCL High Period has to be lower than SCL Clock High Period in stm32f7_i2c_compute_timing()
574 * - I2C Clock has to be lower than SCL High Period in stm32f7_i2c_compute_timing()
577 u32 prescaler = (v->presc + 1) * i2cclk; in stm32f7_i2c_compute_timing()
582 if ((tscl_l < specs->l_min) || in stm32f7_i2c_compute_timing()
584 ((tscl_l - af_delay_min - dnf_delay) / 4))) { in stm32f7_i2c_compute_timing()
591 setup->rise_time + setup->fall_time; in stm32f7_i2c_compute_timing()
594 (tscl_h >= specs->h_min) && in stm32f7_i2c_compute_timing()
596 int clk_error = tscl - i2cbus; in stm32f7_i2c_compute_timing()
599 clk_error = -clk_error; in stm32f7_i2c_compute_timing()
603 v->scll = l; in stm32f7_i2c_compute_timing()
604 v->sclh = h; in stm32f7_i2c_compute_timing()
613 dev_err(i2c_dev->dev, "no solution at all\n"); in stm32f7_i2c_compute_timing()
614 ret = -EPERM; in stm32f7_i2c_compute_timing()
618 output->presc = s->presc; in stm32f7_i2c_compute_timing()
619 output->scldel = s->scldel; in stm32f7_i2c_compute_timing()
620 output->sdadel = s->sdadel; in stm32f7_i2c_compute_timing()
621 output->scll = s->scll; in stm32f7_i2c_compute_timing()
622 output->sclh = s->sclh; in stm32f7_i2c_compute_timing()
624 dev_dbg(i2c_dev->dev, in stm32f7_i2c_compute_timing()
626 output->presc, in stm32f7_i2c_compute_timing()
627 output->scldel, output->sdadel, in stm32f7_i2c_compute_timing()
628 output->scll, output->sclh); in stm32f7_i2c_compute_timing()
633 list_del(&v->node); in stm32f7_i2c_compute_timing()
644 while (--i) in stm32f7_get_lower_rate()
657 t->bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; in stm32f7_i2c_setup_timing()
658 t->scl_rise_ns = i2c_dev->setup.rise_time; in stm32f7_i2c_setup_timing()
659 t->scl_fall_ns = i2c_dev->setup.fall_time; in stm32f7_i2c_setup_timing()
661 i2c_parse_fw_timings(i2c_dev->dev, t, false); in stm32f7_i2c_setup_timing()
663 if (t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) { in stm32f7_i2c_setup_timing()
664 dev_err(i2c_dev->dev, "Invalid bus speed (%i>%i)\n", in stm32f7_i2c_setup_timing()
665 t->bus_freq_hz, I2C_MAX_FAST_MODE_PLUS_FREQ); in stm32f7_i2c_setup_timing()
666 return -EINVAL; in stm32f7_i2c_setup_timing()
669 setup->speed_freq = t->bus_freq_hz; in stm32f7_i2c_setup_timing()
670 i2c_dev->setup.rise_time = t->scl_rise_ns; in stm32f7_i2c_setup_timing()
671 i2c_dev->setup.fall_time = t->scl_fall_ns; in stm32f7_i2c_setup_timing()
672 i2c_dev->dnf_dt = t->digital_filter_width_ns; in stm32f7_i2c_setup_timing()
673 setup->clock_src = clk_get_rate(i2c_dev->clk); in stm32f7_i2c_setup_timing()
675 if (!setup->clock_src) { in stm32f7_i2c_setup_timing()
676 dev_err(i2c_dev->dev, "clock rate is 0\n"); in stm32f7_i2c_setup_timing()
677 return -EINVAL; in stm32f7_i2c_setup_timing()
680 if (!of_property_read_bool(i2c_dev->dev->of_node, "i2c-digital-filter")) in stm32f7_i2c_setup_timing()
681 i2c_dev->dnf_dt = STM32F7_I2C_DNF_DEFAULT; in stm32f7_i2c_setup_timing()
685 &i2c_dev->timing); in stm32f7_i2c_setup_timing()
687 dev_err(i2c_dev->dev, in stm32f7_i2c_setup_timing()
689 if (setup->speed_freq <= I2C_MAX_STANDARD_MODE_FREQ) in stm32f7_i2c_setup_timing()
691 setup->speed_freq = in stm32f7_i2c_setup_timing()
692 stm32f7_get_lower_rate(setup->speed_freq); in stm32f7_i2c_setup_timing()
693 dev_warn(i2c_dev->dev, in stm32f7_i2c_setup_timing()
695 setup->speed_freq); in stm32f7_i2c_setup_timing()
700 dev_err(i2c_dev->dev, "Impossible to compute I2C timings.\n"); in stm32f7_i2c_setup_timing()
704 i2c_dev->analog_filter = of_property_read_bool(i2c_dev->dev->of_node, in stm32f7_i2c_setup_timing()
705 "i2c-analog-filter"); in stm32f7_i2c_setup_timing()
707 dev_dbg(i2c_dev->dev, "I2C Speed(%i), Clk Source(%i)\n", in stm32f7_i2c_setup_timing()
708 setup->speed_freq, setup->clock_src); in stm32f7_i2c_setup_timing()
709 dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n", in stm32f7_i2c_setup_timing()
710 setup->rise_time, setup->fall_time); in stm32f7_i2c_setup_timing()
711 dev_dbg(i2c_dev->dev, "I2C Analog Filter(%s), DNF(%i)\n", in stm32f7_i2c_setup_timing()
712 (i2c_dev->analog_filter ? "On" : "Off"), i2c_dev->dnf); in stm32f7_i2c_setup_timing()
714 i2c_dev->bus_rate = setup->speed_freq; in stm32f7_i2c_setup_timing()
721 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_dma_req()
730 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_dma_callback()
731 struct device *dev = dma->chan_using->device->dev; in stm32f7_i2c_dma_callback()
734 dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); in stm32f7_i2c_dma_callback()
735 complete(&dma->dma_complete); in stm32f7_i2c_dma_callback()
740 struct stm32f7_i2c_timings *t = &i2c_dev->timing; in stm32f7_i2c_hw_config()
744 timing |= STM32F7_I2C_TIMINGR_PRESC(t->presc); in stm32f7_i2c_hw_config()
745 timing |= STM32F7_I2C_TIMINGR_SCLDEL(t->scldel); in stm32f7_i2c_hw_config()
746 timing |= STM32F7_I2C_TIMINGR_SDADEL(t->sdadel); in stm32f7_i2c_hw_config()
747 timing |= STM32F7_I2C_TIMINGR_SCLH(t->sclh); in stm32f7_i2c_hw_config()
748 timing |= STM32F7_I2C_TIMINGR_SCLL(t->scll); in stm32f7_i2c_hw_config()
749 writel_relaxed(timing, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_hw_config()
752 if (i2c_dev->analog_filter) in stm32f7_i2c_hw_config()
753 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
756 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
760 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
762 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
763 STM32F7_I2C_CR1_DNF(i2c_dev->dnf)); in stm32f7_i2c_hw_config()
765 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
771 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_write_tx_data()
772 void __iomem *base = i2c_dev->base; in stm32f7_i2c_write_tx_data()
774 if (f7_msg->count) { in stm32f7_i2c_write_tx_data()
775 writeb_relaxed(*f7_msg->buf++, base + STM32F7_I2C_TXDR); in stm32f7_i2c_write_tx_data()
776 f7_msg->count--; in stm32f7_i2c_write_tx_data()
782 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_read_rx_data()
783 void __iomem *base = i2c_dev->base; in stm32f7_i2c_read_rx_data()
785 if (f7_msg->count) { in stm32f7_i2c_read_rx_data()
786 *f7_msg->buf++ = readb_relaxed(base + STM32F7_I2C_RXDR); in stm32f7_i2c_read_rx_data()
787 f7_msg->count--; in stm32f7_i2c_read_rx_data()
796 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_reload()
799 if (i2c_dev->use_dma) in stm32f7_i2c_reload()
800 f7_msg->count -= STM32F7_I2C_MAX_LEN; in stm32f7_i2c_reload()
802 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
805 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_reload()
809 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_reload()
812 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
817 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_reload()
830 val = f7_msg->buf - sizeof(u8); in stm32f7_i2c_smbus_reload()
831 f7_msg->count = *val; in stm32f7_i2c_smbus_reload()
832 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
834 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_reload()
835 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
842 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_release_bus()
853 ret = readl_relaxed_poll_timeout(i2c_dev->base + STM32F7_I2C_ISR, in stm32f7_i2c_wait_free_bus()
860 stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_wait_free_bus()
862 return -EBUSY; in stm32f7_i2c_wait_free_bus()
868 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer_msg()
869 void __iomem *base = i2c_dev->base; in stm32f7_i2c_xfer_msg()
873 f7_msg->addr = msg->addr; in stm32f7_i2c_xfer_msg()
874 f7_msg->buf = msg->buf; in stm32f7_i2c_xfer_msg()
875 f7_msg->count = msg->len; in stm32f7_i2c_xfer_msg()
876 f7_msg->result = 0; in stm32f7_i2c_xfer_msg()
877 f7_msg->stop = (i2c_dev->msg_id >= i2c_dev->msg_num - 1); in stm32f7_i2c_xfer_msg()
879 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_xfer_msg()
886 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
891 if (msg->flags & I2C_M_TEN) { in stm32f7_i2c_xfer_msg()
893 cr2 |= STM32F7_I2C_CR2_SADD10(f7_msg->addr); in stm32f7_i2c_xfer_msg()
897 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_xfer_msg()
902 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_xfer_msg()
906 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_xfer_msg()
918 i2c_dev->use_dma = false; in stm32f7_i2c_xfer_msg()
919 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN in stm32f7_i2c_xfer_msg()
920 && !i2c_dev->atomic) { in stm32f7_i2c_xfer_msg()
921 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_xfer_msg()
922 msg->flags & I2C_M_RD, in stm32f7_i2c_xfer_msg()
923 f7_msg->count, f7_msg->buf, in stm32f7_i2c_xfer_msg()
927 i2c_dev->use_dma = true; in stm32f7_i2c_xfer_msg()
929 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_xfer_msg()
932 if (!i2c_dev->use_dma) { in stm32f7_i2c_xfer_msg()
933 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
938 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
944 if (i2c_dev->atomic) in stm32f7_i2c_xfer_msg()
950 i2c_dev->master_mode = true; in stm32f7_i2c_xfer_msg()
961 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer_msg()
962 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer_msg()
963 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_xfer_msg()
967 f7_msg->result = 0; in stm32f7_i2c_smbus_xfer_msg()
968 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_smbus_xfer_msg()
975 if (f7_msg->read_write) in stm32f7_i2c_smbus_xfer_msg()
980 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_smbus_xfer_msg()
982 f7_msg->smbus_buf[0] = command; in stm32f7_i2c_smbus_xfer_msg()
983 switch (f7_msg->size) { in stm32f7_i2c_smbus_xfer_msg()
985 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
986 f7_msg->count = 0; in stm32f7_i2c_smbus_xfer_msg()
989 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
990 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
993 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
994 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
995 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
998 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
999 f7_msg->count = 2; in stm32f7_i2c_smbus_xfer_msg()
1000 f7_msg->smbus_buf[1] = data->byte; in stm32f7_i2c_smbus_xfer_msg()
1004 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1005 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1006 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
1009 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
1010 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
1011 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
1012 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
1016 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1017 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1018 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
1021 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
1022 if (data->block[0] > I2C_SMBUS_BLOCK_MAX || in stm32f7_i2c_smbus_xfer_msg()
1023 !data->block[0]) { in stm32f7_i2c_smbus_xfer_msg()
1025 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
1026 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
1028 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
1029 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
1030 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1034 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1035 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
1036 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
1037 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
1039 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1042 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1043 if (data->block[0] > I2C_SMBUS_BLOCK_MAX - 1) { in stm32f7_i2c_smbus_xfer_msg()
1045 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
1046 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
1048 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
1049 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
1050 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1052 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1056 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1058 dev_err(dev, "Unsupported smbus protocol %d\n", f7_msg->size); in stm32f7_i2c_smbus_xfer_msg()
1059 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1062 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_xfer_msg()
1065 if ((flags & I2C_CLIENT_PEC) && f7_msg->size != I2C_SMBUS_QUICK) { in stm32f7_i2c_smbus_xfer_msg()
1067 if (!f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1069 f7_msg->count++; in stm32f7_i2c_smbus_xfer_msg()
1078 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_xfer_msg()
1089 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_xfer_msg()
1090 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) { in stm32f7_i2c_smbus_xfer_msg()
1091 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_xfer_msg()
1093 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_xfer_msg()
1097 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_xfer_msg()
1099 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_xfer_msg()
1102 if (!i2c_dev->use_dma) { in stm32f7_i2c_smbus_xfer_msg()
1117 i2c_dev->master_mode = true; in stm32f7_i2c_smbus_xfer_msg()
1128 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_rep_start()
1129 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_rep_start()
1139 switch (f7_msg->size) { in stm32f7_i2c_smbus_rep_start()
1141 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1145 f7_msg->count = 2; in stm32f7_i2c_smbus_rep_start()
1149 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1154 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_rep_start()
1155 f7_msg->stop = true; in stm32f7_i2c_smbus_rep_start()
1160 f7_msg->count++; in stm32f7_i2c_smbus_rep_start()
1165 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_rep_start()
1181 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_rep_start()
1182 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN && in stm32f7_i2c_smbus_rep_start()
1183 f7_msg->size != I2C_SMBUS_BLOCK_DATA && in stm32f7_i2c_smbus_rep_start()
1184 f7_msg->size != I2C_SMBUS_BLOCK_PROC_CALL) { in stm32f7_i2c_smbus_rep_start()
1185 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_rep_start()
1187 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_rep_start()
1192 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_rep_start()
1194 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_rep_start()
1197 if (!i2c_dev->use_dma) in stm32f7_i2c_smbus_rep_start()
1212 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_check_pec()
1215 internal_pec = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR); in stm32f7_i2c_smbus_check_pec()
1217 switch (f7_msg->size) { in stm32f7_i2c_smbus_check_pec()
1220 received_pec = f7_msg->smbus_buf[1]; in stm32f7_i2c_smbus_check_pec()
1224 received_pec = f7_msg->smbus_buf[2]; in stm32f7_i2c_smbus_check_pec()
1228 count = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_check_pec()
1229 received_pec = f7_msg->smbus_buf[count]; in stm32f7_i2c_smbus_check_pec()
1232 dev_err(i2c_dev->dev, "Unsupported smbus protocol for PEC\n"); in stm32f7_i2c_smbus_check_pec()
1233 return -EINVAL; in stm32f7_i2c_smbus_check_pec()
1237 dev_err(i2c_dev->dev, "Bad PEC 0x%02x vs. 0x%02x\n", in stm32f7_i2c_smbus_check_pec()
1239 return -EBADMSG; in stm32f7_i2c_smbus_check_pec()
1252 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_is_addr_match()
1254 * For 10-bit addr, addcode = 11110XY with in stm32f7_i2c_is_addr_match()
1258 addr = slave->addr >> 8; in stm32f7_i2c_is_addr_match()
1263 addr = slave->addr & 0x7f; in stm32f7_i2c_is_addr_match()
1273 struct i2c_client *slave = i2c_dev->slave_running; in stm32f7_i2c_slave_start()
1274 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_start()
1278 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_start()
1321 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_addr()
1325 isr = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_slave_addr()
1330 if (stm32f7_i2c_is_addr_match(i2c_dev->slave[i], addcode)) { in stm32f7_i2c_slave_addr()
1331 i2c_dev->slave_running = i2c_dev->slave[i]; in stm32f7_i2c_slave_addr()
1332 i2c_dev->slave_dir = dir; in stm32f7_i2c_slave_addr()
1351 if (i2c_dev->slave[i] == slave) { in stm32f7_i2c_get_slave_id()
1357 dev_err(i2c_dev->dev, "Slave 0x%x not registered\n", slave->addr); in stm32f7_i2c_get_slave_id()
1359 return -ENODEV; in stm32f7_i2c_get_slave_id()
1365 struct device *dev = i2c_dev->dev; in stm32f7_i2c_get_free_slave_id()
1369 * slave[STM32F7_SLAVE_HOSTNOTIFY] support only SMBus Host address (0x8) in stm32f7_i2c_get_free_slave_id()
1370 * slave[STM32F7_SLAVE_7_10_BITS_ADDR] supports 7-bit and 10-bit slave address in stm32f7_i2c_get_free_slave_id()
1371 * slave[STM32F7_SLAVE_7_BITS_ADDR] supports 7-bit slave address only in stm32f7_i2c_get_free_slave_id()
1373 if (i2c_dev->smbus_mode && (slave->addr == 0x08)) { in stm32f7_i2c_get_free_slave_id()
1374 if (i2c_dev->slave[STM32F7_SLAVE_HOSTNOTIFY]) in stm32f7_i2c_get_free_slave_id()
1380 for (i = STM32F7_I2C_MAX_SLAVE - 1; i > STM32F7_SLAVE_HOSTNOTIFY; i--) { in stm32f7_i2c_get_free_slave_id()
1382 (slave->flags & I2C_CLIENT_TEN)) in stm32f7_i2c_get_free_slave_id()
1384 if (!i2c_dev->slave[i]) { in stm32f7_i2c_get_free_slave_id()
1391 dev_err(dev, "Slave 0x%x could not be registered\n", slave->addr); in stm32f7_i2c_get_free_slave_id()
1393 return -EINVAL; in stm32f7_i2c_get_free_slave_id()
1401 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_registered()
1414 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_busy()
1423 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_isr_event()
1428 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_slave_isr_event()
1432 i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1446 val = readb_relaxed(i2c_dev->base + STM32F7_I2C_RXDR); in stm32f7_i2c_slave_isr_event()
1447 ret = i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1451 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1453 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1462 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK\n", __func__); in stm32f7_i2c_slave_isr_event()
1471 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_isr_event()
1484 i2c_slave_event(i2c_dev->slave_running, I2C_SLAVE_STOP, &val); in stm32f7_i2c_slave_isr_event()
1486 i2c_dev->slave_running = NULL; in stm32f7_i2c_slave_isr_event()
1499 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_event()
1500 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_event()
1501 void __iomem *base = i2c_dev->base; in stm32f7_i2c_isr_event()
1506 if (!i2c_dev->master_mode) { in stm32f7_i2c_isr_event()
1511 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event()
1523 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n", in stm32f7_i2c_isr_event()
1524 __func__, f7_msg->addr); in stm32f7_i2c_isr_event()
1526 if (i2c_dev->use_dma) { in stm32f7_i2c_isr_event()
1528 dmaengine_terminate_async(dma->chan_using); in stm32f7_i2c_isr_event()
1530 f7_msg->result = -ENXIO; in stm32f7_i2c_isr_event()
1545 if (i2c_dev->use_dma && !f7_msg->result) { in stm32f7_i2c_isr_event()
1548 i2c_dev->master_mode = false; in stm32f7_i2c_isr_event()
1549 complete(&i2c_dev->complete); in stm32f7_i2c_isr_event()
1555 if (f7_msg->stop) { in stm32f7_i2c_isr_event()
1558 } else if (i2c_dev->use_dma && !f7_msg->result) { in stm32f7_i2c_isr_event()
1560 } else if (f7_msg->smbus) { in stm32f7_i2c_isr_event()
1563 i2c_dev->msg_id++; in stm32f7_i2c_isr_event()
1564 i2c_dev->msg++; in stm32f7_i2c_isr_event()
1565 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg); in stm32f7_i2c_isr_event()
1570 if (f7_msg->smbus) in stm32f7_i2c_isr_event()
1582 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_event_thread()
1583 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_event_thread()
1591 ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ); in stm32f7_i2c_isr_event_thread()
1593 dev_dbg(i2c_dev->dev, "<%s>: Timed out\n", __func__); in stm32f7_i2c_isr_event_thread()
1595 dmaengine_terminate_async(dma->chan_using); in stm32f7_i2c_isr_event_thread()
1596 f7_msg->result = -ETIMEDOUT; in stm32f7_i2c_isr_event_thread()
1599 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event_thread()
1602 if (f7_msg->smbus) { in stm32f7_i2c_isr_event_thread()
1605 i2c_dev->msg_id++; in stm32f7_i2c_isr_event_thread()
1606 i2c_dev->msg++; in stm32f7_i2c_isr_event_thread()
1607 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg); in stm32f7_i2c_isr_event_thread()
1610 i2c_dev->master_mode = false; in stm32f7_i2c_isr_event_thread()
1611 complete(&i2c_dev->complete); in stm32f7_i2c_isr_event_thread()
1620 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_error()
1621 void __iomem *base = i2c_dev->base; in stm32f7_i2c_isr_error()
1622 struct device *dev = i2c_dev->dev; in stm32f7_i2c_isr_error()
1623 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_error()
1626 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_error()
1631 __func__, f7_msg->addr); in stm32f7_i2c_isr_error()
1633 stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_isr_error()
1634 f7_msg->result = -EIO; in stm32f7_i2c_isr_error()
1640 __func__, f7_msg->addr); in stm32f7_i2c_isr_error()
1642 f7_msg->result = -EAGAIN; in stm32f7_i2c_isr_error()
1647 __func__, f7_msg->addr); in stm32f7_i2c_isr_error()
1649 f7_msg->result = -EINVAL; in stm32f7_i2c_isr_error()
1655 i2c_handle_smbus_alert(i2c_dev->alert->ara); in stm32f7_i2c_isr_error()
1659 if (!i2c_dev->slave_running) { in stm32f7_i2c_isr_error()
1670 if (i2c_dev->use_dma) { in stm32f7_i2c_isr_error()
1672 dmaengine_terminate_async(dma->chan_using); in stm32f7_i2c_isr_error()
1675 i2c_dev->master_mode = false; in stm32f7_i2c_isr_error()
1676 complete(&i2c_dev->complete); in stm32f7_i2c_isr_error()
1683 ktime_t timeout = ktime_add_ms(ktime_get(), i2c_dev->adap.timeout); in stm32f7_i2c_wait_polling()
1689 if (completion_done(&i2c_dev->complete)) in stm32f7_i2c_wait_polling()
1700 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer_core()
1701 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_xfer_core()
1705 i2c_dev->msg = msgs; in stm32f7_i2c_xfer_core()
1706 i2c_dev->msg_num = num; in stm32f7_i2c_xfer_core()
1707 i2c_dev->msg_id = 0; in stm32f7_i2c_xfer_core()
1708 f7_msg->smbus = false; in stm32f7_i2c_xfer_core()
1710 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_xfer_core()
1720 if (!i2c_dev->atomic) in stm32f7_i2c_xfer_core()
1721 time_left = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_xfer_core()
1722 i2c_dev->adap.timeout); in stm32f7_i2c_xfer_core()
1726 ret = f7_msg->result; in stm32f7_i2c_xfer_core()
1728 if (i2c_dev->use_dma) in stm32f7_i2c_xfer_core()
1729 dmaengine_synchronize(dma->chan_using); in stm32f7_i2c_xfer_core()
1737 i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_xfer_core()
1742 dev_dbg(i2c_dev->dev, "Access to slave 0x%x timed out\n", in stm32f7_i2c_xfer_core()
1743 i2c_dev->msg->addr); in stm32f7_i2c_xfer_core()
1744 if (i2c_dev->use_dma) in stm32f7_i2c_xfer_core()
1745 dmaengine_terminate_sync(dma->chan_using); in stm32f7_i2c_xfer_core()
1747 ret = -ETIMEDOUT; in stm32f7_i2c_xfer_core()
1751 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_xfer_core()
1752 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_xfer_core()
1762 i2c_dev->atomic = false; in stm32f7_i2c_xfer()
1771 i2c_dev->atomic = true; in stm32f7_i2c_xfer_atomic()
1781 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer()
1782 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_smbus_xfer()
1783 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer()
1787 f7_msg->addr = addr; in stm32f7_i2c_smbus_xfer()
1788 f7_msg->size = size; in stm32f7_i2c_smbus_xfer()
1789 f7_msg->read_write = read_write; in stm32f7_i2c_smbus_xfer()
1790 f7_msg->smbus = true; in stm32f7_i2c_smbus_xfer()
1804 timeout = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_smbus_xfer()
1805 i2c_dev->adap.timeout); in stm32f7_i2c_smbus_xfer()
1806 ret = f7_msg->result; in stm32f7_i2c_smbus_xfer()
1808 if (i2c_dev->use_dma) in stm32f7_i2c_smbus_xfer()
1809 dmaengine_synchronize(dma->chan_using); in stm32f7_i2c_smbus_xfer()
1817 i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_smbus_xfer()
1822 dev_dbg(dev, "Access to slave 0x%x timed out\n", f7_msg->addr); in stm32f7_i2c_smbus_xfer()
1823 if (i2c_dev->use_dma) in stm32f7_i2c_smbus_xfer()
1824 dmaengine_terminate_sync(dma->chan_using); in stm32f7_i2c_smbus_xfer()
1826 ret = -ETIMEDOUT; in stm32f7_i2c_smbus_xfer()
1841 data->byte = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_xfer()
1845 data->word = f7_msg->smbus_buf[0] | in stm32f7_i2c_smbus_xfer()
1846 (f7_msg->smbus_buf[1] << 8); in stm32f7_i2c_smbus_xfer()
1850 for (i = 0; i <= f7_msg->smbus_buf[0]; i++) in stm32f7_i2c_smbus_xfer()
1851 data->block[i] = f7_msg->smbus_buf[i]; in stm32f7_i2c_smbus_xfer()
1855 ret = -EINVAL; in stm32f7_i2c_smbus_xfer()
1868 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_wakeup()
1871 if (!i2c_dev->wakeup_src) in stm32f7_i2c_enable_wakeup()
1875 device_set_wakeup_enable(i2c_dev->dev, true); in stm32f7_i2c_enable_wakeup()
1878 device_set_wakeup_enable(i2c_dev->dev, false); in stm32f7_i2c_enable_wakeup()
1885 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_reg_slave()
1886 void __iomem *base = i2c_dev->base; in stm32f7_i2c_reg_slave()
1887 struct device *dev = i2c_dev->dev; in stm32f7_i2c_reg_slave()
1891 if (slave->flags & I2C_CLIENT_PEC) { in stm32f7_i2c_reg_slave()
1893 return -EINVAL; in stm32f7_i2c_reg_slave()
1898 return -EBUSY; in stm32f7_i2c_reg_slave()
1915 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1920 oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1922 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1923 oar1 |= STM32F7_I2C_OAR1_OA1_10(slave->addr); in stm32f7_i2c_reg_slave()
1926 oar1 |= STM32F7_I2C_OAR1_OA1_7(slave->addr); in stm32f7_i2c_reg_slave()
1929 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1930 writel_relaxed(oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1935 oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1937 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1938 ret = -EOPNOTSUPP; in stm32f7_i2c_reg_slave()
1942 oar2 |= STM32F7_I2C_OAR2_OA2_7(slave->addr); in stm32f7_i2c_reg_slave()
1944 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1945 writel_relaxed(oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1950 ret = -ENODEV; in stm32f7_i2c_reg_slave()
1975 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_unreg_slave()
1976 void __iomem *base = i2c_dev->base; in stm32f7_i2c_unreg_slave()
1984 WARN_ON(!i2c_dev->slave[id]); in stm32f7_i2c_unreg_slave()
1986 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
1998 i2c_dev->slave[id] = NULL; in stm32f7_i2c_unreg_slave()
2005 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
2006 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
2016 if (i2c_dev->bus_rate <= I2C_MAX_FAST_MODE_FREQ || in stm32f7_i2c_write_fm_plus_bits()
2017 IS_ERR_OR_NULL(i2c_dev->regmap)) in stm32f7_i2c_write_fm_plus_bits()
2021 if (i2c_dev->fmp_sreg == i2c_dev->fmp_creg) in stm32f7_i2c_write_fm_plus_bits()
2022 ret = regmap_update_bits(i2c_dev->regmap, in stm32f7_i2c_write_fm_plus_bits()
2023 i2c_dev->fmp_sreg, in stm32f7_i2c_write_fm_plus_bits()
2024 i2c_dev->fmp_mask, in stm32f7_i2c_write_fm_plus_bits()
2025 enable ? i2c_dev->fmp_mask : 0); in stm32f7_i2c_write_fm_plus_bits()
2027 ret = regmap_write(i2c_dev->regmap, in stm32f7_i2c_write_fm_plus_bits()
2028 enable ? i2c_dev->fmp_sreg : in stm32f7_i2c_write_fm_plus_bits()
2029 i2c_dev->fmp_creg, in stm32f7_i2c_write_fm_plus_bits()
2030 i2c_dev->fmp_mask); in stm32f7_i2c_write_fm_plus_bits()
2038 struct device_node *np = pdev->dev.of_node; in stm32f7_i2c_setup_fm_plus_bits()
2041 i2c_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg-fmp"); in stm32f7_i2c_setup_fm_plus_bits()
2042 if (IS_ERR(i2c_dev->regmap)) in stm32f7_i2c_setup_fm_plus_bits()
2046 ret = of_property_read_u32_index(np, "st,syscfg-fmp", 1, in stm32f7_i2c_setup_fm_plus_bits()
2047 &i2c_dev->fmp_sreg); in stm32f7_i2c_setup_fm_plus_bits()
2051 i2c_dev->fmp_creg = i2c_dev->fmp_sreg + in stm32f7_i2c_setup_fm_plus_bits()
2052 i2c_dev->setup.fmp_clr_offset; in stm32f7_i2c_setup_fm_plus_bits()
2054 return of_property_read_u32_index(np, "st,syscfg-fmp", 2, in stm32f7_i2c_setup_fm_plus_bits()
2055 &i2c_dev->fmp_mask); in stm32f7_i2c_setup_fm_plus_bits()
2060 struct i2c_adapter *adap = &i2c_dev->adap; in stm32f7_i2c_enable_smbus_host()
2061 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_smbus_host()
2068 i2c_dev->host_notify_client = client; in stm32f7_i2c_enable_smbus_host()
2078 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_smbus_host()
2080 if (i2c_dev->host_notify_client) { in stm32f7_i2c_disable_smbus_host()
2084 i2c_free_slave_host_notify_device(i2c_dev->host_notify_client); in stm32f7_i2c_disable_smbus_host()
2091 struct i2c_adapter *adap = &i2c_dev->adap; in stm32f7_i2c_enable_smbus_alert()
2092 struct device *dev = i2c_dev->dev; in stm32f7_i2c_enable_smbus_alert()
2093 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_smbus_alert()
2097 return -ENOMEM; in stm32f7_i2c_enable_smbus_alert()
2099 alert->ara = i2c_new_smbus_alert_device(adap, &alert->setup); in stm32f7_i2c_enable_smbus_alert()
2100 if (IS_ERR(alert->ara)) in stm32f7_i2c_enable_smbus_alert()
2101 return PTR_ERR(alert->ara); in stm32f7_i2c_enable_smbus_alert()
2103 i2c_dev->alert = alert; in stm32f7_i2c_enable_smbus_alert()
2113 struct stm32f7_i2c_alert *alert = i2c_dev->alert; in stm32f7_i2c_disable_smbus_alert()
2114 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_smbus_alert()
2120 i2c_unregister_device(alert->ara); in stm32f7_i2c_disable_smbus_alert()
2135 if (i2c_dev->smbus_mode) in stm32f7_i2c_func()
2160 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in stm32f7_i2c_probe()
2162 return -ENOMEM; in stm32f7_i2c_probe()
2164 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in stm32f7_i2c_probe()
2165 if (IS_ERR(i2c_dev->base)) in stm32f7_i2c_probe()
2166 return PTR_ERR(i2c_dev->base); in stm32f7_i2c_probe()
2167 phy_addr = (dma_addr_t)res->start; in stm32f7_i2c_probe()
2177 i2c_dev->wakeup_src = of_property_read_bool(pdev->dev.of_node, in stm32f7_i2c_probe()
2178 "wakeup-source"); in stm32f7_i2c_probe()
2180 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL); in stm32f7_i2c_probe()
2181 if (IS_ERR(i2c_dev->clk)) in stm32f7_i2c_probe()
2182 return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk), in stm32f7_i2c_probe()
2185 ret = clk_prepare_enable(i2c_dev->clk); in stm32f7_i2c_probe()
2187 dev_err(&pdev->dev, "Failed to prepare_enable clock\n"); in stm32f7_i2c_probe()
2191 rst = devm_reset_control_get(&pdev->dev, NULL); in stm32f7_i2c_probe()
2193 ret = dev_err_probe(&pdev->dev, PTR_ERR(rst), in stm32f7_i2c_probe()
2201 i2c_dev->dev = &pdev->dev; in stm32f7_i2c_probe()
2203 ret = devm_request_threaded_irq(&pdev->dev, irq_event, in stm32f7_i2c_probe()
2207 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2209 dev_err(&pdev->dev, "Failed to request irq event %i\n", in stm32f7_i2c_probe()
2214 ret = devm_request_irq(&pdev->dev, irq_error, stm32f7_i2c_isr_error, 0, in stm32f7_i2c_probe()
2215 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2217 dev_err(&pdev->dev, "Failed to request irq error %i\n", in stm32f7_i2c_probe()
2222 setup = of_device_get_match_data(&pdev->dev); in stm32f7_i2c_probe()
2224 dev_err(&pdev->dev, "Can't get device data\n"); in stm32f7_i2c_probe()
2225 ret = -ENODEV; in stm32f7_i2c_probe()
2228 i2c_dev->setup = *setup; in stm32f7_i2c_probe()
2230 ret = stm32f7_i2c_setup_timing(i2c_dev, &i2c_dev->setup); in stm32f7_i2c_probe()
2235 if (i2c_dev->bus_rate > I2C_MAX_FAST_MODE_FREQ) { in stm32f7_i2c_probe()
2244 adap = &i2c_dev->adap; in stm32f7_i2c_probe()
2246 snprintf(adap->name, sizeof(adap->name), "STM32F7 I2C(%pa)", in stm32f7_i2c_probe()
2247 &res->start); in stm32f7_i2c_probe()
2248 adap->owner = THIS_MODULE; in stm32f7_i2c_probe()
2249 adap->timeout = 2 * HZ; in stm32f7_i2c_probe()
2250 adap->retries = 3; in stm32f7_i2c_probe()
2251 adap->algo = &stm32f7_i2c_algo; in stm32f7_i2c_probe()
2252 adap->dev.parent = &pdev->dev; in stm32f7_i2c_probe()
2253 adap->dev.of_node = pdev->dev.of_node; in stm32f7_i2c_probe()
2255 init_completion(&i2c_dev->complete); in stm32f7_i2c_probe()
2258 i2c_dev->dma = stm32_i2c_dma_request(i2c_dev->dev, phy_addr, in stm32f7_i2c_probe()
2261 if (IS_ERR(i2c_dev->dma)) { in stm32f7_i2c_probe()
2262 ret = PTR_ERR(i2c_dev->dma); in stm32f7_i2c_probe()
2263 /* DMA support is optional, only report other errors */ in stm32f7_i2c_probe()
2264 if (ret != -ENODEV) in stm32f7_i2c_probe()
2266 dev_dbg(i2c_dev->dev, "No DMA option: fallback using interrupts\n"); in stm32f7_i2c_probe()
2267 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2270 if (i2c_dev->wakeup_src) { in stm32f7_i2c_probe()
2271 device_set_wakeup_capable(i2c_dev->dev, true); in stm32f7_i2c_probe()
2273 ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event); in stm32f7_i2c_probe()
2275 dev_err(i2c_dev->dev, "Failed to set wake up irq\n"); in stm32f7_i2c_probe()
2282 pm_runtime_set_autosuspend_delay(i2c_dev->dev, in stm32f7_i2c_probe()
2284 pm_runtime_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2285 pm_runtime_set_active(i2c_dev->dev); in stm32f7_i2c_probe()
2286 pm_runtime_enable(i2c_dev->dev); in stm32f7_i2c_probe()
2288 pm_runtime_get_noresume(&pdev->dev); in stm32f7_i2c_probe()
2292 i2c_dev->smbus_mode = of_property_read_bool(pdev->dev.of_node, "smbus"); in stm32f7_i2c_probe()
2298 if (i2c_dev->smbus_mode) { in stm32f7_i2c_probe()
2301 dev_err(i2c_dev->dev, in stm32f7_i2c_probe()
2302 "failed to enable SMBus Host-Notify protocol (%d)\n", in stm32f7_i2c_probe()
2308 if (of_property_read_bool(pdev->dev.of_node, "smbus-alert")) { in stm32f7_i2c_probe()
2311 dev_err(i2c_dev->dev, in stm32f7_i2c_probe()
2318 dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr); in stm32f7_i2c_probe()
2320 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_probe()
2321 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2332 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_probe()
2333 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_probe()
2334 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_probe()
2335 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2337 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2338 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_probe()
2341 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2342 device_set_wakeup_capable(i2c_dev->dev, false); in stm32f7_i2c_probe()
2344 if (i2c_dev->dma) { in stm32f7_i2c_probe()
2345 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_probe()
2346 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2353 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_probe()
2365 i2c_del_adapter(&i2c_dev->adap); in stm32f7_i2c_remove()
2366 pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_remove()
2368 if (i2c_dev->wakeup_src) { in stm32f7_i2c_remove()
2369 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_remove()
2374 device_init_wakeup(i2c_dev->dev, false); in stm32f7_i2c_remove()
2377 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_remove()
2378 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_remove()
2379 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_remove()
2380 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_remove()
2382 if (i2c_dev->dma) { in stm32f7_i2c_remove()
2383 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_remove()
2384 i2c_dev->dma = NULL; in stm32f7_i2c_remove()
2389 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_remove()
2397 clk_disable(i2c_dev->clk); in stm32f7_i2c_runtime_suspend()
2408 ret = clk_enable(i2c_dev->clk); in stm32f7_i2c_runtime_resume()
2421 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_backup()
2423 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2427 backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_backup()
2428 backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_backup()
2429 backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_backup()
2430 backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_backup()
2431 backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_backup()
2434 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2443 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_restore()
2445 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2449 cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2451 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2454 writel_relaxed(backup_regs->tmgr, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_restore()
2455 writel_relaxed(backup_regs->cr1 & ~STM32F7_I2C_CR1_PE, in stm32f7_i2c_regs_restore()
2456 i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2457 if (backup_regs->cr1 & STM32F7_I2C_CR1_PE) in stm32f7_i2c_regs_restore()
2458 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2460 writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_restore()
2461 writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_restore()
2462 writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_restore()
2465 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2475 i2c_mark_adapter_suspended(&i2c_dev->adap); in stm32f7_i2c_suspend()
2480 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_suspend()
2507 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_resume()
2519 { .compatible = "st,stm32f7-i2c", .data = &stm32f7_setup},
2520 { .compatible = "st,stm32mp15-i2c", .data = &stm32mp15_setup},
2521 { .compatible = "st,stm32mp13-i2c", .data = &stm32mp13_setup},
2528 .name = "stm32f7-i2c",