84 #define I2C_REG_STS(a)	((a)->ioaddr + 0x04)	/* Status reg (RO) */  macro
100 			(ioread32(I2C_REG_STS(data)) & mstatus_active)) {  in wait_timeout()
146 			ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_start()
148 	} else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {  in i2c_pnx_start()
160 	iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,  in i2c_pnx_start()
161 		  I2C_REG_STS(alg_data));  in i2c_pnx_start()
187 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_stop()
194 	       (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {  in i2c_pnx_stop()
201 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_stop()
215 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_xmit()
265 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_xmit()
282 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_rcv()
287 	if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {  in i2c_pnx_master_rcv()
348 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_rcv()
361 		ioread32(I2C_REG_STS(alg_data)),  in i2c_pnx_interrupt()
364 	stat = ioread32(I2C_REG_STS(alg_data));  in i2c_pnx_interrupt()
415 	stat = ioread32(I2C_REG_STS(alg_data));  in i2c_pnx_interrupt()
416 	iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));  in i2c_pnx_interrupt()
420 		 __func__, ioread32(I2C_REG_STS(alg_data)),  in i2c_pnx_interrupt()
432 		ioread32(I2C_REG_STS(alg_data)),  in i2c_pnx_timeout()
450 	if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {  in bus_reset_if_active()
490 		__func__, num, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_xfer()
547 		if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {  in i2c_pnx_xfer()
551 			iowrite32(stat, I2C_REG_STS(alg_data));  in i2c_pnx_xfer()
553 		if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {  in i2c_pnx_xfer()
557 			iowrite32(stat, I2C_REG_STS(alg_data));  in i2c_pnx_xfer()
569 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_xfer()