297 	 * bus is busy. It will be changed to 1 on the next IP FCLK clock.  in __omap_i2c_init()
355 	struct clk *fclk;  in omap_i2c_init()  local
374 		fclk = clk_get(omap->dev, "fck");  in omap_i2c_init()
375 		if (IS_ERR(fclk)) {  in omap_i2c_init()
376 			error = PTR_ERR(fclk);  in omap_i2c_init()
382 		fclk_rate = clk_get_rate(fclk);  in omap_i2c_init()
383 		clk_put(fclk);  in omap_i2c_init()
404 		 * The filter is iclk (fclk for HS) period.  in omap_i2c_init()
413 		fclk = clk_get(omap->dev, "fck");  in omap_i2c_init()
414 		if (IS_ERR(fclk)) {  in omap_i2c_init()
415 			error = PTR_ERR(fclk);  in omap_i2c_init()
420 		fclk_rate = clk_get_rate(fclk) / 1000;  in omap_i2c_init()
421 		clk_put(fclk);  in omap_i2c_init()
532  * BB bit became valid on the next FCLK clock after CON_EN bit set