Lines Matching +full:i2c +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
3 * This is a combined i2c adapter and algorithm driver for the
5 * the same I2C unit (8240, 8245, 85xx).
7 * Copyright (C) 2003-2004 Humboldt Solutions Ltd, adrian@humboldt.co.uk
25 #include <linux/i2c.h>
33 #define DRV_NAME "mpc-i2c"
35 #define MPC_I2C_CLOCK_LEGACY 0
36 #define MPC_I2C_CLOCK_PRESERVE (~0U)
38 #define MPC_I2C_FDR 0x04
39 #define MPC_I2C_CR 0x08
40 #define MPC_I2C_SR 0x0c
41 #define MPC_I2C_DR 0x10
42 #define MPC_I2C_DFSRR 0x14
44 #define CCR_MEN 0x80
45 #define CCR_MIEN 0x40
46 #define CCR_MSTA 0x20
47 #define CCR_MTX 0x10
48 #define CCR_TXAK 0x08
49 #define CCR_RSTA 0x04
50 #define CCR_RSVD 0x02
52 #define CSR_MCF 0x80
53 #define CSR_MAAS 0x40
54 #define CSR_MBB 0x20
55 #define CSR_MAL 0x10
56 #define CSR_SRW 0x04
57 #define CSR_MIF 0x02
58 #define CSR_RXAK 0x01
112 void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);
115 static inline void writeccr(struct mpc_i2c *i2c, u32 x) in writeccr() argument
117 writeb(x, i2c->base + MPC_I2C_CR); in writeccr()
125 static void mpc_i2c_fixup(struct mpc_i2c *i2c) in mpc_i2c_fixup() argument
130 for (k = 9; k; k--) { in mpc_i2c_fixup()
131 writeccr(i2c, 0); in mpc_i2c_fixup()
132 writeb(0, i2c->base + MPC_I2C_SR); /* clear any status bits */ in mpc_i2c_fixup()
133 writeccr(i2c, CCR_MEN | CCR_MSTA); /* START */ in mpc_i2c_fixup()
134 readb(i2c->base + MPC_I2C_DR); /* init xfer */ in mpc_i2c_fixup()
137 writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSTA); /* delay SDA */ in mpc_i2c_fixup()
138 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
143 writeccr(i2c, CCR_MEN); /* Initiate STOP */ in mpc_i2c_fixup()
144 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
146 writeccr(i2c, 0); in mpc_i2c_fixup()
149 static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask) in i2c_mpc_wait_sr() argument
151 void __iomem *addr = i2c->base + MPC_I2C_SR; in i2c_mpc_wait_sr()
154 return readb_poll_timeout(addr, val, val & mask, 0, 100); in i2c_mpc_wait_sr()
161 * 2. I2CCR - a0h
165 * 5. I2CCR - 00h
166 * 6. I2CCR - 22h
167 * 7. I2CCR - a2h
171 * 11. I2CCR - 82h
175 * 15. I2CCR - 80h
177 static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c) in mpc_i2c_fixup_A004447() argument
182 writeccr(i2c, CCR_MEN | CCR_MSTA); in mpc_i2c_fixup_A004447()
183 ret = i2c_mpc_wait_sr(i2c, CSR_MBB); in mpc_i2c_fixup_A004447()
185 dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); in mpc_i2c_fixup_A004447()
189 val = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_fixup_A004447()
192 writeccr(i2c, 0x00); in mpc_i2c_fixup_A004447()
193 writeccr(i2c, CCR_MSTA | CCR_RSVD); in mpc_i2c_fixup_A004447()
194 writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD); in mpc_i2c_fixup_A004447()
195 ret = i2c_mpc_wait_sr(i2c, CSR_MBB); in mpc_i2c_fixup_A004447()
197 dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); in mpc_i2c_fixup_A004447()
200 val = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup_A004447()
201 ret = i2c_mpc_wait_sr(i2c, CSR_MIF); in mpc_i2c_fixup_A004447()
203 dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); in mpc_i2c_fixup_A004447()
206 writeccr(i2c, CCR_MEN | CCR_RSVD); in mpc_i2c_fixup_A004447()
208 val = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup_A004447()
209 ret = i2c_mpc_wait_sr(i2c, CSR_MIF); in mpc_i2c_fixup_A004447()
211 dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); in mpc_i2c_fixup_A004447()
214 writeccr(i2c, CCR_MEN); in mpc_i2c_fixup_A004447()
220 {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
221 {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
222 {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
223 {52, 0x63}, {56, 0x29}, {60, 0x41}, {64, 0x2a},
224 {68, 0x07}, {72, 0x2b}, {80, 0x2c}, {88, 0x09},
225 {96, 0x2d}, {104, 0x0a}, {112, 0x2e}, {120, 0x81},
226 {128, 0x2f}, {136, 0x47}, {144, 0x0c}, {160, 0x30},
227 {176, 0x49}, {192, 0x31}, {208, 0x4a}, {224, 0x32},
228 {240, 0x0f}, {256, 0x33}, {272, 0x87}, {288, 0x10},
229 {320, 0x34}, {352, 0x89}, {384, 0x35}, {416, 0x8a},
230 {448, 0x36}, {480, 0x13}, {512, 0x37}, {576, 0x14},
231 {640, 0x38}, {768, 0x39}, {896, 0x3a}, {960, 0x17},
232 {1024, 0x3b}, {1152, 0x18}, {1280, 0x3c}, {1536, 0x3d},
233 {1792, 0x3e}, {1920, 0x1b}, {2048, 0x3f}, {2304, 0x1c},
234 {2560, 0x1d}, {3072, 0x1e}, {3584, 0x7e}, {3840, 0x1f},
235 {4096, 0x7f}, {4608, 0x5c}, {5120, 0x5d}, {6144, 0x5e},
236 {7168, 0xbe}, {7680, 0x5f}, {8192, 0xbf}, {9216, 0x9c},
237 {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
250 /* see below - default fdr = 0x3f -> div = 2048 */ in mpc_i2c_get_fdr_52xx()
252 return -EINVAL; in mpc_i2c_get_fdr_52xx()
259 * We want to choose an FDR/DFSR that generates an I2C bus speed that in mpc_i2c_get_fdr_52xx()
262 for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_52xx); i++) { in mpc_i2c_get_fdr_52xx()
265 if (div->fdr & 0xc0 && pvr == 0x80822011) in mpc_i2c_get_fdr_52xx()
267 if (div->divider >= divider) in mpc_i2c_get_fdr_52xx()
271 *real_clk = mpc5xxx_fwnode_get_bus_frequency(fwnode) / div->divider; in mpc_i2c_get_fdr_52xx()
272 return (int)div->fdr; in mpc_i2c_get_fdr_52xx()
276 struct mpc_i2c *i2c, in mpc_i2c_setup_52xx() argument
282 dev_dbg(i2c->dev, "using fdr %d\n", in mpc_i2c_setup_52xx()
283 readb(i2c->base + MPC_I2C_FDR)); in mpc_i2c_setup_52xx()
287 ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk); in mpc_i2c_setup_52xx()
288 fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */ in mpc_i2c_setup_52xx()
290 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); in mpc_i2c_setup_52xx()
292 if (ret >= 0) in mpc_i2c_setup_52xx()
293 dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk, in mpc_i2c_setup_52xx()
298 struct mpc_i2c *i2c, in mpc_i2c_setup_52xx() argument
306 struct mpc_i2c *i2c, in mpc_i2c_setup_512x() argument
313 /* Enable I2C interrupts for mpc5121 */ in mpc_i2c_setup_512x()
315 "fsl,mpc5121-i2c-ctrl"); in mpc_i2c_setup_512x()
317 ctrl = of_iomap(node_ctrl, 0); in mpc_i2c_setup_512x()
320 /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */ in mpc_i2c_setup_512x()
321 of_property_read_reg(node, 0, &addr, NULL); in mpc_i2c_setup_512x()
322 idx = (addr & 0xff) / 0x20; in mpc_i2c_setup_512x()
330 mpc_i2c_setup_52xx(node, i2c, clock); in mpc_i2c_setup_512x()
334 struct mpc_i2c *i2c, in mpc_i2c_setup_512x() argument
342 {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
343 {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
344 {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
345 {544, 0x0b03}, {576, 0x0104}, {608, 0x1603}, {640, 0x0105},
346 {672, 0x2003}, {704, 0x0b05}, {736, 0x2b03}, {768, 0x0106},
347 {800, 0x3603}, {832, 0x0b06}, {896, 0x012a}, {960, 0x0107},
348 {1024, 0x012b}, {1088, 0x1607}, {1152, 0x0108}, {1216, 0x2b07},
349 {1280, 0x0109}, {1408, 0x1609}, {1536, 0x010a}, {1664, 0x160a},
350 {1792, 0x012e}, {1920, 0x010b}, {2048, 0x012f}, {2176, 0x2b0b},
351 {2304, 0x010c}, {2560, 0x010d}, {2816, 0x2b0d}, {3072, 0x010e},
352 {3328, 0x2b0e}, {3584, 0x0132}, {3840, 0x010f}, {4096, 0x0133},
353 {4608, 0x0110}, {5120, 0x0111}, {6144, 0x0112}, {7168, 0x0136},
354 {7680, 0x0113}, {8192, 0x0137}, {9216, 0x0114}, {10240, 0x0115},
355 {12288, 0x0116}, {14336, 0x013a}, {15360, 0x0117}, {16384, 0x013b},
356 {18432, 0x0118}, {20480, 0x0119}, {24576, 0x011a}, {28672, 0x013e},
357 {30720, 0x011b}, {32768, 0x013f}, {36864, 0x011c}, {40960, 0x011d},
358 {49152, 0x011e}, {61440, 0x011f}
365 u32 val = 0; in mpc_i2c_get_sec_cfg_8xxx()
367 node = of_find_node_by_name(NULL, "global-utilities"); in mpc_i2c_get_sec_cfg_8xxx()
373 * (PORDEVSR2) at 0xE0014. Note than while MPC8533 in mpc_i2c_get_sec_cfg_8xxx()
379 reg = ioremap(get_immrbase() + *prop + 0x14, 0x4); in mpc_i2c_get_sec_cfg_8xxx()
384 val = in_be32(reg) & 0x00000020; /* sec-cfg */ in mpc_i2c_get_sec_cfg_8xxx()
397 * may have prescaler 1, 2, or 3, depending on the power-on in mpc_i2c_get_prescaler_8xxx()
437 /* see below - default fdr = 0x1031 -> div = 16 * 3072 */ in mpc_i2c_get_fdr_8xxx()
439 return -EINVAL; in mpc_i2c_get_fdr_8xxx()
444 pr_debug("I2C: src_clock=%d clock=%d divider=%d\n", in mpc_i2c_get_fdr_8xxx()
448 * We want to choose an FDR/DFSR that generates an I2C bus speed that in mpc_i2c_get_fdr_8xxx()
451 for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_8xxx); i++) { in mpc_i2c_get_fdr_8xxx()
453 if (div->divider >= divider) in mpc_i2c_get_fdr_8xxx()
457 *real_clk = fsl_get_sys_freq() / prescaler / div->divider; in mpc_i2c_get_fdr_8xxx()
458 return (int)div->fdr; in mpc_i2c_get_fdr_8xxx()
462 struct mpc_i2c *i2c, in mpc_i2c_setup_8xxx() argument
468 dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n", in mpc_i2c_setup_8xxx()
469 readb(i2c->base + MPC_I2C_DFSRR), in mpc_i2c_setup_8xxx()
470 readb(i2c->base + MPC_I2C_FDR)); in mpc_i2c_setup_8xxx()
474 ret = mpc_i2c_get_fdr_8xxx(node, clock, &i2c->real_clk); in mpc_i2c_setup_8xxx()
475 fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */ in mpc_i2c_setup_8xxx()
477 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); in mpc_i2c_setup_8xxx()
478 writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR); in mpc_i2c_setup_8xxx()
480 if (ret >= 0) in mpc_i2c_setup_8xxx()
481 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n", in mpc_i2c_setup_8xxx()
482 i2c->real_clk, fdr >> 8, fdr & 0xff); in mpc_i2c_setup_8xxx()
487 struct mpc_i2c *i2c, in mpc_i2c_setup_8xxx() argument
493 static void mpc_i2c_finish(struct mpc_i2c *i2c, int rc) in mpc_i2c_finish() argument
495 i2c->rc = rc; in mpc_i2c_finish()
496 i2c->block = 0; in mpc_i2c_finish()
497 i2c->cntl_bits = CCR_MEN; in mpc_i2c_finish()
498 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_finish()
499 wake_up(&i2c->waitq); in mpc_i2c_finish()
502 static void mpc_i2c_do_action(struct mpc_i2c *i2c) in mpc_i2c_do_action() argument
505 int dir = 0; in mpc_i2c_do_action()
506 int recv_len = 0; in mpc_i2c_do_action()
509 dev_dbg(i2c->dev, "action = %s\n", action_str[i2c->action]); in mpc_i2c_do_action()
511 i2c->cntl_bits &= ~(CCR_RSTA | CCR_MTX | CCR_TXAK); in mpc_i2c_do_action()
513 if (i2c->action != MPC_I2C_ACTION_STOP) { in mpc_i2c_do_action()
514 msg = &i2c->msgs[i2c->curr_msg]; in mpc_i2c_do_action()
515 if (msg->flags & I2C_M_RD) in mpc_i2c_do_action()
517 if (msg->flags & I2C_M_RECV_LEN) in mpc_i2c_do_action()
521 switch (i2c->action) { in mpc_i2c_do_action()
523 i2c->cntl_bits |= CCR_RSTA; in mpc_i2c_do_action()
527 i2c->cntl_bits |= CCR_MSTA | CCR_MTX; in mpc_i2c_do_action()
528 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
529 writeb((msg->addr << 1) | dir, i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
530 i2c->expect_rxack = 1; in mpc_i2c_do_action()
531 i2c->action = dir ? MPC_I2C_ACTION_READ_BEGIN : MPC_I2C_ACTION_WRITE; in mpc_i2c_do_action()
535 if (msg->len) { in mpc_i2c_do_action()
536 if (msg->len == 1 && !(msg->flags & I2C_M_RECV_LEN)) in mpc_i2c_do_action()
537 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
539 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
541 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
543 i2c->action = MPC_I2C_ACTION_READ_BYTE; in mpc_i2c_do_action()
547 if (i2c->byte_posn || !recv_len) { in mpc_i2c_do_action()
549 if (i2c->byte_posn == msg->len - 2) in mpc_i2c_do_action()
550 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
552 if (i2c->byte_posn == msg->len - 1) in mpc_i2c_do_action()
553 i2c->cntl_bits |= CCR_MTX; in mpc_i2c_do_action()
555 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
558 byte = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
560 if (i2c->byte_posn == 0 && recv_len) { in mpc_i2c_do_action()
561 if (byte == 0 || byte > I2C_SMBUS_BLOCK_MAX) { in mpc_i2c_do_action()
562 mpc_i2c_finish(i2c, -EPROTO); in mpc_i2c_do_action()
565 msg->len += byte; in mpc_i2c_do_action()
570 if (msg->len == 2) { in mpc_i2c_do_action()
571 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
572 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
576 dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], byte); in mpc_i2c_do_action()
577 msg->buf[i2c->byte_posn++] = byte; in mpc_i2c_do_action()
581 dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], in mpc_i2c_do_action()
582 msg->buf[i2c->byte_posn]); in mpc_i2c_do_action()
583 writeb(msg->buf[i2c->byte_posn++], i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
584 i2c->expect_rxack = 1; in mpc_i2c_do_action()
588 mpc_i2c_finish(i2c, 0); in mpc_i2c_do_action()
592 WARN(1, "Unexpected action %d\n", i2c->action); in mpc_i2c_do_action()
596 if (msg && msg->len == i2c->byte_posn) { in mpc_i2c_do_action()
597 i2c->curr_msg++; in mpc_i2c_do_action()
598 i2c->byte_posn = 0; in mpc_i2c_do_action()
600 if (i2c->curr_msg == i2c->num_msgs) { in mpc_i2c_do_action()
601 i2c->action = MPC_I2C_ACTION_STOP; in mpc_i2c_do_action()
607 mpc_i2c_finish(i2c, 0); in mpc_i2c_do_action()
609 i2c->action = MPC_I2C_ACTION_RESTART; in mpc_i2c_do_action()
614 static void mpc_i2c_do_intr(struct mpc_i2c *i2c, u8 status) in mpc_i2c_do_intr() argument
616 spin_lock(&i2c->lock); in mpc_i2c_do_intr()
619 dev_dbg(i2c->dev, "unfinished\n"); in mpc_i2c_do_intr()
620 mpc_i2c_finish(i2c, -EIO); in mpc_i2c_do_intr()
625 dev_dbg(i2c->dev, "arbitration lost\n"); in mpc_i2c_do_intr()
626 mpc_i2c_finish(i2c, -EAGAIN); in mpc_i2c_do_intr()
630 if (i2c->expect_rxack && (status & CSR_RXAK)) { in mpc_i2c_do_intr()
631 dev_dbg(i2c->dev, "no Rx ACK\n"); in mpc_i2c_do_intr()
632 mpc_i2c_finish(i2c, -ENXIO); in mpc_i2c_do_intr()
635 i2c->expect_rxack = 0; in mpc_i2c_do_intr()
637 mpc_i2c_do_action(i2c); in mpc_i2c_do_intr()
640 spin_unlock(&i2c->lock); in mpc_i2c_do_intr()
645 struct mpc_i2c *i2c = dev_id; in mpc_i2c_isr() local
648 status = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_isr()
651 readb_poll_timeout_atomic(i2c->base + MPC_I2C_SR, status, status & CSR_MCF, 0, 100); in mpc_i2c_isr()
652 writeb(0, i2c->base + MPC_I2C_SR); in mpc_i2c_isr()
653 mpc_i2c_do_intr(i2c, status); in mpc_i2c_isr()
659 static int mpc_i2c_wait_for_completion(struct mpc_i2c *i2c) in mpc_i2c_wait_for_completion() argument
663 time_left = wait_event_timeout(i2c->waitq, !i2c->block, i2c->adap.timeout); in mpc_i2c_wait_for_completion()
665 return -ETIMEDOUT; in mpc_i2c_wait_for_completion()
666 if (time_left < 0) in mpc_i2c_wait_for_completion()
669 return 0; in mpc_i2c_wait_for_completion()
672 static int mpc_i2c_execute_msg(struct mpc_i2c *i2c) in mpc_i2c_execute_msg() argument
678 spin_lock_irqsave(&i2c->lock, flags); in mpc_i2c_execute_msg()
680 i2c->curr_msg = 0; in mpc_i2c_execute_msg()
681 i2c->rc = 0; in mpc_i2c_execute_msg()
682 i2c->byte_posn = 0; in mpc_i2c_execute_msg()
683 i2c->block = 1; in mpc_i2c_execute_msg()
684 i2c->action = MPC_I2C_ACTION_START; in mpc_i2c_execute_msg()
686 i2c->cntl_bits = CCR_MEN | CCR_MIEN; in mpc_i2c_execute_msg()
687 writeb(0, i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
688 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_execute_msg()
690 mpc_i2c_do_action(i2c); in mpc_i2c_execute_msg()
692 spin_unlock_irqrestore(&i2c->lock, flags); in mpc_i2c_execute_msg()
694 ret = mpc_i2c_wait_for_completion(i2c); in mpc_i2c_execute_msg()
696 i2c->rc = ret; in mpc_i2c_execute_msg()
698 if (i2c->rc == -EIO || i2c->rc == -EAGAIN || i2c->rc == -ETIMEDOUT) in mpc_i2c_execute_msg()
699 i2c_recover_bus(&i2c->adap); in mpc_i2c_execute_msg()
703 while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) { in mpc_i2c_execute_msg()
705 u8 status = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
707 dev_dbg(i2c->dev, "timeout\n"); in mpc_i2c_execute_msg()
708 if ((status & (CSR_MCF | CSR_MBB | CSR_RXAK)) != 0) { in mpc_i2c_execute_msg()
710 i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
711 i2c_recover_bus(&i2c->adap); in mpc_i2c_execute_msg()
713 return -EIO; in mpc_i2c_execute_msg()
718 return i2c->rc; in mpc_i2c_execute_msg()
724 struct mpc_i2c *i2c = i2c_get_adapdata(adap); in mpc_xfer() local
727 dev_dbg(i2c->dev, "num = %d\n", num); in mpc_xfer()
728 for (i = 0; i < num; i++) in mpc_xfer()
729 dev_dbg(i2c->dev, " addr = %02x, flags = %02x, len = %d, %*ph\n", in mpc_xfer()
731 msgs[i].flags & I2C_M_RD ? 0 : msgs[i].len, in mpc_xfer()
734 WARN_ON(i2c->msgs != NULL); in mpc_xfer()
735 i2c->msgs = msgs; in mpc_xfer()
736 i2c->num_msgs = num; in mpc_xfer()
738 rc = mpc_i2c_execute_msg(i2c); in mpc_xfer()
739 if (rc < 0) in mpc_xfer()
742 i2c->num_msgs = 0; in mpc_xfer()
743 i2c->msgs = NULL; in mpc_xfer()
756 struct mpc_i2c *i2c = i2c_get_adapdata(adap); in fsl_i2c_bus_recovery() local
758 if (i2c->has_errata_A004447) in fsl_i2c_bus_recovery()
759 mpc_i2c_fixup_A004447(i2c); in fsl_i2c_bus_recovery()
761 mpc_i2c_fixup(i2c); in fsl_i2c_bus_recovery()
763 return 0; in fsl_i2c_bus_recovery()
783 struct mpc_i2c *i2c; in fsl_i2c_probe() local
789 i2c = devm_kzalloc(&op->dev, sizeof(*i2c), GFP_KERNEL); in fsl_i2c_probe()
790 if (!i2c) in fsl_i2c_probe()
791 return -ENOMEM; in fsl_i2c_probe()
793 i2c->dev = &op->dev; /* for debug and error output */ in fsl_i2c_probe()
795 init_waitqueue_head(&i2c->waitq); in fsl_i2c_probe()
796 spin_lock_init(&i2c->lock); in fsl_i2c_probe()
798 i2c->base = devm_platform_ioremap_resource(op, 0); in fsl_i2c_probe()
799 if (IS_ERR(i2c->base)) in fsl_i2c_probe()
800 return PTR_ERR(i2c->base); in fsl_i2c_probe()
802 i2c->irq = platform_get_irq(op, 0); in fsl_i2c_probe()
803 if (i2c->irq < 0) in fsl_i2c_probe()
804 return i2c->irq; in fsl_i2c_probe()
806 result = devm_request_irq(&op->dev, i2c->irq, mpc_i2c_isr, in fsl_i2c_probe()
807 IRQF_SHARED, "i2c-mpc", i2c); in fsl_i2c_probe()
808 if (result < 0) { in fsl_i2c_probe()
809 dev_err(i2c->dev, "failed to attach interrupt\n"); in fsl_i2c_probe()
814 * enable clock for the I2C peripheral (non fatal), in fsl_i2c_probe()
817 clk = devm_clk_get_optional(&op->dev, NULL); in fsl_i2c_probe()
823 dev_err(&op->dev, "failed to enable clock\n"); in fsl_i2c_probe()
827 i2c->clk_per = clk; in fsl_i2c_probe()
829 if (of_property_read_bool(op->dev.of_node, "fsl,preserve-clocking")) { in fsl_i2c_probe()
832 result = of_property_read_u32(op->dev.of_node, in fsl_i2c_probe()
833 "clock-frequency", &clock); in fsl_i2c_probe()
838 data = device_get_match_data(&op->dev); in fsl_i2c_probe()
840 data->setup(op->dev.of_node, i2c, clock); in fsl_i2c_probe()
843 if (of_property_read_bool(op->dev.of_node, "dfsrr")) in fsl_i2c_probe()
844 mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock); in fsl_i2c_probe()
850 * "i2c-scl-clk-low-timeout-us" is not present. in fsl_i2c_probe()
852 result = of_property_read_u32(op->dev.of_node, in fsl_i2c_probe()
853 "i2c-scl-clk-low-timeout-us", in fsl_i2c_probe()
855 if (result == -EINVAL) in fsl_i2c_probe()
856 result = of_property_read_u32(op->dev.of_node, in fsl_i2c_probe()
867 dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ); in fsl_i2c_probe()
869 if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447")) in fsl_i2c_probe()
870 i2c->has_errata_A004447 = true; in fsl_i2c_probe()
872 i2c->adap = mpc_ops; in fsl_i2c_probe()
873 scnprintf(i2c->adap.name, sizeof(i2c->adap.name), in fsl_i2c_probe()
874 "MPC adapter (%s)", of_node_full_name(op->dev.of_node)); in fsl_i2c_probe()
875 i2c->adap.dev.parent = &op->dev; in fsl_i2c_probe()
876 i2c->adap.nr = op->id; in fsl_i2c_probe()
877 i2c->adap.dev.of_node = of_node_get(op->dev.of_node); in fsl_i2c_probe()
878 i2c->adap.bus_recovery_info = &fsl_i2c_recovery_info; in fsl_i2c_probe()
879 platform_set_drvdata(op, i2c); in fsl_i2c_probe()
880 i2c_set_adapdata(&i2c->adap, i2c); in fsl_i2c_probe()
882 result = i2c_add_numbered_adapter(&i2c->adap); in fsl_i2c_probe()
886 return 0; in fsl_i2c_probe()
889 clk_disable_unprepare(i2c->clk_per); in fsl_i2c_probe()
896 struct mpc_i2c *i2c = platform_get_drvdata(op); in fsl_i2c_remove() local
898 i2c_del_adapter(&i2c->adap); in fsl_i2c_remove()
900 clk_disable_unprepare(i2c->clk_per); in fsl_i2c_remove()
905 struct mpc_i2c *i2c = dev_get_drvdata(dev); in mpc_i2c_suspend() local
907 i2c->fdr = readb(i2c->base + MPC_I2C_FDR); in mpc_i2c_suspend()
908 i2c->dfsrr = readb(i2c->base + MPC_I2C_DFSRR); in mpc_i2c_suspend()
910 return 0; in mpc_i2c_suspend()
915 struct mpc_i2c *i2c = dev_get_drvdata(dev); in mpc_i2c_resume() local
917 writeb(i2c->fdr, i2c->base + MPC_I2C_FDR); in mpc_i2c_resume()
918 writeb(i2c->dfsrr, i2c->base + MPC_I2C_DFSRR); in mpc_i2c_resume()
920 return 0; in mpc_i2c_resume()
945 {.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
946 {.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
947 {.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
948 {.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
949 {.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
950 {.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
951 {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
953 {.compatible = "fsl-i2c", },
972 MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "