329 	void __iomem *i2c_base;  member
336 	void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG;  in set_sys_lock()
349 	void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG;  in release_sys_lock()
366 	writew(intr_msk, i2c->i2c_base + SMBUS_GEN_INT_STAT_REG_OFF);  in pci1xxxx_ack_high_level_intr()
372 	void __iomem *p = i2c->i2c_base + SMBALERT_MST_PAD_CTRL_REG_OFF;  in pci1xxxx_i2c_configure_smbalert_pin()
387 	void __iomem *p = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_send_start_stop()
414 	writeb(regval, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF);  in pci1xxxx_i2c_set_clear_FW_ACK()
420 	void __iomem *p = i2c->i2c_base + SMBUS_MST_BUF;  in pci1xxxx_i2c_buffer_write()
436 	writeb(SMB_CORE_CTRL_ESO, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF);  in pci1xxxx_i2c_enable_ESO()
441 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_reset_counters()
451 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_set_transfer_dir()
465 	writeb(count, i2c->i2c_base + SMBUS_MCU_COUNTER_REG_OFF);  in pci1xxxx_i2c_set_mcu_count()
470 	writeb(readcount, i2c->i2c_base + SMB_CORE_CMD_REG_OFF3);  in pci1xxxx_i2c_set_read_count()
475 	writeb(writecount, i2c->i2c_base + SMB_CORE_CMD_REG_OFF2);  in pci1xxxx_i2c_set_write_count()
480 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_set_DMA_run()
490 	void __iomem *p = i2c->i2c_base + SMB_CORE_CMD_REG_OFF0;  in pci1xxxx_i2c_set_mrun_proceed()
507 	void __iomem *p = i2c->i2c_base + SMB_CORE_CONFIG_REG1;  in pci1xxxx_i2c_config_asr()
521 	void __iomem *p1 = i2c->i2c_base + SMBUS_GEN_INT_STAT_REG_OFF;  in pci1xxxx_i2c_isr()
522 	void __iomem *p2 = i2c->i2c_base + SMBUS_INTR_STAT_REG_OFF;  in pci1xxxx_i2c_isr()
561 	void __iomem *p = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_set_readm()
575 	writeb(ack_intr_msk, i2c->i2c_base + SMBUS_INTR_STAT_REG_OFF);  in pci1xxxx_ack_nw_layer_intr()
581 	void __iomem *p = i2c->i2c_base + SMBUS_INTR_MSK_REG_OFF;  in pci1xxxx_config_nw_layer_intr()
595 	void __iomem *p1 = i2c->i2c_base + I2C_SCL_PAD_CTRL_REG_OFF;  in pci1xxxx_i2c_config_padctrl()
596 	void __iomem *p2 = i2c->i2c_base + I2C_SDA_PAD_CTRL_REG_OFF;  in pci1xxxx_i2c_config_padctrl()
618 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_set_mode()
633 	void __iomem *p = i2c->i2c_base + SMBUS_GEN_INT_MASK_REG_OFF;  in pci1xxxx_i2c_config_high_level_intr()
646 	void __iomem *p1 = i2c->i2c_base + SMB_CORE_CONFIG_REG1;  in pci1xxxx_i2c_configure_core_reg()
647 	void __iomem *p3 = i2c->i2c_base + SMB_CORE_CONFIG_REG3;  in pci1xxxx_i2c_configure_core_reg()
667 	void __iomem *bp = i2c->i2c_base;  in pci1xxxx_i2c_set_freq()
708 	void __iomem *p2 = i2c->i2c_base + SMBUS_STATUS_REG_OFF;  in pci1xxxx_i2c_init()
709 	void __iomem *p1 = i2c->i2c_base + SMB_GPR_REG;  in pci1xxxx_i2c_init()
772 	writeb(regval, i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3);  in pci1xxxx_i2c_clear_flags()
781 	void __iomem *p2 = i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3;  in pci1xxxx_i2c_read()
782 	void __iomem *p1 = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_read()
783 	void __iomem *p3 = i2c->i2c_base + SMBUS_MST_BUF;  in pci1xxxx_i2c_read()
902 	void __iomem *p2 = i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3;  in pci1xxxx_i2c_write()
903 	void __iomem *p1 = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_write()
1069 	void __iomem *p = i2c->i2c_base + SMBUS_RESET_REG;  in pci1xxxx_i2c_suspend()
1102 	void __iomem *p1 = i2c->i2c_base + SMBUS_GEN_INT_STAT_REG_OFF;  in pci1xxxx_i2c_resume()
1103 	void __iomem *p2 = i2c->i2c_base + SMBUS_RESET_REG;  in pci1xxxx_i2c_resume()
1157 	i2c->i2c_base =	pcim_iomap_table(pdev)[0];  in pci1xxxx_i2c_probe_pci()