Lines Matching +full:i2c +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C adapter for the IMG Serial Control Bus (SCB) IP block.
7 * There are three ways that this I2C controller can be driven:
9 * - Raw control of the SDA and SCK signals.
15 * - Atomic commands. A low level I2C symbol (such as generate
20 * This mode of operation is used by MODE_ATOMIC, which uses an I2C
21 * state machine in the interrupt handler to compose/react to I2C
26 * in suboptimal use of the bus, with gaps between the I2C symbols while
29 * - Automatic mode. A bus address, and whether to read/write is
30 * specified, and the hardware takes care of the I2C state machine,
31 * using a FIFO to send/receive bytes of data to an I2C slave. The
36 * with control of repeated start bits between I2C messages.
40 * no wasted time between I2C symbols or I2C messages.
52 * Notice that the driver implements a timer-based timeout mechanism.
61 * In practice, normal I2C transactions will be complete well before you
62 * get the timer interrupt, as the timer is re-scheduled during FIFO
74 #include <linux/i2c.h>
88 #define SCB_STATUS_REG 0x00
89 #define SCB_OVERRIDE_REG 0x04
90 #define SCB_READ_ADDR_REG 0x08
91 #define SCB_READ_COUNT_REG 0x0c
92 #define SCB_WRITE_ADDR_REG 0x10
93 #define SCB_READ_DATA_REG 0x14
94 #define SCB_WRITE_DATA_REG 0x18
95 #define SCB_FIFO_STATUS_REG 0x1c
96 #define SCB_CONTROL_SOFT_RESET 0x1f
97 #define SCB_CLK_SET_REG 0x3c
98 #define SCB_INT_STATUS_REG 0x40
99 #define SCB_INT_CLEAR_REG 0x44
100 #define SCB_INT_MASK_REG 0x48
101 #define SCB_CONTROL_REG 0x4c
102 #define SCB_TIME_TPL_REG 0x50
103 #define SCB_TIME_TPH_REG 0x54
104 #define SCB_TIME_TP2S_REG 0x58
105 #define SCB_TIME_TBI_REG 0x60
106 #define SCB_TIME_TSL_REG 0x64
107 #define SCB_TIME_TDL_REG 0x68
108 #define SCB_TIME_TSDL_REG 0x6c
109 #define SCB_TIME_TSDH_REG 0x70
110 #define SCB_READ_XADDR_REG 0x74
111 #define SCB_WRITE_XADDR_REG 0x78
112 #define SCB_WRITE_COUNT_REG 0x7c
113 #define SCB_CORE_REV_REG 0x80
114 #define SCB_TIME_TCKH_REG 0x84
115 #define SCB_TIME_TCKL_REG 0x88
116 #define SCB_FIFO_FLUSH_REG 0x8c
117 #define SCB_READ_FIFO_REG 0x94
118 #define SCB_CLEAR_REG 0x98
122 #define SCB_CONTROL_CLK_ENABLE 0x1e0
123 #define SCB_CONTROL_TRANSACTION_HALT 0x200
125 #define FIFO_READ_FULL BIT(0)
133 #define SCB_FILT_INC_MASK 0x7f
135 #define SCB_INC_MASK 0x7f
140 #define INT_BUS_INACTIVE BIT(0)
159 #define INT_LEVEL 0x01e00
162 #define INT_ENABLE_MASK_INACTIVE 0x00000
188 #define LINESTAT_SCLK_LINE_STATUS BIT(0)
208 #define LINESTAT_INPUT_DATA 0xff000000
212 #define LINESTAT_LATCHED (0x3f << LINESTAT_CLEAR_SHIFT)
216 #define OVERRIDE_SCLK_OVR BIT(0)
224 #define OVERRIDE_CMD_MASK 0x1f
240 #define CMD_PAUSE 0x00
241 #define CMD_GEN_DATA 0x01
242 #define CMD_GEN_START 0x02
243 #define CMD_GEN_STOP 0x03
244 #define CMD_GEN_ACK 0x04
245 #define CMD_GEN_NACK 0x05
246 #define CMD_RET_DATA 0x08
247 #define CMD_RET_ACK 0x09
251 #define TIMEOUT_TBI 0x0
252 #define TIMEOUT_TSL 0xffff
253 #define TIMEOUT_TDL 0x0
262 * in the middle of the valid range (0-127).
277 #define ISR_STATUS_M 0x0000ffff /* contains +ve errno */
294 /* Timing parameters for i2c modes (in ns) */
332 CMD_GEN_DATA, 0xff,
336 0 };
339 0 };
348 [MODE_FATAL] = 0,
350 [MODE_SUSPEND] = 0,
414 static void img_i2c_writel(struct img_i2c *i2c, u32 offset, u32 value) in img_i2c_writel() argument
416 writel(value, i2c->base + offset); in img_i2c_writel()
419 static u32 img_i2c_readl(struct img_i2c *i2c, u32 offset) in img_i2c_readl() argument
421 return readl(i2c->base + offset); in img_i2c_readl()
431 * The scb_wr_rd_fence() function does 2 dummy writes (to the read-only
436 static void img_i2c_wr_rd_fence(struct img_i2c *i2c) in img_i2c_wr_rd_fence() argument
438 if (i2c->need_wr_rd_fence) { in img_i2c_wr_rd_fence()
439 img_i2c_writel(i2c, SCB_CORE_REV_REG, 0); in img_i2c_wr_rd_fence()
440 img_i2c_writel(i2c, SCB_CORE_REV_REG, 0); in img_i2c_wr_rd_fence()
444 static void img_i2c_switch_mode(struct img_i2c *i2c, enum img_i2c_mode mode) in img_i2c_switch_mode() argument
446 i2c->mode = mode; in img_i2c_switch_mode()
447 i2c->int_enable = img_i2c_int_enable_by_mode[mode]; in img_i2c_switch_mode()
448 i2c->line_status = 0; in img_i2c_switch_mode()
451 static void img_i2c_raw_op(struct img_i2c *i2c) in img_i2c_raw_op() argument
453 i2c->raw_timeout = 0; in img_i2c_raw_op()
454 img_i2c_writel(i2c, SCB_OVERRIDE_REG, in img_i2c_raw_op()
460 ((i2c->at_cur_cmd & OVERRIDE_CMD_MASK) << OVERRIDE_CMD_SHIFT) | in img_i2c_raw_op()
461 (i2c->at_cur_data << OVERRIDE_DATA_SHIFT)); in img_i2c_raw_op()
472 static void img_i2c_atomic_op(struct img_i2c *i2c, int cmd, u8 data) in img_i2c_atomic_op() argument
474 i2c->at_cur_cmd = cmd; in img_i2c_atomic_op()
475 i2c->at_cur_data = data; in img_i2c_atomic_op()
478 if (cmd == CMD_GEN_DATA && i2c->mode == MODE_ATOMIC) { in img_i2c_atomic_op()
479 u32 line_status = img_i2c_readl(i2c, SCB_STATUS_REG); in img_i2c_atomic_op()
481 if (line_status & LINESTAT_SDAT_LINE_STATUS && !(data & 0x80)) { in img_i2c_atomic_op()
483 img_i2c_switch_mode(i2c, MODE_RAW); in img_i2c_atomic_op()
484 img_i2c_raw_op(i2c); in img_i2c_atomic_op()
489 dev_dbg(i2c->adap.dev.parent, in img_i2c_atomic_op()
492 i2c->at_t_done = (cmd == CMD_RET_DATA || cmd == CMD_RET_ACK); in img_i2c_atomic_op()
493 i2c->at_slave_event = false; in img_i2c_atomic_op()
494 i2c->line_status = 0; in img_i2c_atomic_op()
496 img_i2c_writel(i2c, SCB_OVERRIDE_REG, in img_i2c_atomic_op()
504 static void img_i2c_atomic_start(struct img_i2c *i2c) in img_i2c_atomic_start() argument
506 img_i2c_switch_mode(i2c, MODE_ATOMIC); in img_i2c_atomic_start()
507 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable); in img_i2c_atomic_start()
508 img_i2c_atomic_op(i2c, CMD_GEN_START, 0x00); in img_i2c_atomic_start()
511 static void img_i2c_soft_reset(struct img_i2c *i2c) in img_i2c_soft_reset() argument
513 i2c->t_halt = false; in img_i2c_soft_reset()
514 img_i2c_writel(i2c, SCB_CONTROL_REG, 0); in img_i2c_soft_reset()
515 img_i2c_writel(i2c, SCB_CONTROL_REG, in img_i2c_soft_reset()
525 * release the transaction halt we have to re-enable it straight away
530 static void img_i2c_transaction_halt(struct img_i2c *i2c, bool t_halt) in img_i2c_transaction_halt() argument
534 if (i2c->t_halt == t_halt) in img_i2c_transaction_halt()
536 i2c->t_halt = t_halt; in img_i2c_transaction_halt()
537 val = img_i2c_readl(i2c, SCB_CONTROL_REG); in img_i2c_transaction_halt()
542 img_i2c_writel(i2c, SCB_CONTROL_REG, val); in img_i2c_transaction_halt()
546 static void img_i2c_read_fifo(struct img_i2c *i2c) in img_i2c_read_fifo() argument
548 while (i2c->msg.len) { in img_i2c_read_fifo()
552 img_i2c_wr_rd_fence(i2c); in img_i2c_read_fifo()
553 fifo_status = img_i2c_readl(i2c, SCB_FIFO_STATUS_REG); in img_i2c_read_fifo()
557 data = img_i2c_readl(i2c, SCB_READ_DATA_REG); in img_i2c_read_fifo()
558 *i2c->msg.buf = data; in img_i2c_read_fifo()
560 img_i2c_writel(i2c, SCB_READ_FIFO_REG, 0xff); in img_i2c_read_fifo()
561 i2c->msg.len--; in img_i2c_read_fifo()
562 i2c->msg.buf++; in img_i2c_read_fifo()
567 static void img_i2c_write_fifo(struct img_i2c *i2c) in img_i2c_write_fifo() argument
569 while (i2c->msg.len) { in img_i2c_write_fifo()
572 img_i2c_wr_rd_fence(i2c); in img_i2c_write_fifo()
573 fifo_status = img_i2c_readl(i2c, SCB_FIFO_STATUS_REG); in img_i2c_write_fifo()
577 img_i2c_writel(i2c, SCB_WRITE_DATA_REG, *i2c->msg.buf); in img_i2c_write_fifo()
578 i2c->msg.len--; in img_i2c_write_fifo()
579 i2c->msg.buf++; in img_i2c_write_fifo()
583 if (!i2c->msg.len) in img_i2c_write_fifo()
584 i2c->int_enable &= ~INT_FIFO_EMPTYING; in img_i2c_write_fifo()
588 static void img_i2c_read(struct img_i2c *i2c) in img_i2c_read() argument
590 img_i2c_switch_mode(i2c, MODE_AUTOMATIC); in img_i2c_read()
591 if (!i2c->last_msg) in img_i2c_read()
592 i2c->int_enable |= INT_SLAVE_EVENT; in img_i2c_read()
594 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable); in img_i2c_read()
595 img_i2c_writel(i2c, SCB_READ_ADDR_REG, i2c->msg.addr); in img_i2c_read()
596 img_i2c_writel(i2c, SCB_READ_COUNT_REG, i2c->msg.len); in img_i2c_read()
598 mod_timer(&i2c->check_timer, jiffies + msecs_to_jiffies(1)); in img_i2c_read()
602 static void img_i2c_write(struct img_i2c *i2c) in img_i2c_write() argument
604 img_i2c_switch_mode(i2c, MODE_AUTOMATIC); in img_i2c_write()
605 if (!i2c->last_msg) in img_i2c_write()
606 i2c->int_enable |= INT_SLAVE_EVENT; in img_i2c_write()
608 img_i2c_writel(i2c, SCB_WRITE_ADDR_REG, i2c->msg.addr); in img_i2c_write()
609 img_i2c_writel(i2c, SCB_WRITE_COUNT_REG, i2c->msg.len); in img_i2c_write()
611 mod_timer(&i2c->check_timer, jiffies + msecs_to_jiffies(1)); in img_i2c_write()
612 img_i2c_write_fifo(i2c); in img_i2c_write()
615 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable); in img_i2c_write()
623 static void img_i2c_complete_transaction(struct img_i2c *i2c, int status) in img_i2c_complete_transaction() argument
625 img_i2c_switch_mode(i2c, MODE_INACTIVE); in img_i2c_complete_transaction()
627 i2c->msg_status = status; in img_i2c_complete_transaction()
628 img_i2c_transaction_halt(i2c, false); in img_i2c_complete_transaction()
630 complete(&i2c->msg_complete); in img_i2c_complete_transaction()
633 static unsigned int img_i2c_raw_atomic_delay_handler(struct img_i2c *i2c, in img_i2c_raw_atomic_delay_handler() argument
637 img_i2c_atomic_op(i2c, i2c->at_cur_cmd, i2c->at_cur_data); in img_i2c_raw_atomic_delay_handler()
638 img_i2c_switch_mode(i2c, MODE_ATOMIC); in img_i2c_raw_atomic_delay_handler()
639 return 0; in img_i2c_raw_atomic_delay_handler()
642 static unsigned int img_i2c_raw(struct img_i2c *i2c, u32 int_status, in img_i2c_raw() argument
646 if (i2c->raw_timeout == 0) in img_i2c_raw()
647 return img_i2c_raw_atomic_delay_handler(i2c, in img_i2c_raw()
649 --i2c->raw_timeout; in img_i2c_raw()
651 return 0; in img_i2c_raw()
654 static unsigned int img_i2c_sequence(struct img_i2c *i2c, u32 int_status) in img_i2c_sequence() argument
663 int next_cmd = -1; in img_i2c_sequence()
664 u8 next_data = 0x00; in img_i2c_sequence()
667 i2c->at_slave_event = true; in img_i2c_sequence()
669 i2c->at_t_done = true; in img_i2c_sequence()
671 if (!i2c->at_slave_event || !i2c->at_t_done) in img_i2c_sequence()
672 return 0; in img_i2c_sequence()
675 if (i2c->at_cur_cmd >= 0 && in img_i2c_sequence()
676 i2c->at_cur_cmd < ARRAY_SIZE(continue_bits)) { in img_i2c_sequence()
677 unsigned int cont_bits = continue_bits[i2c->at_cur_cmd]; in img_i2c_sequence()
681 if (!(i2c->line_status & cont_bits)) in img_i2c_sequence()
682 return 0; in img_i2c_sequence()
686 /* follow the sequence of commands in i2c->seq */ in img_i2c_sequence()
687 next_cmd = *i2c->seq; in img_i2c_sequence()
690 img_i2c_writel(i2c, SCB_OVERRIDE_REG, 0); in img_i2c_sequence()
691 return ISR_COMPLETE(0); in img_i2c_sequence()
695 ++i2c->seq; in img_i2c_sequence()
696 next_data = *i2c->seq; in img_i2c_sequence()
698 ++i2c->seq; in img_i2c_sequence()
699 img_i2c_atomic_op(i2c, next_cmd, next_data); in img_i2c_sequence()
701 return 0; in img_i2c_sequence()
704 static void img_i2c_reset_start(struct img_i2c *i2c) in img_i2c_reset_start() argument
707 img_i2c_switch_mode(i2c, MODE_SEQUENCE); in img_i2c_reset_start()
708 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable); in img_i2c_reset_start()
709 i2c->seq = img_i2c_reset_seq; in img_i2c_reset_start()
710 i2c->at_slave_event = true; in img_i2c_reset_start()
711 i2c->at_t_done = true; in img_i2c_reset_start()
712 i2c->at_cur_cmd = -1; in img_i2c_reset_start()
715 img_i2c_sequence(i2c, 0); in img_i2c_reset_start()
718 static void img_i2c_stop_start(struct img_i2c *i2c) in img_i2c_stop_start() argument
721 img_i2c_switch_mode(i2c, MODE_SEQUENCE); in img_i2c_stop_start()
722 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable); in img_i2c_stop_start()
723 i2c->seq = img_i2c_stop_seq; in img_i2c_stop_start()
724 i2c->at_slave_event = true; in img_i2c_stop_start()
725 i2c->at_t_done = true; in img_i2c_stop_start()
726 i2c->at_cur_cmd = -1; in img_i2c_stop_start()
729 img_i2c_sequence(i2c, 0); in img_i2c_stop_start()
732 static unsigned int img_i2c_atomic(struct img_i2c *i2c, in img_i2c_atomic() argument
736 int next_cmd = -1; in img_i2c_atomic()
737 u8 next_data = 0x00; in img_i2c_atomic()
740 i2c->at_slave_event = true; in img_i2c_atomic()
742 i2c->at_t_done = true; in img_i2c_atomic()
744 if (!i2c->at_slave_event || !i2c->at_t_done) in img_i2c_atomic()
746 if (i2c->line_status & LINESTAT_ABORT_DET) { in img_i2c_atomic()
747 dev_dbg(i2c->adap.dev.parent, "abort condition detected\n"); in img_i2c_atomic()
749 i2c->msg_status = -EIO; in img_i2c_atomic()
753 /* i2c->at_cur_cmd may have completed */ in img_i2c_atomic()
754 switch (i2c->at_cur_cmd) { in img_i2c_atomic()
757 next_data = i2c_8bit_addr_from_msg(&i2c->msg); in img_i2c_atomic()
760 if (i2c->line_status & LINESTAT_INPUT_HELD_V) in img_i2c_atomic()
764 if (i2c->line_status & LINESTAT_ACK_DET || in img_i2c_atomic()
765 (i2c->line_status & LINESTAT_NACK_DET && in img_i2c_atomic()
766 i2c->msg.flags & I2C_M_IGNORE_NAK)) { in img_i2c_atomic()
767 if (i2c->msg.len == 0) { in img_i2c_atomic()
769 } else if (i2c->msg.flags & I2C_M_RD) { in img_i2c_atomic()
773 next_data = *i2c->msg.buf; in img_i2c_atomic()
774 --i2c->msg.len; in img_i2c_atomic()
775 ++i2c->msg.buf; in img_i2c_atomic()
777 } else if (i2c->line_status & LINESTAT_NACK_DET) { in img_i2c_atomic()
778 i2c->msg_status = -EIO; in img_i2c_atomic()
783 if (i2c->line_status & LINESTAT_INPUT_HELD_V) { in img_i2c_atomic()
784 *i2c->msg.buf = (i2c->line_status & in img_i2c_atomic()
787 --i2c->msg.len; in img_i2c_atomic()
788 ++i2c->msg.buf; in img_i2c_atomic()
789 if (i2c->msg.len) in img_i2c_atomic()
796 if (i2c->line_status & LINESTAT_ACK_DET) { in img_i2c_atomic()
799 i2c->msg_status = -EIO; in img_i2c_atomic()
807 img_i2c_writel(i2c, SCB_OVERRIDE_REG, 0); in img_i2c_atomic()
808 return ISR_COMPLETE(0); in img_i2c_atomic()
810 dev_err(i2c->adap.dev.parent, "bad atomic command %d\n", in img_i2c_atomic()
811 i2c->at_cur_cmd); in img_i2c_atomic()
812 i2c->msg_status = -EIO; in img_i2c_atomic()
818 if (next_cmd != -1) { in img_i2c_atomic()
820 if (next_cmd == CMD_GEN_STOP && !i2c->msg_status && in img_i2c_atomic()
821 !i2c->last_msg) in img_i2c_atomic()
822 return ISR_COMPLETE(0); in img_i2c_atomic()
823 img_i2c_atomic_op(i2c, next_cmd, next_data); in img_i2c_atomic()
825 return 0; in img_i2c_atomic()
834 struct img_i2c *i2c = from_timer(i2c, t, check_timer); in img_i2c_check_timer() local
838 spin_lock_irqsave(&i2c->lock, flags); in img_i2c_check_timer()
839 line_status = img_i2c_readl(i2c, SCB_STATUS_REG); in img_i2c_check_timer()
843 dev_dbg(i2c->adap.dev.parent, in img_i2c_check_timer()
846 img_i2c_writel(i2c, SCB_INT_MASK_REG, in img_i2c_check_timer()
847 i2c->int_enable | INT_SLAVE_EVENT); in img_i2c_check_timer()
850 spin_unlock_irqrestore(&i2c->lock, flags); in img_i2c_check_timer()
853 static unsigned int img_i2c_auto(struct img_i2c *i2c, in img_i2c_auto() argument
861 dev_dbg(i2c->adap.dev.parent, "abort condition detected\n"); in img_i2c_auto()
863 if ((i2c->msg.flags & I2C_M_RD) && in img_i2c_auto()
865 img_i2c_read_fifo(i2c); in img_i2c_auto()
867 i2c->msg_status = -EIO; in img_i2c_auto()
868 img_i2c_stop_start(i2c); in img_i2c_auto()
869 return 0; in img_i2c_auto()
873 if (!i2c->last_msg && line_status & LINESTAT_START_BIT_DET) { in img_i2c_auto()
874 img_i2c_transaction_halt(i2c, !i2c->last_msg); in img_i2c_auto()
876 i2c->int_enable &= ~INT_SLAVE_EVENT; in img_i2c_auto()
879 mod_timer(&i2c->check_timer, jiffies + msecs_to_jiffies(1)); in img_i2c_auto()
883 if (i2c->msg.flags & I2C_M_RD) in img_i2c_auto()
884 img_i2c_read_fifo(i2c); in img_i2c_auto()
885 return ISR_COMPLETE(0); in img_i2c_auto()
888 if (i2c->msg.flags & I2C_M_RD) { in img_i2c_auto()
890 img_i2c_read_fifo(i2c); in img_i2c_auto()
891 if (i2c->msg.len == 0) in img_i2c_auto()
897 i2c->msg.len == 0) in img_i2c_auto()
899 img_i2c_write_fifo(i2c); in img_i2c_auto()
907 img_i2c_transaction_halt(i2c, false); in img_i2c_auto()
908 img_i2c_transaction_halt(i2c, !i2c->last_msg); in img_i2c_auto()
911 return 0; in img_i2c_auto()
916 struct img_i2c *i2c = dev_id; in img_i2c_isr() local
922 int_status = img_i2c_readl(i2c, SCB_INT_STATUS_REG); in img_i2c_isr()
924 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, int_status); in img_i2c_isr()
930 line_status = img_i2c_readl(i2c, SCB_STATUS_REG); in img_i2c_isr()
932 img_i2c_writel(i2c, SCB_CLEAR_REG, in img_i2c_isr()
935 img_i2c_wr_rd_fence(i2c); in img_i2c_isr()
938 spin_lock(&i2c->lock); in img_i2c_isr()
941 i2c->line_status &= ~LINESTAT_INPUT_DATA; in img_i2c_isr()
942 i2c->line_status |= line_status; in img_i2c_isr()
952 dev_crit(i2c->adap.dev.parent, in img_i2c_isr()
953 "fatal: clock low timeout occurred %s addr 0x%02x\n", in img_i2c_isr()
954 (i2c->msg.flags & I2C_M_RD) ? "reading" : "writing", in img_i2c_isr()
955 i2c->msg.addr); in img_i2c_isr()
960 if (i2c->mode == MODE_ATOMIC) in img_i2c_isr()
961 hret = img_i2c_atomic(i2c, int_status, line_status); in img_i2c_isr()
962 else if (i2c->mode == MODE_AUTOMATIC) in img_i2c_isr()
963 hret = img_i2c_auto(i2c, int_status, line_status); in img_i2c_isr()
964 else if (i2c->mode == MODE_SEQUENCE) in img_i2c_isr()
965 hret = img_i2c_sequence(i2c, int_status); in img_i2c_isr()
966 else if (i2c->mode == MODE_WAITSTOP && (int_status & INT_SLAVE_EVENT) && in img_i2c_isr()
968 hret = ISR_COMPLETE(0); in img_i2c_isr()
969 else if (i2c->mode == MODE_RAW) in img_i2c_isr()
970 hret = img_i2c_raw(i2c, int_status, line_status); in img_i2c_isr()
972 hret = 0; in img_i2c_isr()
975 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, int_status & INT_LEVEL); in img_i2c_isr()
983 if (!i2c->last_msg || i2c->line_status & LINESTAT_STOP_BIT_DET) in img_i2c_isr()
984 hret = ISR_COMPLETE(0); in img_i2c_isr()
986 img_i2c_switch_mode(i2c, MODE_WAITSTOP); in img_i2c_isr()
991 int status = -(hret & ISR_STATUS_M); in img_i2c_isr()
993 img_i2c_complete_transaction(i2c, status); in img_i2c_isr()
995 img_i2c_switch_mode(i2c, MODE_FATAL); in img_i2c_isr()
999 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable); in img_i2c_isr()
1001 spin_unlock(&i2c->lock); in img_i2c_isr()
1007 static int img_i2c_reset_bus(struct img_i2c *i2c) in img_i2c_reset_bus() argument
1012 spin_lock_irqsave(&i2c->lock, flags); in img_i2c_reset_bus()
1013 reinit_completion(&i2c->msg_complete); in img_i2c_reset_bus()
1014 img_i2c_reset_start(i2c); in img_i2c_reset_bus()
1015 spin_unlock_irqrestore(&i2c->lock, flags); in img_i2c_reset_bus()
1017 time_left = wait_for_completion_timeout(&i2c->msg_complete, in img_i2c_reset_bus()
1019 if (time_left == 0) in img_i2c_reset_bus()
1020 return -ETIMEDOUT; in img_i2c_reset_bus()
1021 return 0; in img_i2c_reset_bus()
1027 struct img_i2c *i2c = i2c_get_adapdata(adap); in img_i2c_xfer() local
1032 if (i2c->mode == MODE_SUSPEND) { in img_i2c_xfer()
1034 return -EIO; in img_i2c_xfer()
1037 if (i2c->mode == MODE_FATAL) in img_i2c_xfer()
1038 return -EIO; in img_i2c_xfer()
1040 for (i = 0; i < num; i++) { in img_i2c_xfer()
1042 * 0 byte reads are not possible because the slave could try in img_i2c_xfer()
1046 return -EIO; in img_i2c_xfer()
1048 * 0 byte writes are possible and used for probing, but we in img_i2c_xfer()
1060 ret = pm_runtime_resume_and_get(adap->dev.parent); in img_i2c_xfer()
1061 if (ret < 0) in img_i2c_xfer()
1064 for (i = 0; i < num; i++) { in img_i2c_xfer()
1068 spin_lock_irqsave(&i2c->lock, flags); in img_i2c_xfer()
1072 * original or we'll confuse drivers and i2c-dev. in img_i2c_xfer()
1074 i2c->msg = *msg; in img_i2c_xfer()
1075 i2c->msg_status = 0; in img_i2c_xfer()
1080 * before the stop bit is sent, and the linux I2C interface in img_i2c_xfer()
1084 i2c->last_msg = (i == num - 1); in img_i2c_xfer()
1085 reinit_completion(&i2c->msg_complete); in img_i2c_xfer()
1093 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, ~0); in img_i2c_xfer()
1094 img_i2c_writel(i2c, SCB_CLEAR_REG, ~0); in img_i2c_xfer()
1097 img_i2c_atomic_start(i2c); in img_i2c_xfer()
1103 img_i2c_transaction_halt(i2c, !i2c->last_msg); in img_i2c_xfer()
1105 if (msg->flags & I2C_M_RD) in img_i2c_xfer()
1106 img_i2c_read(i2c); in img_i2c_xfer()
1108 img_i2c_write(i2c); in img_i2c_xfer()
1116 * complete while the i2c block was halted. in img_i2c_xfer()
1118 img_i2c_transaction_halt(i2c, false); in img_i2c_xfer()
1119 img_i2c_transaction_halt(i2c, !i2c->last_msg); in img_i2c_xfer()
1121 spin_unlock_irqrestore(&i2c->lock, flags); in img_i2c_xfer()
1123 time_left = wait_for_completion_timeout(&i2c->msg_complete, in img_i2c_xfer()
1125 del_timer_sync(&i2c->check_timer); in img_i2c_xfer()
1127 if (time_left == 0) { in img_i2c_xfer()
1128 dev_err(adap->dev.parent, "i2c transfer timed out\n"); in img_i2c_xfer()
1129 i2c->msg_status = -ETIMEDOUT; in img_i2c_xfer()
1133 if (i2c->msg_status) in img_i2c_xfer()
1137 pm_runtime_mark_last_busy(adap->dev.parent); in img_i2c_xfer()
1138 pm_runtime_put_autosuspend(adap->dev.parent); in img_i2c_xfer()
1140 return i2c->msg_status ? i2c->msg_status : num; in img_i2c_xfer()
1153 static int img_i2c_init(struct img_i2c *i2c) in img_i2c_init() argument
1161 ret = pm_runtime_resume_and_get(i2c->adap.dev.parent); in img_i2c_init()
1162 if (ret < 0) in img_i2c_init()
1165 rev = img_i2c_readl(i2c, SCB_CORE_REV_REG); in img_i2c_init()
1166 if ((rev & 0x00ffffff) < 0x00020200) { in img_i2c_init()
1167 dev_info(i2c->adap.dev.parent, in img_i2c_init()
1169 (rev >> 24) & 0xff, (rev >> 16) & 0xff, in img_i2c_init()
1170 (rev >> 8) & 0xff, rev & 0xff); in img_i2c_init()
1171 pm_runtime_mark_last_busy(i2c->adap.dev.parent); in img_i2c_init()
1172 pm_runtime_put_autosuspend(i2c->adap.dev.parent); in img_i2c_init()
1173 return -EINVAL; in img_i2c_init()
1177 i2c->need_wr_rd_fence = true; in img_i2c_init()
1180 timing = timings[0]; in img_i2c_init()
1181 for (i = 0; i < ARRAY_SIZE(timings); i++) { in img_i2c_init()
1182 if (i2c->bitrate <= timings[i].max_bitrate) { in img_i2c_init()
1187 if (i2c->bitrate > timings[ARRAY_SIZE(timings) - 1].max_bitrate) { in img_i2c_init()
1188 dev_warn(i2c->adap.dev.parent, in img_i2c_init()
1190 i2c->bitrate, in img_i2c_init()
1191 timings[ARRAY_SIZE(timings) - 1].max_bitrate); in img_i2c_init()
1192 timing = timings[ARRAY_SIZE(timings) - 1]; in img_i2c_init()
1193 i2c->bitrate = timing.max_bitrate; in img_i2c_init()
1196 bitrate_khz = i2c->bitrate / 1000; in img_i2c_init()
1197 clk_khz = clk_get_rate(i2c->scb_clk) / 1000; in img_i2c_init()
1199 /* Find the prescale that would give us that inc (approx delay = 0) */ in img_i2c_init()
1212 * If it's between the 20-40 MHz range, there's no need to divide in img_i2c_init()
1232 data = filt | ((inc & SCB_INC_MASK) << SCB_INC_SHIFT) | (prescale - 1); in img_i2c_init()
1233 img_i2c_writel(i2c, SCB_CLK_SET_REG, data); in img_i2c_init()
1249 tckl = int_bitrate - tckh; in img_i2c_init()
1256 tckh = int_bitrate - tckl; in img_i2c_init()
1259 if (tckh > 0) in img_i2c_init()
1260 --tckh; in img_i2c_init()
1262 if (tckl > 0) in img_i2c_init()
1263 --tckl; in img_i2c_init()
1265 img_i2c_writel(i2c, SCB_TIME_TCKH_REG, tckh); in img_i2c_init()
1266 img_i2c_writel(i2c, SCB_TIME_TCKL_REG, tckl); in img_i2c_init()
1272 data = tsdh - 1; in img_i2c_init()
1274 data = 0x01; in img_i2c_init()
1275 img_i2c_writel(i2c, SCB_TIME_TSDH_REG, data); in img_i2c_init()
1282 if (data > 0) in img_i2c_init()
1283 --data; in img_i2c_init()
1284 img_i2c_writel(i2c, SCB_TIME_TPL_REG, data); in img_i2c_init()
1288 if (data > 0) in img_i2c_init()
1289 --data; in img_i2c_init()
1290 img_i2c_writel(i2c, SCB_TIME_TPH_REG, data); in img_i2c_init()
1293 img_i2c_writel(i2c, SCB_TIME_TSDL_REG, data + tsdh + 2); in img_i2c_init()
1297 if (data > 0) in img_i2c_init()
1298 --data; in img_i2c_init()
1299 img_i2c_writel(i2c, SCB_TIME_TP2S_REG, data); in img_i2c_init()
1301 img_i2c_writel(i2c, SCB_TIME_TBI_REG, TIMEOUT_TBI); in img_i2c_init()
1302 img_i2c_writel(i2c, SCB_TIME_TSL_REG, TIMEOUT_TSL); in img_i2c_init()
1303 img_i2c_writel(i2c, SCB_TIME_TDL_REG, TIMEOUT_TDL); in img_i2c_init()
1306 img_i2c_soft_reset(i2c); in img_i2c_init()
1309 img_i2c_writel(i2c, SCB_INT_MASK_REG, 0); in img_i2c_init()
1312 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, ~0); in img_i2c_init()
1315 img_i2c_writel(i2c, SCB_CLEAR_REG, ~0); in img_i2c_init()
1318 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable); in img_i2c_init()
1321 ret = img_i2c_reset_bus(i2c); in img_i2c_init()
1323 pm_runtime_mark_last_busy(i2c->adap.dev.parent); in img_i2c_init()
1324 pm_runtime_put_autosuspend(i2c->adap.dev.parent); in img_i2c_init()
1331 struct device_node *node = pdev->dev.of_node; in img_i2c_probe()
1332 struct img_i2c *i2c; in img_i2c_probe() local
1336 i2c = devm_kzalloc(&pdev->dev, sizeof(struct img_i2c), GFP_KERNEL); in img_i2c_probe()
1337 if (!i2c) in img_i2c_probe()
1338 return -ENOMEM; in img_i2c_probe()
1340 i2c->base = devm_platform_ioremap_resource(pdev, 0); in img_i2c_probe()
1341 if (IS_ERR(i2c->base)) in img_i2c_probe()
1342 return PTR_ERR(i2c->base); in img_i2c_probe()
1344 irq = platform_get_irq(pdev, 0); in img_i2c_probe()
1345 if (irq < 0) in img_i2c_probe()
1348 i2c->sys_clk = devm_clk_get(&pdev->dev, "sys"); in img_i2c_probe()
1349 if (IS_ERR(i2c->sys_clk)) { in img_i2c_probe()
1350 dev_err(&pdev->dev, "can't get system clock\n"); in img_i2c_probe()
1351 return PTR_ERR(i2c->sys_clk); in img_i2c_probe()
1354 i2c->scb_clk = devm_clk_get(&pdev->dev, "scb"); in img_i2c_probe()
1355 if (IS_ERR(i2c->scb_clk)) { in img_i2c_probe()
1356 dev_err(&pdev->dev, "can't get core clock\n"); in img_i2c_probe()
1357 return PTR_ERR(i2c->scb_clk); in img_i2c_probe()
1360 ret = devm_request_irq(&pdev->dev, irq, img_i2c_isr, 0, in img_i2c_probe()
1361 pdev->name, i2c); in img_i2c_probe()
1363 dev_err(&pdev->dev, "can't request irq %d\n", irq); in img_i2c_probe()
1368 timer_setup(&i2c->check_timer, img_i2c_check_timer, 0); in img_i2c_probe()
1370 i2c->bitrate = timings[0].max_bitrate; in img_i2c_probe()
1371 if (!of_property_read_u32(node, "clock-frequency", &val)) in img_i2c_probe()
1372 i2c->bitrate = val; in img_i2c_probe()
1374 i2c_set_adapdata(&i2c->adap, i2c); in img_i2c_probe()
1375 i2c->adap.dev.parent = &pdev->dev; in img_i2c_probe()
1376 i2c->adap.dev.of_node = node; in img_i2c_probe()
1377 i2c->adap.owner = THIS_MODULE; in img_i2c_probe()
1378 i2c->adap.algo = &img_i2c_algo; in img_i2c_probe()
1379 i2c->adap.retries = 5; in img_i2c_probe()
1380 i2c->adap.nr = pdev->id; in img_i2c_probe()
1381 snprintf(i2c->adap.name, sizeof(i2c->adap.name), "IMG SCB I2C"); in img_i2c_probe()
1383 img_i2c_switch_mode(i2c, MODE_INACTIVE); in img_i2c_probe()
1384 spin_lock_init(&i2c->lock); in img_i2c_probe()
1385 init_completion(&i2c->msg_complete); in img_i2c_probe()
1387 platform_set_drvdata(pdev, i2c); in img_i2c_probe()
1389 pm_runtime_set_autosuspend_delay(&pdev->dev, IMG_I2C_PM_TIMEOUT); in img_i2c_probe()
1390 pm_runtime_use_autosuspend(&pdev->dev); in img_i2c_probe()
1391 pm_runtime_enable(&pdev->dev); in img_i2c_probe()
1392 if (!pm_runtime_enabled(&pdev->dev)) { in img_i2c_probe()
1393 ret = img_i2c_runtime_resume(&pdev->dev); in img_i2c_probe()
1398 ret = img_i2c_init(i2c); in img_i2c_probe()
1402 ret = i2c_add_numbered_adapter(&i2c->adap); in img_i2c_probe()
1403 if (ret < 0) in img_i2c_probe()
1406 return 0; in img_i2c_probe()
1409 if (!pm_runtime_enabled(&pdev->dev)) in img_i2c_probe()
1410 img_i2c_runtime_suspend(&pdev->dev); in img_i2c_probe()
1411 pm_runtime_disable(&pdev->dev); in img_i2c_probe()
1412 pm_runtime_dont_use_autosuspend(&pdev->dev); in img_i2c_probe()
1418 struct img_i2c *i2c = platform_get_drvdata(dev); in img_i2c_remove() local
1420 i2c_del_adapter(&i2c->adap); in img_i2c_remove()
1421 pm_runtime_disable(&dev->dev); in img_i2c_remove()
1422 if (!pm_runtime_status_suspended(&dev->dev)) in img_i2c_remove()
1423 img_i2c_runtime_suspend(&dev->dev); in img_i2c_remove()
1428 struct img_i2c *i2c = dev_get_drvdata(dev); in img_i2c_runtime_suspend() local
1430 clk_disable_unprepare(i2c->scb_clk); in img_i2c_runtime_suspend()
1431 clk_disable_unprepare(i2c->sys_clk); in img_i2c_runtime_suspend()
1433 return 0; in img_i2c_runtime_suspend()
1438 struct img_i2c *i2c = dev_get_drvdata(dev); in img_i2c_runtime_resume() local
1441 ret = clk_prepare_enable(i2c->sys_clk); in img_i2c_runtime_resume()
1447 ret = clk_prepare_enable(i2c->scb_clk); in img_i2c_runtime_resume()
1450 clk_disable_unprepare(i2c->sys_clk); in img_i2c_runtime_resume()
1454 return 0; in img_i2c_runtime_resume()
1459 struct img_i2c *i2c = dev_get_drvdata(dev); in img_i2c_suspend() local
1466 img_i2c_switch_mode(i2c, MODE_SUSPEND); in img_i2c_suspend()
1468 return 0; in img_i2c_suspend()
1473 struct img_i2c *i2c = dev_get_drvdata(dev); in img_i2c_resume() local
1480 img_i2c_init(i2c); in img_i2c_resume()
1482 return 0; in img_i2c_resume()
1491 { .compatible = "img,scb-i2c" },
1498 .name = "img-i2c-scb",
1508 MODULE_DESCRIPTION("IMG host I2C driver");