751 	unsigned int stat, dummy;  in i2c_dw_read_clear_intrbits()  local
765 	regmap_read(dev->map, DW_IC_INTR_STAT, &stat);  in i2c_dw_read_clear_intrbits()
774 	if (stat & DW_IC_INTR_RX_UNDER)  in i2c_dw_read_clear_intrbits()
776 	if (stat & DW_IC_INTR_RX_OVER)  in i2c_dw_read_clear_intrbits()
778 	if (stat & DW_IC_INTR_TX_OVER)  in i2c_dw_read_clear_intrbits()
780 	if (stat & DW_IC_INTR_RD_REQ)  in i2c_dw_read_clear_intrbits()
782 	if (stat & DW_IC_INTR_TX_ABRT) {  in i2c_dw_read_clear_intrbits()
790 	if (stat & DW_IC_INTR_RX_DONE)  in i2c_dw_read_clear_intrbits()
792 	if (stat & DW_IC_INTR_ACTIVITY)  in i2c_dw_read_clear_intrbits()
794 	if ((stat & DW_IC_INTR_STOP_DET) &&  in i2c_dw_read_clear_intrbits()
795 	    ((dev->rx_outstanding == 0) || (stat & DW_IC_INTR_RX_FULL)))  in i2c_dw_read_clear_intrbits()
797 	if (stat & DW_IC_INTR_START_DET)  in i2c_dw_read_clear_intrbits()
799 	if (stat & DW_IC_INTR_GEN_CALL)  in i2c_dw_read_clear_intrbits()
802 	return stat;  in i2c_dw_read_clear_intrbits()
812 	unsigned int stat, enabled;  in i2c_dw_isr()  local
815 	regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat);  in i2c_dw_isr()
816 	if (!enabled || !(stat & ~DW_IC_INTR_ACTIVITY))  in i2c_dw_isr()
818 	if (pm_runtime_suspended(dev->dev) || stat == GENMASK(31, 0))  in i2c_dw_isr()
820 	dev_dbg(dev->dev, "enabled=%#x stat=%#x\n", enabled, stat);  in i2c_dw_isr()
822 	stat = i2c_dw_read_clear_intrbits(dev);  in i2c_dw_isr()
836 	if (stat & DW_IC_INTR_TX_ABRT) {  in i2c_dw_isr()
849 	if (stat & DW_IC_INTR_RX_FULL)  in i2c_dw_isr()
852 	if (stat & DW_IC_INTR_TX_EMPTY)  in i2c_dw_isr()
862 	if (((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) &&  in i2c_dw_isr()
867 		regmap_read(dev->map, DW_IC_INTR_MASK, &stat);  in i2c_dw_isr()
869 		regmap_write(dev->map, DW_IC_INTR_MASK, stat);  in i2c_dw_isr()