31 static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev)  in i2c_dw_configure_fifo_master()  argument
34 	regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2);  in i2c_dw_configure_fifo_master()
35 	regmap_write(dev->map, DW_IC_RX_TL, 0);  in i2c_dw_configure_fifo_master()
38 	regmap_write(dev->map, DW_IC_CON, dev->master_cfg);  in i2c_dw_configure_fifo_master()
41 static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)  in i2c_dw_set_timings_master()  argument
45 	struct i2c_timings *t = &dev->timings;  in i2c_dw_set_timings_master()
50 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_set_timings_master()
54 	ret = regmap_read(dev->map, DW_IC_COMP_PARAM_1, &comp_param1);  in i2c_dw_set_timings_master()
55 	i2c_dw_release_lock(dev);  in i2c_dw_set_timings_master()
64 	if (!dev->ss_hcnt || !dev->ss_lcnt) {  in i2c_dw_set_timings_master()
65 		ic_clk = i2c_dw_clk_rate(dev);  in i2c_dw_set_timings_master()
66 		dev->ss_hcnt =  in i2c_dw_set_timings_master()
72 		dev->ss_lcnt =  in i2c_dw_set_timings_master()
78 	dev_dbg(dev->dev, "Standard Mode HCNT:LCNT = %d:%d\n",  in i2c_dw_set_timings_master()
79 		dev->ss_hcnt, dev->ss_lcnt);  in i2c_dw_set_timings_master()
91 		if (dev->fp_hcnt && dev->fp_lcnt) {  in i2c_dw_set_timings_master()
92 			dev->fs_hcnt = dev->fp_hcnt;  in i2c_dw_set_timings_master()
93 			dev->fs_lcnt = dev->fp_lcnt;  in i2c_dw_set_timings_master()
95 			ic_clk = i2c_dw_clk_rate(dev);  in i2c_dw_set_timings_master()
96 			dev->fs_hcnt =  in i2c_dw_set_timings_master()
102 			dev->fs_lcnt =  in i2c_dw_set_timings_master()
114 	if (!dev->fs_hcnt || !dev->fs_lcnt) {  in i2c_dw_set_timings_master()
115 		ic_clk = i2c_dw_clk_rate(dev);  in i2c_dw_set_timings_master()
116 		dev->fs_hcnt =  in i2c_dw_set_timings_master()
122 		dev->fs_lcnt =  in i2c_dw_set_timings_master()
128 	dev_dbg(dev->dev, "Fast Mode%s HCNT:LCNT = %d:%d\n",  in i2c_dw_set_timings_master()
129 		fp_str, dev->fs_hcnt, dev->fs_lcnt);  in i2c_dw_set_timings_master()
132 	if ((dev->master_cfg & DW_IC_CON_SPEED_MASK) ==  in i2c_dw_set_timings_master()
136 			dev_err(dev->dev, "High Speed not supported!\n");  in i2c_dw_set_timings_master()
138 			dev->master_cfg &= ~DW_IC_CON_SPEED_MASK;  in i2c_dw_set_timings_master()
139 			dev->master_cfg |= DW_IC_CON_SPEED_FAST;  in i2c_dw_set_timings_master()
140 			dev->hs_hcnt = 0;  in i2c_dw_set_timings_master()
141 			dev->hs_lcnt = 0;  in i2c_dw_set_timings_master()
142 		} else if (!dev->hs_hcnt || !dev->hs_lcnt) {  in i2c_dw_set_timings_master()
143 			ic_clk = i2c_dw_clk_rate(dev);  in i2c_dw_set_timings_master()
144 			dev->hs_hcnt =  in i2c_dw_set_timings_master()
150 			dev->hs_lcnt =  in i2c_dw_set_timings_master()
156 		dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n",  in i2c_dw_set_timings_master()
157 			dev->hs_hcnt, dev->hs_lcnt);  in i2c_dw_set_timings_master()
160 	ret = i2c_dw_set_sda_hold(dev);  in i2c_dw_set_timings_master()
164 	dev_dbg(dev->dev, "Bus speed: %s\n", i2c_freq_mode_string(t->bus_freq_hz));  in i2c_dw_set_timings_master()
176 static int i2c_dw_init_master(struct dw_i2c_dev *dev)  in i2c_dw_init_master()  argument
180 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_init_master()
185 	__i2c_dw_disable(dev);  in i2c_dw_init_master()
188 	regmap_write(dev->map, DW_IC_SS_SCL_HCNT, dev->ss_hcnt);  in i2c_dw_init_master()
189 	regmap_write(dev->map, DW_IC_SS_SCL_LCNT, dev->ss_lcnt);  in i2c_dw_init_master()
192 	regmap_write(dev->map, DW_IC_FS_SCL_HCNT, dev->fs_hcnt);  in i2c_dw_init_master()
193 	regmap_write(dev->map, DW_IC_FS_SCL_LCNT, dev->fs_lcnt);  in i2c_dw_init_master()
196 	if (dev->hs_hcnt && dev->hs_lcnt) {  in i2c_dw_init_master()
197 		regmap_write(dev->map, DW_IC_HS_SCL_HCNT, dev->hs_hcnt);  in i2c_dw_init_master()
198 		regmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt);  in i2c_dw_init_master()
202 	if (dev->sda_hold_time)  in i2c_dw_init_master()
203 		regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);  in i2c_dw_init_master()
205 	i2c_dw_configure_fifo_master(dev);  in i2c_dw_init_master()
206 	i2c_dw_release_lock(dev);  in i2c_dw_init_master()
211 static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)  in i2c_dw_xfer_init()  argument
213 	struct i2c_msg *msgs = dev->msgs;  in i2c_dw_xfer_init()
218 	__i2c_dw_disable(dev);  in i2c_dw_xfer_init()
221 	if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) {  in i2c_dw_xfer_init()
232 	regmap_update_bits(dev->map, DW_IC_CON, DW_IC_CON_10BITADDR_MASTER,  in i2c_dw_xfer_init()
239 	regmap_write(dev->map, DW_IC_TAR,  in i2c_dw_xfer_init()
240 		     msgs[dev->msg_write_idx].addr | ic_tar);  in i2c_dw_xfer_init()
243 	regmap_write(dev->map, DW_IC_INTR_MASK, 0);  in i2c_dw_xfer_init()
246 	__i2c_dw_enable(dev);  in i2c_dw_xfer_init()
249 	regmap_read(dev->map, DW_IC_ENABLE_STATUS, &dummy);  in i2c_dw_xfer_init()
252 	regmap_read(dev->map, DW_IC_CLR_INTR, &dummy);  in i2c_dw_xfer_init()
253 	regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_MASTER_MASK);  in i2c_dw_xfer_init()
256 static int i2c_dw_check_stopbit(struct dw_i2c_dev *dev)  in i2c_dw_check_stopbit()  argument
261 	ret = regmap_read_poll_timeout(dev->map, DW_IC_INTR_STAT, val,  in i2c_dw_check_stopbit()
265 		dev_err(dev->dev, "i2c timeout error %d\n", ret);  in i2c_dw_check_stopbit()
270 static int i2c_dw_status(struct dw_i2c_dev *dev)  in i2c_dw_status()  argument
274 	status = i2c_dw_wait_bus_not_busy(dev);  in i2c_dw_status()
278 	return i2c_dw_check_stopbit(dev);  in i2c_dw_status()
287 	struct dw_i2c_dev *dev = i2c_get_adapdata(adap);  in amd_i2c_dw_xfer_quirk()  local
298 	regmap_write(dev->map, AMD_UCSI_INTR_REG, AMD_UCSI_INTR_EN);  in amd_i2c_dw_xfer_quirk()
300 	dev->msgs = msgs;  in amd_i2c_dw_xfer_quirk()
301 	dev->msgs_num = num_msgs;  in amd_i2c_dw_xfer_quirk()
302 	i2c_dw_xfer_init(dev);  in amd_i2c_dw_xfer_quirk()
303 	regmap_write(dev->map, DW_IC_INTR_MASK, 0);  in amd_i2c_dw_xfer_quirk()
311 			regmap_write(dev->map, DW_IC_TX_TL, buf_len - 1);  in amd_i2c_dw_xfer_quirk()
323 				regmap_write(dev->map, DW_IC_DATA_CMD, 0x100);  in amd_i2c_dw_xfer_quirk()
324 				regmap_write(dev->map, DW_IC_DATA_CMD, 0x100 | cmd);  in amd_i2c_dw_xfer_quirk()
326 					regmap_write(dev->map, DW_IC_TX_TL, 2 * (buf_len - 1));  in amd_i2c_dw_xfer_quirk()
327 					regmap_write(dev->map, DW_IC_RX_TL, 2 * (buf_len - 1));  in amd_i2c_dw_xfer_quirk()
333 					status = i2c_dw_status(dev);  in amd_i2c_dw_xfer_quirk()
338 						regmap_read(dev->map, DW_IC_DATA_CMD, &val);  in amd_i2c_dw_xfer_quirk()
341 					status = i2c_dw_check_stopbit(dev);  in amd_i2c_dw_xfer_quirk()
346 				regmap_write(dev->map, DW_IC_DATA_CMD, *tx_buf++ | cmd);  in amd_i2c_dw_xfer_quirk()
350 		status = i2c_dw_check_stopbit(dev);  in amd_i2c_dw_xfer_quirk()
358 static int i2c_dw_poll_tx_empty(struct dw_i2c_dev *dev)  in i2c_dw_poll_tx_empty()  argument
362 	return regmap_read_poll_timeout(dev->map, DW_IC_RAW_INTR_STAT, val,  in i2c_dw_poll_tx_empty()
367 static int i2c_dw_poll_rx_full(struct dw_i2c_dev *dev)  in i2c_dw_poll_rx_full()  argument
371 	return regmap_read_poll_timeout(dev->map, DW_IC_RAW_INTR_STAT, val,  in i2c_dw_poll_rx_full()
379 	struct dw_i2c_dev *dev = i2c_get_adapdata(adap);  in txgbe_i2c_dw_xfer_quirk()  local
384 	dev->msgs = msgs;  in txgbe_i2c_dw_xfer_quirk()
385 	dev->msgs_num = num_msgs;  in txgbe_i2c_dw_xfer_quirk()
386 	i2c_dw_xfer_init(dev);  in txgbe_i2c_dw_xfer_quirk()
387 	regmap_write(dev->map, DW_IC_INTR_MASK, 0);  in txgbe_i2c_dw_xfer_quirk()
398 				regmap_write(dev->map, DW_IC_DATA_CMD, 0x100 | stop);  in txgbe_i2c_dw_xfer_quirk()
400 				ret = i2c_dw_poll_rx_full(dev);  in txgbe_i2c_dw_xfer_quirk()
404 				regmap_read(dev->map, DW_IC_DATA_CMD, &val);  in txgbe_i2c_dw_xfer_quirk()
407 				ret = i2c_dw_poll_tx_empty(dev);  in txgbe_i2c_dw_xfer_quirk()
411 				regmap_write(dev->map, DW_IC_DATA_CMD,  in txgbe_i2c_dw_xfer_quirk()
427 i2c_dw_xfer_msg(struct dw_i2c_dev *dev)  in i2c_dw_xfer_msg()  argument
429 	struct i2c_msg *msgs = dev->msgs;  in i2c_dw_xfer_msg()
432 	u32 addr = msgs[dev->msg_write_idx].addr;  in i2c_dw_xfer_msg()
433 	u32 buf_len = dev->tx_buf_len;  in i2c_dw_xfer_msg()
434 	u8 *buf = dev->tx_buf;  in i2c_dw_xfer_msg()
440 	for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) {  in i2c_dw_xfer_msg()
441 		u32 flags = msgs[dev->msg_write_idx].flags;  in i2c_dw_xfer_msg()
448 		if (msgs[dev->msg_write_idx].addr != addr) {  in i2c_dw_xfer_msg()
449 			dev_err(dev->dev,  in i2c_dw_xfer_msg()
451 			dev->msg_err = -EINVAL;  in i2c_dw_xfer_msg()
455 		if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) {  in i2c_dw_xfer_msg()
457 			buf = msgs[dev->msg_write_idx].buf;  in i2c_dw_xfer_msg()
458 			buf_len = msgs[dev->msg_write_idx].len;  in i2c_dw_xfer_msg()
464 			if ((dev->master_cfg & DW_IC_CON_RESTART_EN) &&  in i2c_dw_xfer_msg()
465 					(dev->msg_write_idx > 0))  in i2c_dw_xfer_msg()
469 		regmap_read(dev->map, DW_IC_TXFLR, &flr);  in i2c_dw_xfer_msg()
470 		tx_limit = dev->tx_fifo_depth - flr;  in i2c_dw_xfer_msg()
472 		regmap_read(dev->map, DW_IC_RXFLR, &flr);  in i2c_dw_xfer_msg()
473 		rx_limit = dev->rx_fifo_depth - flr;  in i2c_dw_xfer_msg()
491 			if (dev->msg_write_idx == dev->msgs_num - 1 &&  in i2c_dw_xfer_msg()
500 			if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {  in i2c_dw_xfer_msg()
503 				if (dev->rx_outstanding >= dev->rx_fifo_depth)  in i2c_dw_xfer_msg()
506 				regmap_write(dev->map, DW_IC_DATA_CMD,  in i2c_dw_xfer_msg()
509 				dev->rx_outstanding++;  in i2c_dw_xfer_msg()
511 				regmap_write(dev->map, DW_IC_DATA_CMD,  in i2c_dw_xfer_msg()
517 		dev->tx_buf = buf;  in i2c_dw_xfer_msg()
518 		dev->tx_buf_len = buf_len;  in i2c_dw_xfer_msg()
528 			dev->status |= STATUS_WRITE_IN_PROGRESS;  in i2c_dw_xfer_msg()
533 			dev->status |= STATUS_WRITE_IN_PROGRESS;  in i2c_dw_xfer_msg()
536 			dev->status &= ~STATUS_WRITE_IN_PROGRESS;  in i2c_dw_xfer_msg()
543 	if (dev->msg_write_idx == dev->msgs_num)  in i2c_dw_xfer_msg()
546 	if (dev->msg_err)  in i2c_dw_xfer_msg()
549 	regmap_write(dev->map,  DW_IC_INTR_MASK, intr_mask);  in i2c_dw_xfer_msg()
553 i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len)  in i2c_dw_recv_len()  argument
555 	struct i2c_msg *msgs = dev->msgs;  in i2c_dw_recv_len()
556 	u32 flags = msgs[dev->msg_read_idx].flags;  in i2c_dw_recv_len()
563 	dev->tx_buf_len = len - min_t(u8, len, dev->rx_outstanding);  in i2c_dw_recv_len()
564 	msgs[dev->msg_read_idx].len = len;  in i2c_dw_recv_len()
565 	msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN;  in i2c_dw_recv_len()
571 	regmap_update_bits(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_TX_EMPTY,  in i2c_dw_recv_len()
578 i2c_dw_read(struct dw_i2c_dev *dev)  in i2c_dw_read()  argument
580 	struct i2c_msg *msgs = dev->msgs;  in i2c_dw_read()
583 	for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) {  in i2c_dw_read()
588 		if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD))  in i2c_dw_read()
591 		if (!(dev->status & STATUS_READ_IN_PROGRESS)) {  in i2c_dw_read()
592 			len = msgs[dev->msg_read_idx].len;  in i2c_dw_read()
593 			buf = msgs[dev->msg_read_idx].buf;  in i2c_dw_read()
595 			len = dev->rx_buf_len;  in i2c_dw_read()
596 			buf = dev->rx_buf;  in i2c_dw_read()
599 		regmap_read(dev->map, DW_IC_RXFLR, &rx_valid);  in i2c_dw_read()
602 			u32 flags = msgs[dev->msg_read_idx].flags;  in i2c_dw_read()
604 			regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);  in i2c_dw_read()
620 				len = i2c_dw_recv_len(dev, tmp);  in i2c_dw_read()
623 			dev->rx_outstanding--;  in i2c_dw_read()
627 			dev->status |= STATUS_READ_IN_PROGRESS;  in i2c_dw_read()
628 			dev->rx_buf_len = len;  in i2c_dw_read()
629 			dev->rx_buf = buf;  in i2c_dw_read()
632 			dev->status &= ~STATUS_READ_IN_PROGRESS;  in i2c_dw_read()
642 	struct dw_i2c_dev *dev = i2c_get_adapdata(adap);  in i2c_dw_xfer()  local
645 	dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num);  in i2c_dw_xfer()
647 	pm_runtime_get_sync(dev->dev);  in i2c_dw_xfer()
654 	switch (dev->flags & MODEL_MASK) {  in i2c_dw_xfer()
665 	reinit_completion(&dev->cmd_complete);  in i2c_dw_xfer()
666 	dev->msgs = msgs;  in i2c_dw_xfer()
667 	dev->msgs_num = num;  in i2c_dw_xfer()
668 	dev->cmd_err = 0;  in i2c_dw_xfer()
669 	dev->msg_write_idx = 0;  in i2c_dw_xfer()
670 	dev->msg_read_idx = 0;  in i2c_dw_xfer()
671 	dev->msg_err = 0;  in i2c_dw_xfer()
672 	dev->status = 0;  in i2c_dw_xfer()
673 	dev->abort_source = 0;  in i2c_dw_xfer()
674 	dev->rx_outstanding = 0;  in i2c_dw_xfer()
676 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_xfer()
680 	ret = i2c_dw_wait_bus_not_busy(dev);  in i2c_dw_xfer()
685 	i2c_dw_xfer_init(dev);  in i2c_dw_xfer()
688 	if (!wait_for_completion_timeout(&dev->cmd_complete, adap->timeout)) {  in i2c_dw_xfer()
689 		dev_err(dev->dev, "controller timed out\n");  in i2c_dw_xfer()
691 		i2c_recover_bus(&dev->adapter);  in i2c_dw_xfer()
692 		i2c_dw_init_master(dev);  in i2c_dw_xfer()
705 	__i2c_dw_disable_nowait(dev);  in i2c_dw_xfer()
707 	if (dev->msg_err) {  in i2c_dw_xfer()
708 		ret = dev->msg_err;  in i2c_dw_xfer()
713 	if (likely(!dev->cmd_err && !dev->status)) {  in i2c_dw_xfer()
719 	if (dev->cmd_err == DW_IC_ERR_TX_ABRT) {  in i2c_dw_xfer()
720 		ret = i2c_dw_handle_tx_abort(dev);  in i2c_dw_xfer()
724 	if (dev->status)  in i2c_dw_xfer()
725 		dev_err(dev->dev,  in i2c_dw_xfer()
731 	i2c_dw_release_lock(dev);  in i2c_dw_xfer()
734 	pm_runtime_mark_last_busy(dev->dev);  in i2c_dw_xfer()
735 	pm_runtime_put_autosuspend(dev->dev);  in i2c_dw_xfer()
749 static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)  in i2c_dw_read_clear_intrbits()  argument
765 	regmap_read(dev->map, DW_IC_INTR_STAT, &stat);  in i2c_dw_read_clear_intrbits()
775 		regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy);  in i2c_dw_read_clear_intrbits()
777 		regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy);  in i2c_dw_read_clear_intrbits()
779 		regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy);  in i2c_dw_read_clear_intrbits()
781 		regmap_read(dev->map, DW_IC_CLR_RD_REQ, &dummy);  in i2c_dw_read_clear_intrbits()
787 		regmap_read(dev->map, DW_IC_TX_ABRT_SOURCE, &dev->abort_source);  in i2c_dw_read_clear_intrbits()
788 		regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy);  in i2c_dw_read_clear_intrbits()
791 		regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);  in i2c_dw_read_clear_intrbits()
793 		regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);  in i2c_dw_read_clear_intrbits()
795 	    ((dev->rx_outstanding == 0) || (stat & DW_IC_INTR_RX_FULL)))  in i2c_dw_read_clear_intrbits()
796 		regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);  in i2c_dw_read_clear_intrbits()
798 		regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);  in i2c_dw_read_clear_intrbits()
800 		regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy);  in i2c_dw_read_clear_intrbits()
811 	struct dw_i2c_dev *dev = dev_id;  in i2c_dw_isr()  local
814 	regmap_read(dev->map, DW_IC_ENABLE, &enabled);  in i2c_dw_isr()
815 	regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat);  in i2c_dw_isr()
818 	if (pm_runtime_suspended(dev->dev) || stat == GENMASK(31, 0))  in i2c_dw_isr()
820 	dev_dbg(dev->dev, "enabled=%#x stat=%#x\n", enabled, stat);  in i2c_dw_isr()
822 	stat = i2c_dw_read_clear_intrbits(dev);  in i2c_dw_isr()
824 	if (!(dev->status & STATUS_ACTIVE)) {  in i2c_dw_isr()
832 		regmap_write(dev->map, DW_IC_INTR_MASK, 0);  in i2c_dw_isr()
837 		dev->cmd_err |= DW_IC_ERR_TX_ABRT;  in i2c_dw_isr()
838 		dev->status &= ~STATUS_MASK;  in i2c_dw_isr()
839 		dev->rx_outstanding = 0;  in i2c_dw_isr()
845 		regmap_write(dev->map, DW_IC_INTR_MASK, 0);  in i2c_dw_isr()
850 		i2c_dw_read(dev);  in i2c_dw_isr()
853 		i2c_dw_xfer_msg(dev);  in i2c_dw_isr()
862 	if (((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) &&  in i2c_dw_isr()
863 	     (dev->rx_outstanding == 0))  in i2c_dw_isr()
864 		complete(&dev->cmd_complete);  in i2c_dw_isr()
865 	else if (unlikely(dev->flags & ACCESS_INTR_MASK)) {  in i2c_dw_isr()
867 		regmap_read(dev->map, DW_IC_INTR_MASK, &stat);  in i2c_dw_isr()
868 		regmap_write(dev->map, DW_IC_INTR_MASK, 0);  in i2c_dw_isr()
869 		regmap_write(dev->map, DW_IC_INTR_MASK, stat);  in i2c_dw_isr()
875 void i2c_dw_configure_master(struct dw_i2c_dev *dev)  in i2c_dw_configure_master()  argument
877 	struct i2c_timings *t = &dev->timings;  in i2c_dw_configure_master()
879 	dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;  in i2c_dw_configure_master()
881 	dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |  in i2c_dw_configure_master()
884 	dev->mode = DW_IC_MASTER;  in i2c_dw_configure_master()
888 		dev->master_cfg |= DW_IC_CON_SPEED_STD;  in i2c_dw_configure_master()
891 		dev->master_cfg |= DW_IC_CON_SPEED_HIGH;  in i2c_dw_configure_master()
894 		dev->master_cfg |= DW_IC_CON_SPEED_FAST;  in i2c_dw_configure_master()
901 	struct dw_i2c_dev *dev = i2c_get_adapdata(adap);  in i2c_dw_prepare_recovery()  local
903 	i2c_dw_disable(dev);  in i2c_dw_prepare_recovery()
904 	reset_control_assert(dev->rst);  in i2c_dw_prepare_recovery()
905 	i2c_dw_prepare_clk(dev, false);  in i2c_dw_prepare_recovery()
910 	struct dw_i2c_dev *dev = i2c_get_adapdata(adap);  in i2c_dw_unprepare_recovery()  local
912 	i2c_dw_prepare_clk(dev, true);  in i2c_dw_unprepare_recovery()
913 	reset_control_deassert(dev->rst);  in i2c_dw_unprepare_recovery()
914 	i2c_dw_init_master(dev);  in i2c_dw_unprepare_recovery()
917 static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)  in i2c_dw_init_recovery_info()  argument
919 	struct i2c_bus_recovery_info *rinfo = &dev->rinfo;  in i2c_dw_init_recovery_info()
920 	struct i2c_adapter *adap = &dev->adapter;  in i2c_dw_init_recovery_info()
923 	gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH);  in i2c_dw_init_recovery_info()
929 	gpio = devm_gpiod_get_optional(dev->dev, "sda", GPIOD_IN);  in i2c_dw_init_recovery_info()
934 	rinfo->pinctrl = devm_pinctrl_get(dev->dev);  in i2c_dw_init_recovery_info()
940 		dev_err(dev->dev, "getting pinctrl info failed: bus recovery might not work\n");  in i2c_dw_init_recovery_info()
942 		dev_dbg(dev->dev, "pinctrl is disabled, bus recovery might not work\n");  in i2c_dw_init_recovery_info()
950 	dev_info(dev->dev, "running with gpio recovery mode! scl%s",  in i2c_dw_init_recovery_info()
956 static int i2c_dw_poll_adap_quirk(struct dw_i2c_dev *dev)  in i2c_dw_poll_adap_quirk()  argument
958 	struct i2c_adapter *adap = &dev->adapter;  in i2c_dw_poll_adap_quirk()
961 	pm_runtime_get_noresume(dev->dev);  in i2c_dw_poll_adap_quirk()
964 		dev_err(dev->dev, "Failed to add adapter: %d\n", ret);  in i2c_dw_poll_adap_quirk()
965 	pm_runtime_put_noidle(dev->dev);  in i2c_dw_poll_adap_quirk()
970 static bool i2c_dw_is_model_poll(struct dw_i2c_dev *dev)  in i2c_dw_is_model_poll()  argument
972 	switch (dev->flags & MODEL_MASK) {  in i2c_dw_is_model_poll()
981 int i2c_dw_probe_master(struct dw_i2c_dev *dev)  in i2c_dw_probe_master()  argument
983 	struct i2c_adapter *adap = &dev->adapter;  in i2c_dw_probe_master()
988 	init_completion(&dev->cmd_complete);  in i2c_dw_probe_master()
990 	dev->init = i2c_dw_init_master;  in i2c_dw_probe_master()
991 	dev->disable = i2c_dw_disable;  in i2c_dw_probe_master()
993 	ret = i2c_dw_init_regmap(dev);  in i2c_dw_probe_master()
997 	ret = i2c_dw_set_timings_master(dev);  in i2c_dw_probe_master()
1001 	ret = i2c_dw_set_fifo_size(dev);  in i2c_dw_probe_master()
1006 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_probe_master()
1016 	ret = regmap_read(dev->map, DW_IC_CON, &ic_con);  in i2c_dw_probe_master()
1017 	i2c_dw_release_lock(dev);  in i2c_dw_probe_master()
1022 		dev->master_cfg |= DW_IC_CON_BUS_CLEAR_CTRL;  in i2c_dw_probe_master()
1024 	ret = dev->init(dev);  in i2c_dw_probe_master()
1033 	adap->dev.parent = dev->dev;  in i2c_dw_probe_master()
1034 	i2c_set_adapdata(adap, dev);  in i2c_dw_probe_master()
1036 	if (i2c_dw_is_model_poll(dev))  in i2c_dw_probe_master()
1037 		return i2c_dw_poll_adap_quirk(dev);  in i2c_dw_probe_master()
1039 	if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {  in i2c_dw_probe_master()
1045 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_probe_master()
1049 	regmap_write(dev->map, DW_IC_INTR_MASK, 0);  in i2c_dw_probe_master()
1050 	i2c_dw_release_lock(dev);  in i2c_dw_probe_master()
1052 	ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, irq_flags,  in i2c_dw_probe_master()
1053 			       dev_name(dev->dev), dev);  in i2c_dw_probe_master()
1055 		dev_err(dev->dev, "failure requesting irq %i: %d\n",  in i2c_dw_probe_master()
1056 			dev->irq, ret);  in i2c_dw_probe_master()
1060 	ret = i2c_dw_init_recovery_info(dev);  in i2c_dw_probe_master()
1070 	pm_runtime_get_noresume(dev->dev);  in i2c_dw_probe_master()
1073 		dev_err(dev->dev, "failure adding adapter: %d\n", ret);  in i2c_dw_probe_master()
1074 	pm_runtime_put_noidle(dev->dev);  in i2c_dw_probe_master()