Lines Matching refs:output

34 	struct intel_th_output	*output;  member
56 struct gth_output output[TH_POSSIBLE_OUTPUTS]; member
185 clear_bit(ma->master, gth->output[old_port].master); in master_attr_store()
191 if (gth->output[old_port].output->active) in master_attr_store()
198 if (!gth->output[port].output) { in master_attr_store()
203 set_bit(ma->master, gth->output[port].master); in master_attr_store()
206 if (gth->output[port].output->active) in master_attr_store()
242 OUTPUT_PARM(port, 0x7, 1, 0, output),
243 OUTPUT_PARM(null, BIT(3), 1, 1, output),
244 OUTPUT_PARM(drop, BIT(4), 1, 1, output),
245 OUTPUT_PARM(reset, BIT(5), 1, 0, output),
246 OUTPUT_PARM(flush, BIT(7), 0, 1, output),
474 struct intel_th_output *output, in intel_th_gth_stop() argument
478 container_of(output, struct intel_th_device, output); in intel_th_gth_stop()
490 count && !(reg & BIT(output->port)); count--) { in intel_th_gth_stop()
497 output->port); in intel_th_gth_stop()
515 struct intel_th_output *output) in intel_th_gth_start() argument
519 if (output->multiblock) in intel_th_gth_start()
536 struct intel_th_output *output) in intel_th_gth_disable() argument
543 output->active = false; in intel_th_gth_disable()
545 for_each_set_bit(master, gth->output[output->port].master, in intel_th_gth_disable()
551 intel_th_gth_stop(gth, output, true); in intel_th_gth_disable()
554 reg &= ~output->scratchpad; in intel_th_gth_disable()
568 struct intel_th_output *output) in intel_th_gth_prepare() argument
578 count && !(gth_output_get(gth, output->port) & BIT(5)); count--) in intel_th_gth_prepare()
591 struct intel_th_output *output) in intel_th_gth_enable() argument
599 for_each_set_bit(master, gth->output[output->port].master, in intel_th_gth_enable()
601 gth_master_set(gth, master, output->port); in intel_th_gth_enable()
604 output->active = true; in intel_th_gth_enable()
611 scrpd |= output->scratchpad; in intel_th_gth_enable()
614 intel_th_gth_start(gth, output); in intel_th_gth_enable()
626 struct intel_th_output *output) in intel_th_gth_switch() argument
647 intel_th_gth_stop(gth, output, false); in intel_th_gth_switch()
648 intel_th_gth_start(gth, output); in intel_th_gth_switch()
675 if (gth->output[i].port_type != othdev->output.type) in intel_th_gth_assign()
688 othdev->output.port = i; in intel_th_gth_assign()
689 othdev->output.active = false; in intel_th_gth_assign()
690 gth->output[i].output = &othdev->output; in intel_th_gth_assign()
705 int port = othdev->output.port; in intel_th_gth_unassign()
712 othdev->output.port = -1; in intel_th_gth_unassign()
713 othdev->output.active = false; in intel_th_gth_unassign()
714 gth->output[port].output = NULL; in intel_th_gth_unassign()
736 set_bit(master, gth->output[port].master); in intel_th_gth_set_output()
794 gth->output[i].gth = gth; in intel_th_gth_probe()
795 gth->output[i].index = i; in intel_th_gth_probe()
796 gth->output[i].port_type = in intel_th_gth_probe()
798 if (gth->output[i].port_type == GTH_NONE) in intel_th_gth_probe()
801 ret = intel_th_output_enable(th, gth->output[i].port_type); in intel_th_gth_probe()