351 		if (omap_port->ssr.mode != SSI_MODE_FRAME) {  in ssi_async_break()
390 		BUG_ON(msg->channel >= omap_port->ssr.channels);  in ssi_async()
455 	void __iomem *ssr = omap_port->ssr_base;  in ssi_setup()  local
473 	writel_relaxed(SSI_MODE_SLEEP, ssr + SSI_SSR_MODE_REG);  in ssi_setup()
475 	val = readl(ssr + SSI_SSR_MODE_REG);  in ssi_setup()
483 	writel_relaxed(31, ssr + SSI_SSR_FRAMESIZE_REG);  in ssi_setup()
484 	writel_relaxed(cl->rx_cfg.num_hw_channels, ssr + SSI_SSR_CHANNELS_REG);  in ssi_setup()
485 	writel_relaxed(0, ssr + SSI_SSR_TIMEOUT_REG);  in ssi_setup()
487 	if ((omap_port->ssr.mode == SSI_MODE_FRAME) &&  in ssi_setup()
490 	writel_relaxed(cl->rx_cfg.mode, ssr + SSI_SSR_MODE_REG);  in ssi_setup()
501 	omap_port->ssr.frame_size = 31;  in ssi_setup()
502 	omap_port->ssr.timeout = 0;  in ssi_setup()
503 	omap_port->ssr.channels = cl->rx_cfg.num_hw_channels;  in ssi_setup()
504 	omap_port->ssr.mode = cl->rx_cfg.mode;  in ssi_setup()
521 	void __iomem *ssr = omap_port->ssr_base;  in ssi_flush()  local
546 	writel_relaxed(0, ssr + SSI_SSR_RXSTATE_REG);  in ssi_flush()
547 	writel_relaxed(0, ssr + SSI_SSR_BUFSTATE_REG);  in ssi_flush()
549 	err = readl(ssr + SSI_SSR_ERROR_REG);  in ssi_flush()
550 	writel_relaxed(err, ssr + SSI_SSR_ERRORACK_REG);  in ssi_flush()
552 	writel_relaxed(0, ssr + SSI_SSR_BREAK_REG);  in ssi_flush()
787 		omap_port->ssr.mode = SSI_MODE_SLEEP;  in ssi_release()
1306 	writel_relaxed(omap_port->ssr.frame_size, base + SSI_SSR_FRAMESIZE_REG);  in ssi_restore_port_ctx()
1307 	writel_relaxed(omap_port->ssr.channels, base + SSI_SSR_CHANNELS_REG);  in ssi_restore_port_ctx()
1308 	writel_relaxed(omap_port->ssr.timeout, base + SSI_SSR_TIMEOUT_REG);  in ssi_restore_port_ctx()
1319 	writel_relaxed(omap_port->ssr.mode,  in ssi_restore_port_mode()