3  * Tegra host1x driver
23 #include <trace/events/host1x.h>
45 void host1x_common_writel(struct host1x *host1x, u32 v, u32 r)  in host1x_common_writel()  argument
47 	writel(v, host1x->common_regs + r);  in host1x_common_writel()
50 void host1x_hypervisor_writel(struct host1x *host1x, u32 v, u32 r)  in host1x_hypervisor_writel()  argument
52 	writel(v, host1x->hv_regs + r);  in host1x_hypervisor_writel()
55 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r)  in host1x_hypervisor_readl()  argument
57 	return readl(host1x->hv_regs + r);  in host1x_hypervisor_readl()
60 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)  in host1x_sync_writel()  argument
62 	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;  in host1x_sync_writel()
67 u32 host1x_sync_readl(struct host1x *host1x, u32 r)  in host1x_sync_readl()  argument
69 	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;  in host1x_sync_readl()
263 	{ .compatible = "nvidia,tegra234-host1x", .data = &host1x08_info, },
264 	{ .compatible = "nvidia,tegra194-host1x", .data = &host1x07_info, },
265 	{ .compatible = "nvidia,tegra186-host1x", .data = &host1x06_info, },
266 	{ .compatible = "nvidia,tegra210-host1x", .data = &host1x05_info, },
267 	{ .compatible = "nvidia,tegra124-host1x", .data = &host1x04_info, },
268 	{ .compatible = "nvidia,tegra114-host1x", .data = &host1x02_info, },
269 	{ .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
270 	{ .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
275 static void host1x_setup_virtualization_tables(struct host1x *host)  in host1x_setup_virtualization_tables()
306 static bool host1x_wants_iommu(struct host1x *host1x)  in host1x_wants_iommu()  argument
314 	 * and if the host1x firewall is enabled, there's no need to enable  in host1x_wants_iommu()
321 	 * SoCs before Tegra186 (i.e. Tegra124 and Tegra210), the host1x can  in host1x_wants_iommu()
329 	 * buffers will be mapped into a 32-bit IOVA space that host1x can  in host1x_wants_iommu()
331 	 * within the limitations of the host1x on these SoCs.  in host1x_wants_iommu()
335 	 * the host1x firewall is disabled.  in host1x_wants_iommu()
337 	if (host1x->info->dma_mask <= DMA_BIT_MASK(32)) {  in host1x_wants_iommu()
345 static struct iommu_domain *host1x_iommu_attach(struct host1x *host)  in host1x_iommu_attach()
363 	 * host1x firewall is already enabled and we don't support addressing  in host1x_iommu_attach()
366 	 * Similarly, if host1x is already attached to an IOMMU (via the DMA  in host1x_iommu_attach()
421 static int host1x_iommu_init(struct host1x *host)  in host1x_iommu_init()
454 static void host1x_iommu_exit(struct host1x *host)  in host1x_iommu_exit()
470 static int host1x_get_resets(struct host1x *host)  in host1x_get_resets()
475 	host->resets[1].id = "host1x";  in host1x_get_resets()
490 	struct host1x *host;  in host1x_probe()
528 	/* set common host1x device data */  in host1x_probe()
636 	struct host1x *host = platform_get_drvdata(pdev);  in host1x_remove()
655 	struct host1x *host = dev_get_drvdata(dev);  in host1x_runtime_suspend()
684 	struct host1x *host = dev_get_drvdata(dev);  in host1x_runtime_resume()
727 		.name = "tegra-host1x",
764  * host1x_get_dma_mask() - query the supported DMA mask for host1x
765  * @host1x: host1x instance
767  * Note that this returns the supported DMA mask for host1x, which can be
770 u64 host1x_get_dma_mask(struct host1x *host1x)  in host1x_get_dma_mask()  argument
772 	return host1x->info->dma_mask;  in host1x_get_dma_mask()
778 MODULE_DESCRIPTION("Host1x driver for Tegra products");