Lines Matching +full:layer +full:- +full:alpha +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP DisplayPort Subsystem - KMS API
5 * Copyright (C) 2017 - 2021 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
47 return container_of(drm, struct zynqmp_dpsub_drm, dev)->dpsub; in to_zynqmp_dpsub()
50 /* -----------------------------------------------------------------------------
61 if (!new_plane_state->crtc) in zynqmp_dpsub_plane_atomic_check()
64 crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc); in zynqmp_dpsub_plane_atomic_check()
80 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev); in zynqmp_dpsub_plane_atomic_disable()
81 struct zynqmp_disp_layer *layer = dpsub->layers[plane->index]; in zynqmp_dpsub_plane_atomic_disable() local
83 if (!old_state->fb) in zynqmp_dpsub_plane_atomic_disable()
86 zynqmp_disp_layer_disable(layer); in zynqmp_dpsub_plane_atomic_disable()
88 if (plane->index == ZYNQMP_DPSUB_LAYER_GFX) in zynqmp_dpsub_plane_atomic_disable()
89 zynqmp_disp_blend_set_global_alpha(dpsub->disp, false, in zynqmp_dpsub_plane_atomic_disable()
90 plane->state->alpha >> 8); in zynqmp_dpsub_plane_atomic_disable()
98 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev); in zynqmp_dpsub_plane_atomic_update()
99 struct zynqmp_disp_layer *layer = dpsub->layers[plane->index]; in zynqmp_dpsub_plane_atomic_update() local
102 if (!old_state->fb || in zynqmp_dpsub_plane_atomic_update()
103 old_state->fb->format->format != new_state->fb->format->format) in zynqmp_dpsub_plane_atomic_update()
112 if (old_state->fb) in zynqmp_dpsub_plane_atomic_update()
113 zynqmp_disp_layer_disable(layer); in zynqmp_dpsub_plane_atomic_update()
115 zynqmp_disp_layer_set_format(layer, new_state->fb->format); in zynqmp_dpsub_plane_atomic_update()
118 zynqmp_disp_layer_update(layer, new_state); in zynqmp_dpsub_plane_atomic_update()
120 if (plane->index == ZYNQMP_DPSUB_LAYER_GFX) in zynqmp_dpsub_plane_atomic_update()
121 zynqmp_disp_blend_set_global_alpha(dpsub->disp, true, in zynqmp_dpsub_plane_atomic_update()
122 plane->state->alpha >> 8); in zynqmp_dpsub_plane_atomic_update()
124 /* Enable or re-enable the plane if the format has changed. */ in zynqmp_dpsub_plane_atomic_update()
126 zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_NONLIVE); in zynqmp_dpsub_plane_atomic_update()
149 for (i = 0; i < ARRAY_SIZE(dpsub->drm->planes); i++) { in zynqmp_dpsub_create_planes()
150 struct zynqmp_disp_layer *layer = dpsub->layers[i]; in zynqmp_dpsub_create_planes() local
151 struct drm_plane *plane = &dpsub->drm->planes[i]; in zynqmp_dpsub_create_planes()
156 formats = zynqmp_disp_layer_drm_formats(layer, &num_formats); in zynqmp_dpsub_create_planes()
158 return -ENOMEM; in zynqmp_dpsub_create_planes()
160 /* Graphics layer is primary, and video layer is overlay. */ in zynqmp_dpsub_create_planes()
163 ret = drm_universal_plane_init(&dpsub->drm->dev, plane, 0, in zynqmp_dpsub_create_planes()
181 /* -----------------------------------------------------------------------------
187 return container_of(crtc, struct zynqmp_dpsub_drm, crtc)->dpsub; in crtc_to_dpsub()
194 struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; in zynqmp_dpsub_crtc_atomic_enable()
197 pm_runtime_get_sync(dpsub->dev); in zynqmp_dpsub_crtc_atomic_enable()
199 zynqmp_disp_setup_clock(dpsub->disp, adjusted_mode->clock * 1000); in zynqmp_dpsub_crtc_atomic_enable()
201 ret = clk_prepare_enable(dpsub->vid_clk); in zynqmp_dpsub_crtc_atomic_enable()
203 dev_err(dpsub->dev, "failed to enable a pixel clock\n"); in zynqmp_dpsub_crtc_atomic_enable()
204 pm_runtime_put_sync(dpsub->dev); in zynqmp_dpsub_crtc_atomic_enable()
208 zynqmp_disp_enable(dpsub->disp); in zynqmp_dpsub_crtc_atomic_enable()
211 vrefresh = (adjusted_mode->clock * 1000) / in zynqmp_dpsub_crtc_atomic_enable()
212 (adjusted_mode->vtotal * adjusted_mode->htotal); in zynqmp_dpsub_crtc_atomic_enable()
227 old_plane_state = drm_atomic_get_old_plane_state(state, crtc->primary); in zynqmp_dpsub_crtc_atomic_disable()
229 zynqmp_dpsub_plane_atomic_disable(crtc->primary, state); in zynqmp_dpsub_crtc_atomic_disable()
231 zynqmp_disp_disable(dpsub->disp); in zynqmp_dpsub_crtc_atomic_disable()
235 spin_lock_irq(&crtc->dev->event_lock); in zynqmp_dpsub_crtc_atomic_disable()
236 if (crtc->state->event) { in zynqmp_dpsub_crtc_atomic_disable()
237 drm_crtc_send_vblank_event(crtc, crtc->state->event); in zynqmp_dpsub_crtc_atomic_disable()
238 crtc->state->event = NULL; in zynqmp_dpsub_crtc_atomic_disable()
240 spin_unlock_irq(&crtc->dev->event_lock); in zynqmp_dpsub_crtc_atomic_disable()
242 clk_disable_unprepare(dpsub->vid_clk); in zynqmp_dpsub_crtc_atomic_disable()
243 pm_runtime_put_sync(dpsub->dev); in zynqmp_dpsub_crtc_atomic_disable()
261 if (crtc->state->event) { in zynqmp_dpsub_crtc_atomic_flush()
265 event = crtc->state->event; in zynqmp_dpsub_crtc_atomic_flush()
266 crtc->state->event = NULL; in zynqmp_dpsub_crtc_atomic_flush()
268 event->pipe = drm_crtc_index(crtc); in zynqmp_dpsub_crtc_atomic_flush()
272 spin_lock_irq(&crtc->dev->event_lock); in zynqmp_dpsub_crtc_atomic_flush()
274 spin_unlock_irq(&crtc->dev->event_lock); in zynqmp_dpsub_crtc_atomic_flush()
290 zynqmp_dp_enable_vblank(dpsub->dp); in zynqmp_dpsub_crtc_enable_vblank()
299 zynqmp_dp_disable_vblank(dpsub->dp); in zynqmp_dpsub_crtc_disable_vblank()
315 struct drm_plane *plane = &dpsub->drm->planes[ZYNQMP_DPSUB_LAYER_GFX]; in zynqmp_dpsub_create_crtc()
316 struct drm_crtc *crtc = &dpsub->drm->crtc; in zynqmp_dpsub_create_crtc()
319 ret = drm_crtc_init_with_planes(&dpsub->drm->dev, crtc, plane, in zynqmp_dpsub_create_crtc()
334 u32 possible_crtcs = drm_crtc_mask(&dpsub->drm->crtc); in zynqmp_dpsub_map_crtc_to_plane()
337 for (i = 0; i < ARRAY_SIZE(dpsub->drm->planes); i++) in zynqmp_dpsub_map_crtc_to_plane()
338 dpsub->drm->planes[i].possible_crtcs = possible_crtcs; in zynqmp_dpsub_map_crtc_to_plane()
342 * zynqmp_dpsub_drm_handle_vblank - Handle the vblank event
350 drm_crtc_handle_vblank(&dpsub->drm->crtc); in zynqmp_dpsub_drm_handle_vblank()
353 /* -----------------------------------------------------------------------------
362 unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8); in zynqmp_dpsub_dumb_create()
365 args->pitch = ALIGN(pitch, dpsub->dma_align); in zynqmp_dpsub_dumb_create()
380 cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align); in zynqmp_dpsub_fb_create()
391 /* -----------------------------------------------------------------------------
405 .name = "zynqmp-dpsub",
414 struct drm_encoder *encoder = &dpsub->drm->encoder; in zynqmp_dpsub_kms_init()
430 encoder->possible_crtcs |= drm_crtc_mask(&dpsub->drm->crtc); in zynqmp_dpsub_kms_init()
431 drm_simple_encoder_init(&dpsub->drm->dev, encoder, DRM_MODE_ENCODER_NONE); in zynqmp_dpsub_kms_init()
433 ret = drm_bridge_attach(encoder, dpsub->bridge, NULL, in zynqmp_dpsub_kms_init()
436 dev_err(dpsub->dev, "failed to attach bridge to encoder\n"); in zynqmp_dpsub_kms_init()
441 connector = drm_bridge_connector_init(&dpsub->drm->dev, encoder); in zynqmp_dpsub_kms_init()
443 dev_err(dpsub->dev, "failed to created connector\n"); in zynqmp_dpsub_kms_init()
450 dev_err(dpsub->dev, "failed to attach connector to encoder\n"); in zynqmp_dpsub_kms_init()
465 zynqmp_dpsub_release(dpdrm->dpsub); in zynqmp_dpsub_drm_release()
477 * dpsub->drm will remain NULL, which tells the caller that it must in zynqmp_dpsub_drm_init()
480 dpdrm = devm_drm_dev_alloc(dpsub->dev, &zynqmp_dpsub_drm_driver, in zynqmp_dpsub_drm_init()
485 dpdrm->dpsub = dpsub; in zynqmp_dpsub_drm_init()
486 drm = &dpdrm->dev; in zynqmp_dpsub_drm_init()
492 dpsub->drm = dpdrm; in zynqmp_dpsub_drm_init()
494 /* Initialize mode config, vblank and the KMS poll helper. */ in zynqmp_dpsub_drm_init()
499 drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs; in zynqmp_dpsub_drm_init()
500 drm->mode_config.min_width = 0; in zynqmp_dpsub_drm_init()
501 drm->mode_config.min_height = 0; in zynqmp_dpsub_drm_init()
502 drm->mode_config.max_width = ZYNQMP_DISP_MAX_WIDTH; in zynqmp_dpsub_drm_init()
503 drm->mode_config.max_height = ZYNQMP_DISP_MAX_HEIGHT; in zynqmp_dpsub_drm_init()
534 struct drm_device *drm = &dpsub->drm->dev; in zynqmp_dpsub_drm_cleanup()
538 drm_encoder_cleanup(&dpsub->drm->encoder); in zynqmp_dpsub_drm_cleanup()