Lines Matching +full:bcm2835 +full:- +full:txp
1 // SPDX-License-Identifier: GPL-2.0-only
31 #include <soc/bcm2835/raspberrypi-firmware.h>
72 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_dump_state()
73 struct drm_printer p = drm_info_printer(&hvs->pdev->dev); in vc4_hvs_dump_state()
79 drm_print_regset32(&p, &hvs->regset); in vc4_hvs_dump_state()
85 readl((u32 __iomem *)hvs->dlist + i + 0), in vc4_hvs_dump_state()
86 readl((u32 __iomem *)hvs->dlist + i + 1), in vc4_hvs_dump_state()
87 readl((u32 __iomem *)hvs->dlist + i + 2), in vc4_hvs_dump_state()
88 readl((u32 __iomem *)hvs->dlist + i + 3)); in vc4_hvs_dump_state()
96 struct drm_debugfs_entry *entry = m->private; in vc4_hvs_debugfs_underrun()
97 struct drm_device *dev = entry->dev; in vc4_hvs_debugfs_underrun()
101 drm_printf(&p, "%d\n", atomic_read(&vc4->underrun)); in vc4_hvs_debugfs_underrun()
108 struct drm_debugfs_entry *entry = m->private; in vc4_hvs_debugfs_dlist()
109 struct drm_device *dev = entry->dev; in vc4_hvs_debugfs_dlist()
111 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_debugfs_dlist()
113 unsigned int dlist_mem_size = hvs->dlist_mem_size; in vc4_hvs_debugfs_dlist()
131 dlist_word = readl((u32 __iomem *)vc4->hvs->dlist + j); in vc4_hvs_debugfs_dlist()
148 /* The filter kernel is composed of dwords each containing 3 9-bit
157 /* The whole filter kernel is arranged as the coefficients 0-16 going
158 * up, then a pad, then 17-31 going down and reversed within the
173 #define VC4_KERNEL_DWORDS (VC4_LINEAR_PHASE_KERNEL_DWORDS * 2 - 1)
179 VC4_LINEAR_PHASE_KERNEL(0, -2, -6, -8, -10, -8, -3, 2, 18,
194 ret = drm_mm_insert_node(&hvs->dlist_mm, space, VC4_KERNEL_DWORDS); in vc4_hvs_upload_linear_kernel()
201 dst_kernel = hvs->dlist + space->start; in vc4_hvs_upload_linear_kernel()
207 writel(kernel[VC4_KERNEL_DWORDS - i - 1], in vc4_hvs_upload_linear_kernel()
218 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_lut_load()
219 struct drm_crtc *crtc = &vc4_crtc->base; in vc4_hvs_lut_load()
220 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); in vc4_hvs_lut_load()
227 if (hvs->vc4->is_vc5) in vc4_hvs_lut_load()
236 (vc4_state->assigned_channel * 3 * crtc->gamma_size)); in vc4_hvs_lut_load()
238 for (i = 0; i < crtc->gamma_size; i++) in vc4_hvs_lut_load()
239 HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_r[i]); in vc4_hvs_lut_load()
240 for (i = 0; i < crtc->gamma_size; i++) in vc4_hvs_lut_load()
241 HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_g[i]); in vc4_hvs_lut_load()
242 for (i = 0; i < crtc->gamma_size; i++) in vc4_hvs_lut_load()
243 HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_b[i]); in vc4_hvs_lut_load()
251 struct drm_crtc_state *crtc_state = vc4_crtc->base.state; in vc4_hvs_update_gamma_lut()
252 struct drm_color_lut *lut = crtc_state->gamma_lut->data; in vc4_hvs_update_gamma_lut()
253 u32 length = drm_color_lut_size(crtc_state->gamma_lut); in vc4_hvs_update_gamma_lut()
257 vc4_crtc->lut_r[i] = drm_color_lut_extract(lut[i].red, 8); in vc4_hvs_update_gamma_lut()
258 vc4_crtc->lut_g[i] = drm_color_lut_extract(lut[i].green, 8); in vc4_hvs_update_gamma_lut()
259 vc4_crtc->lut_b[i] = drm_color_lut_extract(lut[i].blue, 8); in vc4_hvs_update_gamma_lut()
267 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_get_fifo_frame_count()
295 struct vc4_dev *vc4 = hvs->vc4; in vc4_hvs_get_fifo_from_output()
299 if (!vc4->is_vc5) in vc4_hvs_get_fifo_from_output()
327 return -EPIPE; in vc4_hvs_get_fifo_from_output()
335 return -EPIPE; in vc4_hvs_get_fifo_from_output()
343 return -EPIPE; in vc4_hvs_get_fifo_from_output()
348 return -EPIPE; in vc4_hvs_get_fifo_from_output()
355 struct vc4_dev *vc4 = hvs->vc4; in vc4_hvs_init_channel()
356 struct drm_device *drm = &vc4->base; in vc4_hvs_init_channel()
358 struct vc4_crtc_state *vc4_crtc_state = to_vc4_crtc_state(crtc->state); in vc4_hvs_init_channel()
359 unsigned int chan = vc4_crtc_state->assigned_channel; in vc4_hvs_init_channel()
360 bool interlace = mode->flags & DRM_MODE_FLAG_INTERLACE; in vc4_hvs_init_channel()
366 return -ENODEV; in vc4_hvs_init_channel()
380 if (!vc4->is_vc5) { in vc4_hvs_init_channel()
381 dispctrl |= VC4_SET_FIELD(mode->hdisplay, in vc4_hvs_init_channel()
383 VC4_SET_FIELD(mode->vdisplay, in vc4_hvs_init_channel()
388 dispctrl |= VC4_SET_FIELD(mode->hdisplay, in vc4_hvs_init_channel()
390 VC4_SET_FIELD(mode->vdisplay, in vc4_hvs_init_channel()
402 ((!vc4->is_vc5) ? SCALER_DISPBKGND_GAMMA : 0) | in vc4_hvs_init_channel()
417 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_stop_channel()
448 struct drm_device *dev = crtc->dev; in vc4_hvs_atomic_check()
459 if (hweight32(crtc_state->connector_mask) > 1) in vc4_hvs_atomic_check()
460 return -EINVAL; in vc4_hvs_atomic_check()
467 spin_lock_irqsave(&vc4->hvs->mm_lock, flags); in vc4_hvs_atomic_check()
468 ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm, in vc4_hvs_atomic_check()
470 spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags); in vc4_hvs_atomic_check()
479 struct drm_device *dev = crtc->dev; in vc4_hvs_install_dlist()
481 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_install_dlist()
482 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); in vc4_hvs_install_dlist()
488 HVS_WRITE(SCALER_DISPLISTX(vc4_state->assigned_channel), in vc4_hvs_install_dlist()
489 vc4_state->mm.start); in vc4_hvs_install_dlist()
496 struct drm_device *dev = crtc->dev; in vc4_hvs_update_dlist()
498 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); in vc4_hvs_update_dlist()
501 if (crtc->state->event) { in vc4_hvs_update_dlist()
502 crtc->state->event->pipe = drm_crtc_index(crtc); in vc4_hvs_update_dlist()
506 spin_lock_irqsave(&dev->event_lock, flags); in vc4_hvs_update_dlist()
508 if (!vc4_crtc->feeds_txp || vc4_state->txp_armed) { in vc4_hvs_update_dlist()
509 vc4_crtc->event = crtc->state->event; in vc4_hvs_update_dlist()
510 crtc->state->event = NULL; in vc4_hvs_update_dlist()
513 spin_unlock_irqrestore(&dev->event_lock, flags); in vc4_hvs_update_dlist()
516 spin_lock_irqsave(&vc4_crtc->irq_lock, flags); in vc4_hvs_update_dlist()
517 vc4_crtc->current_dlist = vc4_state->mm.start; in vc4_hvs_update_dlist()
518 spin_unlock_irqrestore(&vc4_crtc->irq_lock, flags); in vc4_hvs_update_dlist()
525 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); in vc4_hvs_atomic_begin()
528 spin_lock_irqsave(&vc4_crtc->irq_lock, flags); in vc4_hvs_atomic_begin()
529 vc4_crtc->current_hvs_channel = vc4_state->assigned_channel; in vc4_hvs_atomic_begin()
530 spin_unlock_irqrestore(&vc4_crtc->irq_lock, flags); in vc4_hvs_atomic_begin()
536 struct drm_device *dev = crtc->dev; in vc4_hvs_atomic_enable()
538 struct drm_display_mode *mode = &crtc->state->adjusted_mode; in vc4_hvs_atomic_enable()
540 bool oneshot = vc4_crtc->feeds_txp; in vc4_hvs_atomic_enable()
544 vc4_hvs_init_channel(vc4->hvs, crtc, mode, oneshot); in vc4_hvs_atomic_enable()
550 struct drm_device *dev = crtc->dev; in vc4_hvs_atomic_disable()
554 unsigned int chan = vc4_state->assigned_channel; in vc4_hvs_atomic_disable()
556 vc4_hvs_stop_channel(vc4->hvs, chan); in vc4_hvs_atomic_disable()
564 struct drm_device *dev = crtc->dev; in vc4_hvs_atomic_flush()
566 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_atomic_flush()
568 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); in vc4_hvs_atomic_flush()
569 unsigned int channel = vc4_state->assigned_channel; in vc4_hvs_atomic_flush()
574 u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start; in vc4_hvs_atomic_flush()
585 if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED) in vc4_hvs_atomic_flush()
598 if (plane->state->normalized_zpos != zpos) in vc4_hvs_atomic_flush()
611 vc4_plane_state = to_vc4_plane_state(plane->state); in vc4_hvs_atomic_flush()
612 enable_bg_fill = vc4_plane_state->needs_bg_fill; in vc4_hvs_atomic_flush()
626 WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size); in vc4_hvs_atomic_flush()
639 * re-enabling VBLANK interrupts and before enabling the engine. in vc4_hvs_atomic_flush()
643 if (crtc->state->active && old_state->active) { in vc4_hvs_atomic_flush()
648 if (crtc->state->color_mgmt_changed) { in vc4_hvs_atomic_flush()
651 if (crtc->state->gamma_lut) { in vc4_hvs_atomic_flush()
675 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_mask_underrun()
683 dispctrl &= ~(hvs->vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : in vc4_hvs_mask_underrun()
693 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_unmask_underrun()
701 dispctrl |= (hvs->vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : in vc4_hvs_unmask_underrun()
715 atomic_inc(&vc4->underrun); in vc4_hvs_report_underrun()
716 DRM_DEV_ERROR(dev->dev, "HVS underrun\n"); in vc4_hvs_report_underrun()
723 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_irq_handler()
745 dspeislur = vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : in vc4_hvs_irq_handler()
757 /* Clear every per-channel interrupt flag. */ in vc4_hvs_irq_handler()
767 struct drm_device *drm = minor->dev; in vc4_hvs_debugfs_init()
769 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_debugfs_init()
771 if (!vc4->hvs) in vc4_hvs_debugfs_init()
772 return -ENODEV; in vc4_hvs_debugfs_init()
774 if (!vc4->is_vc5) in vc4_hvs_debugfs_init()
776 minor->debugfs_root, in vc4_hvs_debugfs_init()
777 &vc4->load_tracker_enabled); in vc4_hvs_debugfs_init()
783 vc4_debugfs_add_regset32(drm, "hvs_regs", &hvs->regset); in vc4_hvs_debugfs_init()
790 struct drm_device *drm = &vc4->base; in __vc4_hvs_alloc()
795 return ERR_PTR(-ENOMEM); in __vc4_hvs_alloc()
797 hvs->vc4 = vc4; in __vc4_hvs_alloc()
798 hvs->pdev = pdev; in __vc4_hvs_alloc()
800 spin_lock_init(&hvs->mm_lock); in __vc4_hvs_alloc()
807 hvs->dlist_mem_size = (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END; in __vc4_hvs_alloc()
808 drm_mm_init(&hvs->dlist_mm, in __vc4_hvs_alloc()
810 hvs->dlist_mem_size); in __vc4_hvs_alloc()
817 if (!vc4->is_vc5) in __vc4_hvs_alloc()
818 /* 48k words of 2x12-bit pixels */ in __vc4_hvs_alloc()
819 drm_mm_init(&hvs->lbm_mm, 0, 48 * 1024); in __vc4_hvs_alloc()
821 /* 60k words of 4x12-bit pixels */ in __vc4_hvs_alloc()
822 drm_mm_init(&hvs->lbm_mm, 0, 60 * 1024); in __vc4_hvs_alloc()
824 vc4->hvs = hvs; in __vc4_hvs_alloc()
843 hvs->regs = vc4_ioremap_regs(pdev, 0); in vc4_hvs_bind()
844 if (IS_ERR(hvs->regs)) in vc4_hvs_bind()
845 return PTR_ERR(hvs->regs); in vc4_hvs_bind()
847 hvs->regset.base = hvs->regs; in vc4_hvs_bind()
848 hvs->regset.regs = hvs_regs; in vc4_hvs_bind()
849 hvs->regset.nregs = ARRAY_SIZE(hvs_regs); in vc4_hvs_bind()
851 if (vc4->is_vc5) { in vc4_hvs_bind()
858 return -EINVAL; in vc4_hvs_bind()
863 return -EPROBE_DEFER; in vc4_hvs_bind()
865 hvs->core_clk = devm_clk_get(&pdev->dev, NULL); in vc4_hvs_bind()
866 if (IS_ERR(hvs->core_clk)) { in vc4_hvs_bind()
867 dev_err(&pdev->dev, "Couldn't get core clock\n"); in vc4_hvs_bind()
868 return PTR_ERR(hvs->core_clk); in vc4_hvs_bind()
875 hvs->vc5_hdmi_enable_hdmi_20 = true; in vc4_hvs_bind()
878 hvs->vc5_hdmi_enable_4096by2160 = true; in vc4_hvs_bind()
880 hvs->max_core_rate = max_rate; in vc4_hvs_bind()
882 ret = clk_prepare_enable(hvs->core_clk); in vc4_hvs_bind()
884 dev_err(&pdev->dev, "Couldn't enable the core clock\n"); in vc4_hvs_bind()
889 if (!vc4->is_vc5) in vc4_hvs_bind()
890 hvs->dlist = hvs->regs + SCALER_DLIST_START; in vc4_hvs_bind()
892 hvs->dlist = hvs->regs + SCALER5_DLIST_START; in vc4_hvs_bind()
898 &hvs->mitchell_netravali_filter, in vc4_hvs_bind()
930 if (!vc4->is_vc5) in vc4_hvs_bind()
985 if (!vc4->is_vc5) { in vc4_hvs_bind()
988 * TXP composing RGBA to memory), whilst the remainder are only in vc4_hvs_bind()
999 reg |= (top - 1) << 16; in vc4_hvs_bind()
1003 reg |= (top - 1) << 16; in vc4_hvs_bind()
1007 reg |= (top - 1) << 16; in vc4_hvs_bind()
1011 * The bottom 4096 pixels are full RGBA (intended for the TXP in vc4_hvs_bind()
1050 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_unbind()
1053 if (drm_mm_node_allocated(&vc4->hvs->mitchell_netravali_filter)) in vc4_hvs_unbind()
1054 drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter); in vc4_hvs_unbind()
1056 drm_mm_for_each_node_safe(node, next, &vc4->hvs->dlist_mm) in vc4_hvs_unbind()
1059 drm_mm_takedown(&vc4->hvs->dlist_mm); in vc4_hvs_unbind()
1061 drm_mm_for_each_node_safe(node, next, &vc4->hvs->lbm_mm) in vc4_hvs_unbind()
1063 drm_mm_takedown(&vc4->hvs->lbm_mm); in vc4_hvs_unbind()
1065 clk_disable_unprepare(hvs->core_clk); in vc4_hvs_unbind()
1067 vc4->hvs = NULL; in vc4_hvs_unbind()
1077 return component_add(&pdev->dev, &vc4_hvs_ops); in vc4_hvs_dev_probe()
1082 component_del(&pdev->dev, &vc4_hvs_ops); in vc4_hvs_dev_remove()
1086 { .compatible = "brcm,bcm2711-hvs" },
1087 { .compatible = "brcm,bcm2835-hvs" },