Lines Matching full:hvs
7 * DOC: VC4 HVS module.
9 * The Hardware Video Scaler (HVS) is the piece of hardware that does
16 * There is a single global HVS, with multiple output FIFOs that can
18 * the HVS, while the vc4_crtc.c code actually drives HVS setup for
70 void vc4_hvs_dump_state(struct vc4_hvs *hvs) in vc4_hvs_dump_state() argument
72 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_dump_state()
73 struct drm_printer p = drm_info_printer(&hvs->pdev->dev); in vc4_hvs_dump_state()
79 drm_print_regset32(&p, &hvs->regset); in vc4_hvs_dump_state()
81 DRM_INFO("HVS ctx:\n"); in vc4_hvs_dump_state()
85 readl((u32 __iomem *)hvs->dlist + i + 0), in vc4_hvs_dump_state()
86 readl((u32 __iomem *)hvs->dlist + i + 1), in vc4_hvs_dump_state()
87 readl((u32 __iomem *)hvs->dlist + i + 2), in vc4_hvs_dump_state()
88 readl((u32 __iomem *)hvs->dlist + i + 3)); in vc4_hvs_dump_state()
111 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_debugfs_dlist() local
113 unsigned int dlist_mem_size = hvs->dlist_mem_size; in vc4_hvs_debugfs_dlist()
123 drm_printf(&p, "HVS chan %u disabled\n", i); in vc4_hvs_debugfs_dlist()
127 drm_printf(&p, "HVS chan %u:\n", i); in vc4_hvs_debugfs_dlist()
131 dlist_word = readl((u32 __iomem *)vc4->hvs->dlist + j); in vc4_hvs_debugfs_dlist()
182 static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs, in vc4_hvs_upload_linear_kernel() argument
194 ret = drm_mm_insert_node(&hvs->dlist_mm, space, VC4_KERNEL_DWORDS); in vc4_hvs_upload_linear_kernel()
201 dst_kernel = hvs->dlist + space->start; in vc4_hvs_upload_linear_kernel()
215 static void vc4_hvs_lut_load(struct vc4_hvs *hvs, in vc4_hvs_lut_load() argument
218 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_lut_load()
227 if (hvs->vc4->is_vc5) in vc4_hvs_lut_load()
230 /* The LUT memory is laid out with each HVS channel in order, in vc4_hvs_lut_load()
248 static void vc4_hvs_update_gamma_lut(struct vc4_hvs *hvs, in vc4_hvs_update_gamma_lut() argument
262 vc4_hvs_lut_load(hvs, vc4_crtc); in vc4_hvs_update_gamma_lut()
265 u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo) in vc4_hvs_get_fifo_frame_count() argument
267 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_get_fifo_frame_count()
293 int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output) in vc4_hvs_get_fifo_from_output() argument
295 struct vc4_dev *vc4 = hvs->vc4; in vc4_hvs_get_fifo_from_output()
352 static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc, in vc4_hvs_init_channel() argument
355 struct vc4_dev *vc4 = hvs->vc4; in vc4_hvs_init_channel()
408 vc4_hvs_lut_load(hvs, vc4_crtc); in vc4_hvs_init_channel()
415 void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int chan) in vc4_hvs_stop_channel() argument
417 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_stop_channel()
467 spin_lock_irqsave(&vc4->hvs->mm_lock, flags); in vc4_hvs_atomic_check()
468 ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm, in vc4_hvs_atomic_check()
470 spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags); in vc4_hvs_atomic_check()
481 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_install_dlist() local
544 vc4_hvs_init_channel(vc4->hvs, crtc, mode, oneshot); in vc4_hvs_atomic_enable()
556 vc4_hvs_stop_channel(vc4->hvs, chan); in vc4_hvs_atomic_disable()
566 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_atomic_flush() local
574 u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start; in vc4_hvs_atomic_flush()
589 DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc)); in vc4_hvs_atomic_flush()
590 vc4_hvs_dump_state(hvs); in vc4_hvs_atomic_flush()
652 vc4_hvs_update_gamma_lut(hvs, vc4_crtc); in vc4_hvs_atomic_flush()
665 DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc)); in vc4_hvs_atomic_flush()
666 vc4_hvs_dump_state(hvs); in vc4_hvs_atomic_flush()
673 void vc4_hvs_mask_underrun(struct vc4_hvs *hvs, int channel) in vc4_hvs_mask_underrun() argument
675 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_mask_underrun()
683 dispctrl &= ~(hvs->vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : in vc4_hvs_mask_underrun()
691 void vc4_hvs_unmask_underrun(struct vc4_hvs *hvs, int channel) in vc4_hvs_unmask_underrun() argument
693 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_unmask_underrun()
701 dispctrl |= (hvs->vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : in vc4_hvs_unmask_underrun()
716 DRM_DEV_ERROR(dev->dev, "HVS underrun\n"); in vc4_hvs_report_underrun()
723 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_irq_handler() local
750 vc4_hvs_mask_underrun(hvs, channel); in vc4_hvs_irq_handler()
769 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_debugfs_init() local
771 if (!vc4->hvs) in vc4_hvs_debugfs_init()
783 vc4_debugfs_add_regset32(drm, "hvs_regs", &hvs->regset); in vc4_hvs_debugfs_init()
791 struct vc4_hvs *hvs; in __vc4_hvs_alloc() local
793 hvs = drmm_kzalloc(drm, sizeof(*hvs), GFP_KERNEL); in __vc4_hvs_alloc()
794 if (!hvs) in __vc4_hvs_alloc()
797 hvs->vc4 = vc4; in __vc4_hvs_alloc()
798 hvs->pdev = pdev; in __vc4_hvs_alloc()
800 spin_lock_init(&hvs->mm_lock); in __vc4_hvs_alloc()
802 /* Set up the HVS display list memory manager. We never in __vc4_hvs_alloc()
807 hvs->dlist_mem_size = (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END; in __vc4_hvs_alloc()
808 drm_mm_init(&hvs->dlist_mm, in __vc4_hvs_alloc()
810 hvs->dlist_mem_size); in __vc4_hvs_alloc()
812 /* Set up the HVS LBM memory manager. We could have some more in __vc4_hvs_alloc()
819 drm_mm_init(&hvs->lbm_mm, 0, 48 * 1024); in __vc4_hvs_alloc()
822 drm_mm_init(&hvs->lbm_mm, 0, 60 * 1024); in __vc4_hvs_alloc()
824 vc4->hvs = hvs; in __vc4_hvs_alloc()
826 return hvs; in __vc4_hvs_alloc()
834 struct vc4_hvs *hvs = NULL; in vc4_hvs_bind() local
839 hvs = __vc4_hvs_alloc(vc4, NULL); in vc4_hvs_bind()
840 if (IS_ERR(hvs)) in vc4_hvs_bind()
841 return PTR_ERR(hvs); in vc4_hvs_bind()
843 hvs->regs = vc4_ioremap_regs(pdev, 0); in vc4_hvs_bind()
844 if (IS_ERR(hvs->regs)) in vc4_hvs_bind()
845 return PTR_ERR(hvs->regs); in vc4_hvs_bind()
847 hvs->regset.base = hvs->regs; in vc4_hvs_bind()
848 hvs->regset.regs = hvs_regs; in vc4_hvs_bind()
849 hvs->regset.nregs = ARRAY_SIZE(hvs_regs); in vc4_hvs_bind()
865 hvs->core_clk = devm_clk_get(&pdev->dev, NULL); in vc4_hvs_bind()
866 if (IS_ERR(hvs->core_clk)) { in vc4_hvs_bind()
868 return PTR_ERR(hvs->core_clk); in vc4_hvs_bind()
875 hvs->vc5_hdmi_enable_hdmi_20 = true; in vc4_hvs_bind()
878 hvs->vc5_hdmi_enable_4096by2160 = true; in vc4_hvs_bind()
880 hvs->max_core_rate = max_rate; in vc4_hvs_bind()
882 ret = clk_prepare_enable(hvs->core_clk); in vc4_hvs_bind()
890 hvs->dlist = hvs->regs + SCALER_DLIST_START; in vc4_hvs_bind()
892 hvs->dlist = hvs->regs + SCALER5_DLIST_START; in vc4_hvs_bind()
897 ret = vc4_hvs_upload_linear_kernel(hvs, in vc4_hvs_bind()
898 &hvs->mitchell_netravali_filter, in vc4_hvs_bind()
1038 vc4_hvs_irq_handler, 0, "vc4 hvs", drm); in vc4_hvs_bind()
1050 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_unbind() local
1053 if (drm_mm_node_allocated(&vc4->hvs->mitchell_netravali_filter)) in vc4_hvs_unbind()
1054 drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter); in vc4_hvs_unbind()
1056 drm_mm_for_each_node_safe(node, next, &vc4->hvs->dlist_mm) in vc4_hvs_unbind()
1059 drm_mm_takedown(&vc4->hvs->dlist_mm); in vc4_hvs_unbind()
1061 drm_mm_for_each_node_safe(node, next, &vc4->hvs->lbm_mm) in vc4_hvs_unbind()
1063 drm_mm_takedown(&vc4->hvs->lbm_mm); in vc4_hvs_unbind()
1065 clk_disable_unprepare(hvs->core_clk); in vc4_hvs_unbind()
1067 vc4->hvs = NULL; in vc4_hvs_unbind()
1086 { .compatible = "brcm,bcm2711-hvs" },
1087 { .compatible = "brcm,bcm2835-hvs" },