114 	tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_load_palette()
120 		tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);  in tilcdc_crtc_load_palette()
126 	tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_load_palette()
134 	tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_load_palette()
136 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);  in tilcdc_crtc_load_palette()
148 		tilcdc_set(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_enable_irqs()
164 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_disable_irqs()
373 	reg = tilcdc_read(dev, LCDC_RASTER_CTRL_REG) &  in tilcdc_crtc_set_mode()
399 	tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg);  in tilcdc_crtc_set_mode()
427 		tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER);  in tilcdc_crtc_set_mode()
429 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER);  in tilcdc_crtc_set_mode()
464 	tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_enable()
476 	tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_enable()
505 	tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_off()
741 	if (tilcdc_read(dev, LCDC_RASTER_CTRL_REG) & LCDC_RASTER_ENABLE) {  in tilcdc_crtc_reset()
747 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_reset()
963 			tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()
975 			reg = tilcdc_read(dev, LCDC_RASTER_CTRL_REG);  in tilcdc_crtc_irq()
977 				tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()
979 				tilcdc_set(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()
1002 			tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()