369 	unsigned int dp_padctl0;  member
653 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_power_up_lanes()
672 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_power_up_lanes()
701 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_power_down_lanes()
704 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_power_down_lanes()
732 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
751 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
755 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
758 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
766 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
768 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
797 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
799 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
862 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_link_apply_training()
866 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_link_apply_training()
2310 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2313 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2478 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2480 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2531 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2535 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2543 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2545 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
3285 	.dp_padctl0 = 0x5c,
3457 	.dp_padctl0 = 0x5c,
3518 	.dp_padctl0 = 0x168,
3601 	.dp_padctl0 = 0x16e,